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-rw-r--r--recipes-devtools/valgrind/valgrind/aarch64-inline-asm-clang.patch643
-rw-r--r--recipes-devtools/valgrind/valgrind/builtin_setjmp.patch67
-rw-r--r--recipes-devtools/valgrind/valgrind_%.bbappend3
3 files changed, 674 insertions, 39 deletions
diff --git a/recipes-devtools/valgrind/valgrind/aarch64-inline-asm-clang.patch b/recipes-devtools/valgrind/valgrind/aarch64-inline-asm-clang.patch
new file mode 100644
index 0000000..f65440a
--- /dev/null
+++ b/recipes-devtools/valgrind/valgrind/aarch64-inline-asm-clang.patch
@@ -0,0 +1,643 @@
1From: Bernhard Rosenkraenzer <bernhard.rosenkraenzer.ext@huawei.com>
2
3Fix inline assembly to work with clang
4Clang's builtin assembler is much stricter than gas in syntax checks.
5
6Signed-off-by: Bernhard Rosenkraenzer <bernhard.rosenkraenzer.ext@huawei.com>
7Upstream-Status: Pending
8
9diff -up valgrind-3.15.0/none/tests/arm64/cvtf_imm.c.omv~ valgrind-3.15.0/none/tests/arm64/cvtf_imm.c
10--- valgrind-3.15.0/none/tests/arm64/cvtf_imm.c.omv~ 2021-05-31 15:38:57.493204990 +0200
11+++ valgrind-3.15.0/none/tests/arm64/cvtf_imm.c 2021-05-31 15:39:44.915571692 +0200
12@@ -17,7 +17,7 @@ __attribute__((noinline)) double do_scvt
13 U block[2]; block[0].i64 = x; block[1].i64 = 0;
14 __asm__ __volatile__(
15 "ldr x13,[%0,#0]; scvtf d18,x13,#1; str d18, [%0,#8]"
16- ::"r"(&block[0]) : "memory", "x13","q18");
17+ ::"r"(&block[0]) : "memory", "x13","v18");
18 return block[1].d64;
19 }
20 __attribute__((noinline)) double do_scvtf_d_x_imm32 ( Long x )
21@@ -25,7 +25,7 @@ __attribute__((noinline)) double do_scvt
22 U block[2]; block[0].i64 = x; block[1].i64 = 0;
23 __asm__ __volatile__(
24 "ldr x13,[%0,#0]; scvtf d18,x13,#32; str d18, [%0,#8]"
25- ::"r"(&block[0]) : "memory", "x13","q18");
26+ ::"r"(&block[0]) : "memory", "x13","v18");
27 return block[1].d64;
28 }
29 __attribute__((noinline)) double do_scvtf_d_x_imm64 ( Long x )
30@@ -33,7 +33,7 @@ __attribute__((noinline)) double do_scvt
31 U block[2]; block[0].i64 = x; block[1].i64 = 0;
32 __asm__ __volatile__(
33 "ldr x13,[%0,#0]; scvtf d18,x13,#64; str d18, [%0,#8]"
34- ::"r"(&block[0]) : "memory", "x13","q18");
35+ ::"r"(&block[0]) : "memory", "x13","v18");
36 return block[1].d64;
37 }
38
39@@ -42,7 +42,7 @@ __attribute__((noinline)) double do_ucvt
40 U block[2]; block[0].i64 = x; block[1].i64 = 0;
41 __asm__ __volatile__(
42 "ldr x13,[%0,#0]; ucvtf d18,x13,#1; str d18, [%0,#8]"
43- ::"r"(&block[0]) : "memory", "x13","q18");
44+ ::"r"(&block[0]) : "memory", "x13","v18");
45 return block[1].d64;
46 }
47 __attribute__((noinline)) double do_ucvtf_d_x_imm32 ( Long x )
48@@ -50,7 +50,7 @@ __attribute__((noinline)) double do_ucvt
49 U block[2]; block[0].i64 = x; block[1].i64 = 0;
50 __asm__ __volatile__(
51 "ldr x13,[%0,#0]; ucvtf d18,x13,#32; str d18, [%0,#8]"
52- ::"r"(&block[0]) : "memory", "x13","q18");
53+ ::"r"(&block[0]) : "memory", "x13","v18");
54 return block[1].d64;
55 }
56 __attribute__((noinline)) double do_ucvtf_d_x_imm64 ( Long x )
57@@ -58,7 +58,7 @@ __attribute__((noinline)) double do_ucvt
58 U block[2]; block[0].i64 = x; block[1].i64 = 0;
59 __asm__ __volatile__(
60 "ldr x13,[%0,#0]; ucvtf d18,x13,#64; str d18, [%0,#8]"
61- ::"r"(&block[0]) : "memory", "x13","q18");
62+ ::"r"(&block[0]) : "memory", "x13","v18");
63 return block[1].d64;
64 }
65
66@@ -70,7 +70,7 @@ __attribute__((noinline)) double do_scvt
67 U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
68 __asm__ __volatile__(
69 "ldr x13,[%0,#0]; scvtf d18,w13,#1; str d18, [%0,#8]"
70- ::"r"(&block[0]) : "memory", "x13","q18");
71+ ::"r"(&block[0]) : "memory", "x13","v18");
72 return block[1].d64;
73 }
74 __attribute__((noinline)) double do_scvtf_d_w_imm16 ( Int x )
75@@ -78,7 +78,7 @@ __attribute__((noinline)) double do_scvt
76 U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
77 __asm__ __volatile__(
78 "ldr x13,[%0,#0]; scvtf d18,w13,#16; str d18, [%0,#8]"
79- ::"r"(&block[0]) : "memory", "x13","q18");
80+ ::"r"(&block[0]) : "memory", "x13","v18");
81 return block[1].d64;
82 }
83 __attribute__((noinline)) double do_scvtf_d_w_imm32 ( Int x )
84@@ -86,7 +86,7 @@ __attribute__((noinline)) double do_scvt
85 U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
86 __asm__ __volatile__(
87 "ldr x13,[%0,#0]; scvtf d18,w13,#32; str d18, [%0,#8]"
88- ::"r"(&block[0]) : "memory", "x13","q18");
89+ ::"r"(&block[0]) : "memory", "x13","v18");
90 return block[1].d64;
91 }
92
93@@ -95,7 +95,7 @@ __attribute__((noinline)) double do_ucvt
94 U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
95 __asm__ __volatile__(
96 "ldr x13,[%0,#0]; ucvtf d18,w13,#1; str d18, [%0,#8]"
97- ::"r"(&block[0]) : "memory", "x13","q18");
98+ ::"r"(&block[0]) : "memory", "x13","v18");
99 return block[1].d64;
100 }
101 __attribute__((noinline)) double do_ucvtf_d_w_imm16 ( Int x )
102@@ -103,7 +103,7 @@ __attribute__((noinline)) double do_ucvt
103 U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
104 __asm__ __volatile__(
105 "ldr x13,[%0,#0]; ucvtf d18,w13,#16; str d18, [%0,#8]"
106- ::"r"(&block[0]) : "memory", "x13","q18");
107+ ::"r"(&block[0]) : "memory", "x13","v18");
108 return block[1].d64;
109 }
110 __attribute__((noinline)) double do_ucvtf_d_w_imm32 ( Int x )
111@@ -111,7 +111,7 @@ __attribute__((noinline)) double do_ucvt
112 U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
113 __asm__ __volatile__(
114 "ldr x13,[%0,#0]; ucvtf d18,w13,#32; str d18, [%0,#8]"
115- ::"r"(&block[0]) : "memory", "x13","q18");
116+ ::"r"(&block[0]) : "memory", "x13","v18");
117 return block[1].d64;
118 }
119
120@@ -123,7 +123,7 @@ __attribute__((noinline)) double do_scvt
121 U block[2]; block[0].i64 = x; block[1].i64 = 0;
122 __asm__ __volatile__(
123 "ldr x13,[%0,#0]; scvtf s18,x13,#1; str s18, [%0,#8]"
124- ::"r"(&block[0]) : "memory", "x13","q18");
125+ ::"r"(&block[0]) : "memory", "x13","v18");
126 return (double)block[1].f32[0];
127 }
128 __attribute__((noinline)) double do_scvtf_s_x_imm32 ( Long x )
129@@ -131,7 +131,7 @@ __attribute__((noinline)) double do_scvt
130 U block[2]; block[0].i64 = x; block[1].i64 = 0;
131 __asm__ __volatile__(
132 "ldr x13,[%0,#0]; scvtf s18,x13,#32; str s18, [%0,#8]"
133- ::"r"(&block[0]) : "memory", "x13","q18");
134+ ::"r"(&block[0]) : "memory", "x13","v18");
135 return (double)block[1].f32[0];
136 }
137 __attribute__((noinline)) double do_scvtf_s_x_imm64 ( Long x )
138@@ -139,7 +139,7 @@ __attribute__((noinline)) double do_scvt
139 U block[2]; block[0].i64 = x; block[1].i64 = 0;
140 __asm__ __volatile__(
141 "ldr x13,[%0,#0]; scvtf s18,x13,#64; str s18, [%0,#8]"
142- ::"r"(&block[0]) : "memory", "x13","q18");
143+ ::"r"(&block[0]) : "memory", "x13","v18");
144 return (double)block[1].f32[0];
145 }
146
147@@ -148,7 +148,7 @@ __attribute__((noinline)) double do_ucvt
148 U block[2]; block[0].i64 = x; block[1].i64 = 0;
149 __asm__ __volatile__(
150 "ldr x13,[%0,#0]; ucvtf s18,x13,#1; str s18, [%0,#8]"
151- ::"r"(&block[0]) : "memory", "x13","q18");
152+ ::"r"(&block[0]) : "memory", "x13","v18");
153 return (double)block[1].f32[0];
154 }
155 __attribute__((noinline)) double do_ucvtf_s_x_imm32 ( Long x )
156@@ -156,7 +156,7 @@ __attribute__((noinline)) double do_ucvt
157 U block[2]; block[0].i64 = x; block[1].i64 = 0;
158 __asm__ __volatile__(
159 "ldr x13,[%0,#0]; ucvtf s18,x13,#32; str s18, [%0,#8]"
160- ::"r"(&block[0]) : "memory", "x13","q18");
161+ ::"r"(&block[0]) : "memory", "x13","v18");
162 return (double)block[1].f32[0];
163 }
164 __attribute__((noinline)) double do_ucvtf_s_x_imm64 ( Long x )
165@@ -164,7 +164,7 @@ __attribute__((noinline)) double do_ucvt
166 U block[2]; block[0].i64 = x; block[1].i64 = 0;
167 __asm__ __volatile__(
168 "ldr x13,[%0,#0]; ucvtf s18,x13,#64; str s18, [%0,#8]"
169- ::"r"(&block[0]) : "memory", "x13","q18");
170+ ::"r"(&block[0]) : "memory", "x13","v18");
171 return (double)block[1].f32[0];
172 }
173
174@@ -176,7 +176,7 @@ __attribute__((noinline)) double do_scvt
175 U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
176 __asm__ __volatile__(
177 "ldr x13,[%0,#0]; scvtf s18,w13,#1; str s18, [%0,#8]"
178- ::"r"(&block[0]) : "memory", "x13","q18");
179+ ::"r"(&block[0]) : "memory", "x13","v18");
180 return (double)block[1].f32[0];
181 }
182 __attribute__((noinline)) double do_scvtf_s_w_imm16 ( Int x )
183@@ -184,7 +184,7 @@ __attribute__((noinline)) double do_scvt
184 U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
185 __asm__ __volatile__(
186 "ldr x13,[%0,#0]; scvtf s18,w13,#16; str s18, [%0,#8]"
187- ::"r"(&block[0]) : "memory", "x13","q18");
188+ ::"r"(&block[0]) : "memory", "x13","v18");
189 return (double)block[1].f32[0];
190 }
191 __attribute__((noinline)) double do_scvtf_s_w_imm32 ( Int x )
192@@ -192,7 +192,7 @@ __attribute__((noinline)) double do_scvt
193 U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
194 __asm__ __volatile__(
195 "ldr x13,[%0,#0]; scvtf s18,w13,#32; str s18, [%0,#8]"
196- ::"r"(&block[0]) : "memory", "x13","q18");
197+ ::"r"(&block[0]) : "memory", "x13","v18");
198 return (double)block[1].f32[0];
199 }
200
201@@ -201,7 +201,7 @@ __attribute__((noinline)) double do_ucvt
202 U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
203 __asm__ __volatile__(
204 "ldr x13,[%0,#0]; ucvtf s18,w13,#1; str s18, [%0,#8]"
205- ::"r"(&block[0]) : "memory", "x13","q18");
206+ ::"r"(&block[0]) : "memory", "x13","v18");
207 return (double)block[1].f32[0];
208 }
209 __attribute__((noinline)) double do_ucvtf_s_w_imm16 ( Int x )
210@@ -209,7 +209,7 @@ __attribute__((noinline)) double do_ucvt
211 U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
212 __asm__ __volatile__(
213 "ldr x13,[%0,#0]; ucvtf s18,w13,#16; str s18, [%0,#8]"
214- ::"r"(&block[0]) : "memory", "x13","q18");
215+ ::"r"(&block[0]) : "memory", "x13","v18");
216 return (double)block[1].f32[0];
217 }
218 __attribute__((noinline)) double do_ucvtf_s_w_imm32 ( Int x )
219@@ -217,7 +217,7 @@ __attribute__((noinline)) double do_ucvt
220 U block[2]; block[0].i64 = (Long)x; block[1].i64 = 0;
221 __asm__ __volatile__(
222 "ldr x13,[%0,#0]; ucvtf s18,w13,#32; str s18, [%0,#8]"
223- ::"r"(&block[0]) : "memory", "x13","q18");
224+ ::"r"(&block[0]) : "memory", "x13","v18");
225 return (double)block[1].f32[0];
226 }
227
228diff -up valgrind-3.15.0/none/tests/arm64/fp_and_simd.c.omv~ valgrind-3.15.0/none/tests/arm64/fp_and_simd.c
229--- valgrind-3.15.0/none/tests/arm64/fp_and_simd.c.omv~ 2021-05-31 15:45:55.963884114 +0200
230+++ valgrind-3.15.0/none/tests/arm64/fp_and_simd.c 2021-05-31 16:07:36.437096320 +0200
231@@ -1909,7 +1909,7 @@ void test_SMAXV ( void )
232 __asm__ __volatile__( \
233 "ldr x9, [%0, 48]; msr nzcv, x9; " \
234 "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
235- "fcmp d29, #0; " \
236+ "fcmp d29, #0.0; " \
237 "mrs x9, nzcv; str x9, [%0, 48]; " \
238 "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
239 ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
240@@ -1930,7 +1930,7 @@ void test_SMAXV ( void )
241 __asm__ __volatile__( \
242 "ldr x9, [%0, 48]; msr nzcv, x9; " \
243 "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
244- "fcmp s29, #0; " \
245+ "fcmp s29, #0.0; " \
246 "mrs x9, nzcv; str x9, [%0, 48]; " \
247 "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
248 ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
249@@ -1951,7 +1951,7 @@ void test_SMAXV ( void )
250 __asm__ __volatile__( \
251 "ldr x9, [%0, 48]; msr nzcv, x9; " \
252 "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
253- "fcmpe d29, #0; " \
254+ "fcmpe d29, #0.0; " \
255 "mrs x9, nzcv; str x9, [%0, 48]; " \
256 "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
257 ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
258@@ -1972,7 +1972,7 @@ void test_SMAXV ( void )
259 __asm__ __volatile__( \
260 "ldr x9, [%0, 48]; msr nzcv, x9; " \
261 "ldr q29, [%0, #0]; ldr q11, [%0, #16]; ldr q9, [%0, #32]; " \
262- "fcmpe s29, #0; " \
263+ "fcmpe s29, #0.0; " \
264 "mrs x9, nzcv; str x9, [%0, 48]; " \
265 "str q29, [%0, #0]; str q11, [%0, #16]; str q9, [%0, #32]; " \
266 ::"r"(&block[0]) : "x9","cc","memory","v9","v11","v29" \
267@@ -3054,8 +3054,8 @@ GEN_BINARY_TEST(mul, 16b, 16b, 16b)
268 GEN_BINARY_TEST(mul, 8b, 8b, 8b)
269
270 /* overkill -- don't need two vecs, only one */
271-GEN_TWOVEC_TEST(movi_16b_0x9C_lsl0, "movi v22.16b, #0x9C, LSL #0", 22, 23)
272-GEN_TWOVEC_TEST(movi_8b_0x8B_lsl0, "movi v22.8b, #0x8B, LSL #0", 22, 23)
273+GEN_TWOVEC_TEST(movi_16b_0x9C_lsl0, "movi v22.16b, #0x9C", 22, 23)
274+GEN_TWOVEC_TEST(movi_8b_0x8B_lsl0, "movi v22.8b, #0x8B", 22, 23)
275
276 GEN_TWOVEC_TEST(movi_8h_0x5A_lsl0, "movi v22.8h, #0x5A, LSL #0", 22, 23)
277 GEN_TWOVEC_TEST(movi_8h_0xA5_lsl8, "movi v22.8h, #0xA5, LSL #8", 22, 23)
278diff -up valgrind-3.15.0/none/tests/arm64/integer.c.omv~ valgrind-3.15.0/none/tests/arm64/integer.c
279--- valgrind-3.15.0/none/tests/arm64/integer.c.omv~ 2021-05-31 16:37:19.140073620 +0200
280+++ valgrind-3.15.0/none/tests/arm64/integer.c 2021-05-31 16:47:04.202303084 +0200
281@@ -9354,23 +9354,23 @@ printf("ADD/SUB(extended reg)(64)\n");
282 #define NN8 0x2e10f2a4055bec0e
283 #define NN9 0x77f3b8dcc730b96a
284
285-TESTINST3("add x21,x22,x23,uxtb #0", NN0, NN1, x21,x22,x23,0);
286-TESTINST3("add x21,x22,x23,uxtb #1", NN2, NN3, x21,x22,x23,0);
287-TESTINST3("add x21,x22,x23,uxtb #2", NN4, NN5, x21,x22,x23,0);
288-TESTINST3("add x21,x22,x23,uxtb #3", NN6, NN7, x21,x22,x23,0);
289-TESTINST3("add x21,x22,x23,uxtb #4", NN8, NN9, x21,x22,x23,0);
290-
291-TESTINST3("add x21,x22,x23,uxth #0", NN0, NN1, x21,x22,x23,0);
292-TESTINST3("add x21,x22,x23,uxth #1", NN2, NN3, x21,x22,x23,0);
293-TESTINST3("add x21,x22,x23,uxth #2", NN4, NN5, x21,x22,x23,0);
294-TESTINST3("add x21,x22,x23,uxth #3", NN6, NN7, x21,x22,x23,0);
295-TESTINST3("add x21,x22,x23,uxth #4", NN8, NN9, x21,x22,x23,0);
296-
297-TESTINST3("add x21,x22,x23,uxtw #0", NN0, NN1, x21,x22,x23,0);
298-TESTINST3("add x21,x22,x23,uxtw #1", NN2, NN3, x21,x22,x23,0);
299-TESTINST3("add x21,x22,x23,uxtw #2", NN4, NN5, x21,x22,x23,0);
300-TESTINST3("add x21,x22,x23,uxtw #3", NN6, NN7, x21,x22,x23,0);
301-TESTINST3("add x21,x22,x23,uxtw #4", NN8, NN9, x21,x22,x23,0);
302+TESTINST3("add x21,x22,w23,uxtb #0", NN0, NN1, x21,x22,x23,0);
303+TESTINST3("add x21,x22,w23,uxtb #1", NN2, NN3, x21,x22,x23,0);
304+TESTINST3("add x21,x22,w23,uxtb #2", NN4, NN5, x21,x22,x23,0);
305+TESTINST3("add x21,x22,w23,uxtb #3", NN6, NN7, x21,x22,x23,0);
306+TESTINST3("add x21,x22,w23,uxtb #4", NN8, NN9, x21,x22,x23,0);
307+
308+TESTINST3("add x21,x22,w23,uxth #0", NN0, NN1, x21,x22,x23,0);
309+TESTINST3("add x21,x22,w23,uxth #1", NN2, NN3, x21,x22,x23,0);
310+TESTINST3("add x21,x22,w23,uxth #2", NN4, NN5, x21,x22,x23,0);
311+TESTINST3("add x21,x22,w23,uxth #3", NN6, NN7, x21,x22,x23,0);
312+TESTINST3("add x21,x22,w23,uxth #4", NN8, NN9, x21,x22,x23,0);
313+
314+TESTINST3("add x21,x22,w23,uxtw #0", NN0, NN1, x21,x22,x23,0);
315+TESTINST3("add x21,x22,w23,uxtw #1", NN2, NN3, x21,x22,x23,0);
316+TESTINST3("add x21,x22,w23,uxtw #2", NN4, NN5, x21,x22,x23,0);
317+TESTINST3("add x21,x22,w23,uxtw #3", NN6, NN7, x21,x22,x23,0);
318+TESTINST3("add x21,x22,w23,uxtw #4", NN8, NN9, x21,x22,x23,0);
319
320 TESTINST3("add x21,x22,x23,uxtx #0", NN0, NN1, x21,x22,x23,0);
321 TESTINST3("add x21,x22,x23,uxtx #1", NN2, NN3, x21,x22,x23,0);
322@@ -9378,23 +9378,23 @@ TESTINST3("add x21,x22,x23,uxtx #2", NN4
323 TESTINST3("add x21,x22,x23,uxtx #3", NN6, NN7, x21,x22,x23,0);
324 TESTINST3("add x21,x22,x23,uxtx #4", NN8, NN9, x21,x22,x23,0);
325
326-TESTINST3("add x21,x22,x23,sxtb #0", NN0, NN1, x21,x22,x23,0);
327-TESTINST3("add x21,x22,x23,sxtb #1", NN2, NN3, x21,x22,x23,0);
328-TESTINST3("add x21,x22,x23,sxtb #2", NN4, NN5, x21,x22,x23,0);
329-TESTINST3("add x21,x22,x23,sxtb #3", NN6, NN7, x21,x22,x23,0);
330-TESTINST3("add x21,x22,x23,sxtb #4", NN8, NN9, x21,x22,x23,0);
331-
332-TESTINST3("add x21,x22,x23,sxth #0", NN0, NN1, x21,x22,x23,0);
333-TESTINST3("add x21,x22,x23,sxth #1", NN2, NN3, x21,x22,x23,0);
334-TESTINST3("add x21,x22,x23,sxth #2", NN4, NN5, x21,x22,x23,0);
335-TESTINST3("add x21,x22,x23,sxth #3", NN6, NN7, x21,x22,x23,0);
336-TESTINST3("add x21,x22,x23,sxth #4", NN8, NN9, x21,x22,x23,0);
337-
338-TESTINST3("add x21,x22,x23,sxtw #0", NN0, NN1, x21,x22,x23,0);
339-TESTINST3("add x21,x22,x23,sxtw #1", NN2, NN3, x21,x22,x23,0);
340-TESTINST3("add x21,x22,x23,sxtw #2", NN4, NN5, x21,x22,x23,0);
341-TESTINST3("add x21,x22,x23,sxtw #3", NN6, NN7, x21,x22,x23,0);
342-TESTINST3("add x21,x22,x23,sxtw #4", NN8, NN9, x21,x22,x23,0);
343+TESTINST3("add x21,x22,w23,sxtb #0", NN0, NN1, x21,x22,x23,0);
344+TESTINST3("add x21,x22,w23,sxtb #1", NN2, NN3, x21,x22,x23,0);
345+TESTINST3("add x21,x22,w23,sxtb #2", NN4, NN5, x21,x22,x23,0);
346+TESTINST3("add x21,x22,w23,sxtb #3", NN6, NN7, x21,x22,x23,0);
347+TESTINST3("add x21,x22,w23,sxtb #4", NN8, NN9, x21,x22,x23,0);
348+
349+TESTINST3("add x21,x22,w23,sxth #0", NN0, NN1, x21,x22,x23,0);
350+TESTINST3("add x21,x22,w23,sxth #1", NN2, NN3, x21,x22,x23,0);
351+TESTINST3("add x21,x22,w23,sxth #2", NN4, NN5, x21,x22,x23,0);
352+TESTINST3("add x21,x22,w23,sxth #3", NN6, NN7, x21,x22,x23,0);
353+TESTINST3("add x21,x22,w23,sxth #4", NN8, NN9, x21,x22,x23,0);
354+
355+TESTINST3("add x21,x22,w23,sxtw #0", NN0, NN1, x21,x22,x23,0);
356+TESTINST3("add x21,x22,w23,sxtw #1", NN2, NN3, x21,x22,x23,0);
357+TESTINST3("add x21,x22,w23,sxtw #2", NN4, NN5, x21,x22,x23,0);
358+TESTINST3("add x21,x22,w23,sxtw #3", NN6, NN7, x21,x22,x23,0);
359+TESTINST3("add x21,x22,w23,sxtw #4", NN8, NN9, x21,x22,x23,0);
360
361 TESTINST3("add x21,x22,x23,sxtx #0", NN0, NN1, x21,x22,x23,0);
362 TESTINST3("add x21,x22,x23,sxtx #1", NN2, NN3, x21,x22,x23,0);
363@@ -9403,72 +9403,72 @@ TESTINST3("add x21,x22,x23,sxtx #3", NN6
364 TESTINST3("add x21,x22,x23,sxtx #4", NN8, NN9, x21,x22,x23,0);
365
366
367-TESTINST3("adds x21,x22,x23,uxtb #0", NN0, NN1, x21,x22,x23,0);
368-TESTINST3("adds x21,x22,x23,uxtb #1", NN2, NN3, x21,x22,x23,0);
369-TESTINST3("adds x21,x22,x23,uxtb #2", NN4, NN5, x21,x22,x23,0);
370-TESTINST3("adds x21,x22,x23,uxtb #3", NN6, NN7, x21,x22,x23,0);
371-TESTINST3("adds x21,x22,x23,uxtb #4", NN8, NN9, x21,x22,x23,0);
372-
373-TESTINST3("adds x21,x22,x23,uxth #0", NN0, NN1, x21,x22,x23,0);
374-TESTINST3("adds x21,x22,x23,uxth #1", NN2, NN3, x21,x22,x23,0);
375-TESTINST3("adds x21,x22,x23,uxth #2", NN4, NN5, x21,x22,x23,0);
376-TESTINST3("adds x21,x22,x23,uxth #3", NN6, NN7, x21,x22,x23,0);
377-TESTINST3("adds x21,x22,x23,uxth #4", NN8, NN9, x21,x22,x23,0);
378-
379-TESTINST3("adds x21,x22,x23,uxtw #0", NN0, NN1, x21,x22,x23,0);
380-TESTINST3("adds x21,x22,x23,uxtw #1", NN2, NN3, x21,x22,x23,0);
381-TESTINST3("adds x21,x22,x23,uxtw #2", NN4, NN5, x21,x22,x23,0);
382-TESTINST3("adds x21,x22,x23,uxtw #3", NN6, NN7, x21,x22,x23,0);
383-TESTINST3("adds x21,x22,x23,uxtw #4", NN8, NN9, x21,x22,x23,0);
384-
385-TESTINST3("adds x21,x22,x23,uxtx #0", NN0, NN1, x21,x22,x23,0);
386-TESTINST3("adds x21,x22,x23,uxtx #1", NN2, NN3, x21,x22,x23,0);
387-TESTINST3("adds x21,x22,x23,uxtx #2", NN4, NN5, x21,x22,x23,0);
388-TESTINST3("adds x21,x22,x23,uxtx #3", NN6, NN7, x21,x22,x23,0);
389-TESTINST3("adds x21,x22,x23,uxtx #4", NN8, NN9, x21,x22,x23,0);
390-
391-TESTINST3("adds x21,x22,x23,sxtb #0", NN0, NN1, x21,x22,x23,0);
392-TESTINST3("adds x21,x22,x23,sxtb #1", NN2, NN3, x21,x22,x23,0);
393-TESTINST3("adds x21,x22,x23,sxtb #2", NN4, NN5, x21,x22,x23,0);
394-TESTINST3("adds x21,x22,x23,sxtb #3", NN6, NN7, x21,x22,x23,0);
395-TESTINST3("adds x21,x22,x23,sxtb #4", NN8, NN9, x21,x22,x23,0);
396-
397-TESTINST3("adds x21,x22,x23,sxth #0", NN0, NN1, x21,x22,x23,0);
398-TESTINST3("adds x21,x22,x23,sxth #1", NN2, NN3, x21,x22,x23,0);
399-TESTINST3("adds x21,x22,x23,sxth #2", NN4, NN5, x21,x22,x23,0);
400-TESTINST3("adds x21,x22,x23,sxth #3", NN6, NN7, x21,x22,x23,0);
401-TESTINST3("adds x21,x22,x23,sxth #4", NN8, NN9, x21,x22,x23,0);
402-
403-TESTINST3("adds x21,x22,x23,sxtw #0", NN0, NN1, x21,x22,x23,0);
404-TESTINST3("adds x21,x22,x23,sxtw #1", NN2, NN3, x21,x22,x23,0);
405-TESTINST3("adds x21,x22,x23,sxtw #2", NN4, NN5, x21,x22,x23,0);
406-TESTINST3("adds x21,x22,x23,sxtw #3", NN6, NN7, x21,x22,x23,0);
407-TESTINST3("adds x21,x22,x23,sxtw #4", NN8, NN9, x21,x22,x23,0);
408-
409-TESTINST3("adds x21,x22,x23,sxtx #0", NN0, NN1, x21,x22,x23,0);
410-TESTINST3("adds x21,x22,x23,sxtx #1", NN2, NN3, x21,x22,x23,0);
411-TESTINST3("adds x21,x22,x23,sxtx #2", NN4, NN5, x21,x22,x23,0);
412-TESTINST3("adds x21,x22,x23,sxtx #3", NN6, NN7, x21,x22,x23,0);
413-TESTINST3("adds x21,x22,x23,sxtx #4", NN8, NN9, x21,x22,x23,0);
414-
415-
416-TESTINST3("sub x21,x22,x23,uxtb #0", NN0, NN1, x21,x22,x23,0);
417-TESTINST3("sub x21,x22,x23,uxtb #1", NN2, NN3, x21,x22,x23,0);
418-TESTINST3("sub x21,x22,x23,uxtb #2", NN4, NN5, x21,x22,x23,0);
419-TESTINST3("sub x21,x22,x23,uxtb #3", NN6, NN7, x21,x22,x23,0);
420-TESTINST3("sub x21,x22,x23,uxtb #4", NN8, NN9, x21,x22,x23,0);
421-
422-TESTINST3("sub x21,x22,x23,uxth #0", NN0, NN1, x21,x22,x23,0);
423-TESTINST3("sub x21,x22,x23,uxth #1", NN2, NN3, x21,x22,x23,0);
424-TESTINST3("sub x21,x22,x23,uxth #2", NN4, NN5, x21,x22,x23,0);
425-TESTINST3("sub x21,x22,x23,uxth #3", NN6, NN7, x21,x22,x23,0);
426-TESTINST3("sub x21,x22,x23,uxth #4", NN8, NN9, x21,x22,x23,0);
427-
428-TESTINST3("sub x21,x22,x23,uxtw #0", NN0, NN1, x21,x22,x23,0);
429-TESTINST3("sub x21,x22,x23,uxtw #1", NN2, NN3, x21,x22,x23,0);
430-TESTINST3("sub x21,x22,x23,uxtw #2", NN4, NN5, x21,x22,x23,0);
431-TESTINST3("sub x21,x22,x23,uxtw #3", NN6, NN7, x21,x22,x23,0);
432-TESTINST3("sub x21,x22,x23,uxtw #4", NN8, NN9, x21,x22,x23,0);
433+TESTINST3("adds x21,x22,w23,uxtb #0", NN0, NN1, x21,x22,x23,0);
434+TESTINST3("adds x21,x22,w23,uxtb #1", NN2, NN3, x21,x22,x23,0);
435+TESTINST3("adds x21,x22,w23,uxtb #2", NN4, NN5, x21,x22,x23,0);
436+TESTINST3("adds x21,x22,w23,uxtb #3", NN6, NN7, x21,x22,x23,0);
437+TESTINST3("adds x21,x22,w23,uxtb #4", NN8, NN9, x21,x22,x23,0);
438+
439+TESTINST3("adds x21,x22,w23,uxth #0", NN0, NN1, x21,x22,x23,0);
440+TESTINST3("adds x21,x22,w23,uxth #1", NN2, NN3, x21,x22,x23,0);
441+TESTINST3("adds x21,x22,w23,uxth #2", NN4, NN5, x21,x22,x23,0);
442+TESTINST3("adds x21,x22,w23,uxth #3", NN6, NN7, x21,x22,x23,0);
443+TESTINST3("adds x21,x22,w23,uxth #4", NN8, NN9, x21,x22,x23,0);
444+
445+TESTINST3("adds x21,x22,w23,uxtw #0", NN0, NN1, x21,x22,x23,0);
446+TESTINST3("adds x21,x22,w23,uxtw #1", NN2, NN3, x21,x22,x23,0);
447+TESTINST3("adds x21,x22,w23,uxtw #2", NN4, NN5, x21,x22,x23,0);
448+TESTINST3("adds x21,x22,w23,uxtw #3", NN6, NN7, x21,x22,x23,0);
449+TESTINST3("adds x21,x22,w23,uxtw #4", NN8, NN9, x21,x22,x23,0);
450+
451+TESTINST3("adds x21,x22,w23,uxtx #0", NN0, NN1, x21,x22,x23,0);
452+TESTINST3("adds x21,x22,w23,uxtx #1", NN2, NN3, x21,x22,x23,0);
453+TESTINST3("adds x21,x22,w23,uxtx #2", NN4, NN5, x21,x22,x23,0);
454+TESTINST3("adds x21,x22,w23,uxtx #3", NN6, NN7, x21,x22,x23,0);
455+TESTINST3("adds x21,x22,w23,uxtx #4", NN8, NN9, x21,x22,x23,0);
456+
457+TESTINST3("adds x21,x22,w23,sxtb #0", NN0, NN1, x21,x22,x23,0);
458+TESTINST3("adds x21,x22,w23,sxtb #1", NN2, NN3, x21,x22,x23,0);
459+TESTINST3("adds x21,x22,w23,sxtb #2", NN4, NN5, x21,x22,x23,0);
460+TESTINST3("adds x21,x22,w23,sxtb #3", NN6, NN7, x21,x22,x23,0);
461+TESTINST3("adds x21,x22,w23,sxtb #4", NN8, NN9, x21,x22,x23,0);
462+
463+TESTINST3("adds x21,x22,w23,sxth #0", NN0, NN1, x21,x22,x23,0);
464+TESTINST3("adds x21,x22,w23,sxth #1", NN2, NN3, x21,x22,x23,0);
465+TESTINST3("adds x21,x22,w23,sxth #2", NN4, NN5, x21,x22,x23,0);
466+TESTINST3("adds x21,x22,w23,sxth #3", NN6, NN7, x21,x22,x23,0);
467+TESTINST3("adds x21,x22,w23,sxth #4", NN8, NN9, x21,x22,x23,0);
468+
469+TESTINST3("adds x21,x22,w23,sxtw #0", NN0, NN1, x21,x22,x23,0);
470+TESTINST3("adds x21,x22,w23,sxtw #1", NN2, NN3, x21,x22,x23,0);
471+TESTINST3("adds x21,x22,w23,sxtw #2", NN4, NN5, x21,x22,x23,0);
472+TESTINST3("adds x21,x22,w23,sxtw #3", NN6, NN7, x21,x22,x23,0);
473+TESTINST3("adds x21,x22,w23,sxtw #4", NN8, NN9, x21,x22,x23,0);
474+
475+TESTINST3("adds x21,x22,w23,sxtx #0", NN0, NN1, x21,x22,x23,0);
476+TESTINST3("adds x21,x22,w23,sxtx #1", NN2, NN3, x21,x22,x23,0);
477+TESTINST3("adds x21,x22,w23,sxtx #2", NN4, NN5, x21,x22,x23,0);
478+TESTINST3("adds x21,x22,w23,sxtx #3", NN6, NN7, x21,x22,x23,0);
479+TESTINST3("adds x21,x22,w23,sxtx #4", NN8, NN9, x21,x22,x23,0);
480+
481+
482+TESTINST3("sub x21,x22,w23,uxtb #0", NN0, NN1, x21,x22,x23,0);
483+TESTINST3("sub x21,x22,w23,uxtb #1", NN2, NN3, x21,x22,x23,0);
484+TESTINST3("sub x21,x22,w23,uxtb #2", NN4, NN5, x21,x22,x23,0);
485+TESTINST3("sub x21,x22,w23,uxtb #3", NN6, NN7, x21,x22,x23,0);
486+TESTINST3("sub x21,x22,w23,uxtb #4", NN8, NN9, x21,x22,x23,0);
487+
488+TESTINST3("sub x21,x22,w23,uxth #0", NN0, NN1, x21,x22,x23,0);
489+TESTINST3("sub x21,x22,w23,uxth #1", NN2, NN3, x21,x22,x23,0);
490+TESTINST3("sub x21,x22,w23,uxth #2", NN4, NN5, x21,x22,x23,0);
491+TESTINST3("sub x21,x22,w23,uxth #3", NN6, NN7, x21,x22,x23,0);
492+TESTINST3("sub x21,x22,w23,uxth #4", NN8, NN9, x21,x22,x23,0);
493+
494+TESTINST3("sub x21,x22,w23,uxtw #0", NN0, NN1, x21,x22,x23,0);
495+TESTINST3("sub x21,x22,w23,uxtw #1", NN2, NN3, x21,x22,x23,0);
496+TESTINST3("sub x21,x22,w23,uxtw #2", NN4, NN5, x21,x22,x23,0);
497+TESTINST3("sub x21,x22,w23,uxtw #3", NN6, NN7, x21,x22,x23,0);
498+TESTINST3("sub x21,x22,w23,uxtw #4", NN8, NN9, x21,x22,x23,0);
499
500 TESTINST3("sub x21,x22,x23,uxtx #0", NN0, NN1, x21,x22,x23,0);
501 TESTINST3("sub x21,x22,x23,uxtx #1", NN2, NN3, x21,x22,x23,0);
502@@ -9476,23 +9476,23 @@ TESTINST3("sub x21,x22,x23,uxtx #2", NN4
503 TESTINST3("sub x21,x22,x23,uxtx #3", NN6, NN7, x21,x22,x23,0);
504 TESTINST3("sub x21,x22,x23,uxtx #4", NN8, NN9, x21,x22,x23,0);
505
506-TESTINST3("sub x21,x22,x23,sxtb #0", NN0, NN1, x21,x22,x23,0);
507-TESTINST3("sub x21,x22,x23,sxtb #1", NN2, NN3, x21,x22,x23,0);
508-TESTINST3("sub x21,x22,x23,sxtb #2", NN4, NN5, x21,x22,x23,0);
509-TESTINST3("sub x21,x22,x23,sxtb #3", NN6, NN7, x21,x22,x23,0);
510-TESTINST3("sub x21,x22,x23,sxtb #4", NN8, NN9, x21,x22,x23,0);
511-
512-TESTINST3("sub x21,x22,x23,sxth #0", NN0, NN1, x21,x22,x23,0);
513-TESTINST3("sub x21,x22,x23,sxth #1", NN2, NN3, x21,x22,x23,0);
514-TESTINST3("sub x21,x22,x23,sxth #2", NN4, NN5, x21,x22,x23,0);
515-TESTINST3("sub x21,x22,x23,sxth #3", NN6, NN7, x21,x22,x23,0);
516-TESTINST3("sub x21,x22,x23,sxth #4", NN8, NN9, x21,x22,x23,0);
517-
518-TESTINST3("sub x21,x22,x23,sxtw #0", NN0, NN1, x21,x22,x23,0);
519-TESTINST3("sub x21,x22,x23,sxtw #1", NN2, NN3, x21,x22,x23,0);
520-TESTINST3("sub x21,x22,x23,sxtw #2", NN4, NN5, x21,x22,x23,0);
521-TESTINST3("sub x21,x22,x23,sxtw #3", NN6, NN7, x21,x22,x23,0);
522-TESTINST3("sub x21,x22,x23,sxtw #4", NN8, NN9, x21,x22,x23,0);
523+TESTINST3("sub x21,x22,w23,sxtb #0", NN0, NN1, x21,x22,x23,0);
524+TESTINST3("sub x21,x22,w23,sxtb #1", NN2, NN3, x21,x22,x23,0);
525+TESTINST3("sub x21,x22,w23,sxtb #2", NN4, NN5, x21,x22,x23,0);
526+TESTINST3("sub x21,x22,w23,sxtb #3", NN6, NN7, x21,x22,x23,0);
527+TESTINST3("sub x21,x22,w23,sxtb #4", NN8, NN9, x21,x22,x23,0);
528+
529+TESTINST3("sub x21,x22,w23,sxth #0", NN0, NN1, x21,x22,x23,0);
530+TESTINST3("sub x21,x22,w23,sxth #1", NN2, NN3, x21,x22,x23,0);
531+TESTINST3("sub x21,x22,w23,sxth #2", NN4, NN5, x21,x22,x23,0);
532+TESTINST3("sub x21,x22,w23,sxth #3", NN6, NN7, x21,x22,x23,0);
533+TESTINST3("sub x21,x22,w23,sxth #4", NN8, NN9, x21,x22,x23,0);
534+
535+TESTINST3("sub x21,x22,w23,sxtw #0", NN0, NN1, x21,x22,x23,0);
536+TESTINST3("sub x21,x22,w23,sxtw #1", NN2, NN3, x21,x22,x23,0);
537+TESTINST3("sub x21,x22,w23,sxtw #2", NN4, NN5, x21,x22,x23,0);
538+TESTINST3("sub x21,x22,w23,sxtw #3", NN6, NN7, x21,x22,x23,0);
539+TESTINST3("sub x21,x22,w23,sxtw #4", NN8, NN9, x21,x22,x23,0);
540
541 TESTINST3("sub x21,x22,x23,sxtx #0", NN0, NN1, x21,x22,x23,0);
542 TESTINST3("sub x21,x22,x23,sxtx #1", NN2, NN3, x21,x22,x23,0);
543@@ -9501,53 +9501,53 @@ TESTINST3("sub x21,x22,x23,sxtx #3", NN6
544 TESTINST3("sub x21,x22,x23,sxtx #4", NN8, NN9, x21,x22,x23,0);
545
546
547-TESTINST3("subs x21,x22,x23,uxtb #0", NN0, NN1, x21,x22,x23,0);
548-TESTINST3("subs x21,x22,x23,uxtb #1", NN2, NN3, x21,x22,x23,0);
549-TESTINST3("subs x21,x22,x23,uxtb #2", NN4, NN5, x21,x22,x23,0);
550-TESTINST3("subs x21,x22,x23,uxtb #3", NN6, NN7, x21,x22,x23,0);
551-TESTINST3("subs x21,x22,x23,uxtb #4", NN8, NN9, x21,x22,x23,0);
552-
553-TESTINST3("subs x21,x22,x23,uxth #0", NN0, NN1, x21,x22,x23,0);
554-TESTINST3("subs x21,x22,x23,uxth #1", NN2, NN3, x21,x22,x23,0);
555-TESTINST3("subs x21,x22,x23,uxth #2", NN4, NN5, x21,x22,x23,0);
556-TESTINST3("subs x21,x22,x23,uxth #3", NN6, NN7, x21,x22,x23,0);
557-TESTINST3("subs x21,x22,x23,uxth #4", NN8, NN9, x21,x22,x23,0);
558-
559-TESTINST3("subs x21,x22,x23,uxtw #0", NN0, NN1, x21,x22,x23,0);
560-TESTINST3("subs x21,x22,x23,uxtw #1", NN2, NN3, x21,x22,x23,0);
561-TESTINST3("subs x21,x22,x23,uxtw #2", NN4, NN5, x21,x22,x23,0);
562-TESTINST3("subs x21,x22,x23,uxtw #3", NN6, NN7, x21,x22,x23,0);
563-TESTINST3("subs x21,x22,x23,uxtw #4", NN8, NN9, x21,x22,x23,0);
564-
565-TESTINST3("subs x21,x22,x23,uxtx #0", NN0, NN1, x21,x22,x23,0);
566-TESTINST3("subs x21,x22,x23,uxtx #1", NN2, NN3, x21,x22,x23,0);
567-TESTINST3("subs x21,x22,x23,uxtx #2", NN4, NN5, x21,x22,x23,0);
568-TESTINST3("subs x21,x22,x23,uxtx #3", NN6, NN7, x21,x22,x23,0);
569-TESTINST3("subs x21,x22,x23,uxtx #4", NN8, NN9, x21,x22,x23,0);
570-
571-TESTINST3("subs x21,x22,x23,sxtb #0", NN0, NN1, x21,x22,x23,0);
572-TESTINST3("subs x21,x22,x23,sxtb #1", NN2, NN3, x21,x22,x23,0);
573-TESTINST3("subs x21,x22,x23,sxtb #2", NN4, NN5, x21,x22,x23,0);
574-TESTINST3("subs x21,x22,x23,sxtb #3", NN6, NN7, x21,x22,x23,0);
575-TESTINST3("subs x21,x22,x23,sxtb #4", NN8, NN9, x21,x22,x23,0);
576-
577-TESTINST3("subs x21,x22,x23,sxth #0", NN0, NN1, x21,x22,x23,0);
578-TESTINST3("subs x21,x22,x23,sxth #1", NN2, NN3, x21,x22,x23,0);
579-TESTINST3("subs x21,x22,x23,sxth #2", NN4, NN5, x21,x22,x23,0);
580-TESTINST3("subs x21,x22,x23,sxth #3", NN6, NN7, x21,x22,x23,0);
581-TESTINST3("subs x21,x22,x23,sxth #4", NN8, NN9, x21,x22,x23,0);
582-
583-TESTINST3("subs x21,x22,x23,sxtw #0", NN0, NN1, x21,x22,x23,0);
584-TESTINST3("subs x21,x22,x23,sxtw #1", NN2, NN3, x21,x22,x23,0);
585-TESTINST3("subs x21,x22,x23,sxtw #2", NN4, NN5, x21,x22,x23,0);
586-TESTINST3("subs x21,x22,x23,sxtw #3", NN6, NN7, x21,x22,x23,0);
587-TESTINST3("subs x21,x22,x23,sxtw #4", NN8, NN9, x21,x22,x23,0);
588-
589-TESTINST3("subs x21,x22,x23,sxtx #0", NN0, NN1, x21,x22,x23,0);
590-TESTINST3("subs x21,x22,x23,sxtx #1", NN2, NN3, x21,x22,x23,0);
591-TESTINST3("subs x21,x22,x23,sxtx #2", NN4, NN5, x21,x22,x23,0);
592-TESTINST3("subs x21,x22,x23,sxtx #3", NN6, NN7, x21,x22,x23,0);
593-TESTINST3("subs x21,x22,x23,sxtx #4", NN8, NN9, x21,x22,x23,0);
594+TESTINST3("subs x21,x22,w23,uxtb #0", NN0, NN1, x21,x22,x23,0);
595+TESTINST3("subs x21,x22,w23,uxtb #1", NN2, NN3, x21,x22,x23,0);
596+TESTINST3("subs x21,x22,w23,uxtb #2", NN4, NN5, x21,x22,x23,0);
597+TESTINST3("subs x21,x22,w23,uxtb #3", NN6, NN7, x21,x22,x23,0);
598+TESTINST3("subs x21,x22,w23,uxtb #4", NN8, NN9, x21,x22,x23,0);
599+
600+TESTINST3("subs x21,x22,w23,uxth #0", NN0, NN1, x21,x22,x23,0);
601+TESTINST3("subs x21,x22,w23,uxth #1", NN2, NN3, x21,x22,x23,0);
602+TESTINST3("subs x21,x22,w23,uxth #2", NN4, NN5, x21,x22,x23,0);
603+TESTINST3("subs x21,x22,w23,uxth #3", NN6, NN7, x21,x22,x23,0);
604+TESTINST3("subs x21,x22,w23,uxth #4", NN8, NN9, x21,x22,x23,0);
605+
606+TESTINST3("subs x21,x22,w23,uxtw #0", NN0, NN1, x21,x22,x23,0);
607+TESTINST3("subs x21,x22,w23,uxtw #1", NN2, NN3, x21,x22,x23,0);
608+TESTINST3("subs x21,x22,w23,uxtw #2", NN4, NN5, x21,x22,x23,0);
609+TESTINST3("subs x21,x22,w23,uxtw #3", NN6, NN7, x21,x22,x23,0);
610+TESTINST3("subs x21,x22,w23,uxtw #4", NN8, NN9, x21,x22,x23,0);
611+
612+TESTINST3("subs x21,x22,w23,uxtx #0", NN0, NN1, x21,x22,x23,0);
613+TESTINST3("subs x21,x22,w23,uxtx #1", NN2, NN3, x21,x22,x23,0);
614+TESTINST3("subs x21,x22,w23,uxtx #2", NN4, NN5, x21,x22,x23,0);
615+TESTINST3("subs x21,x22,w23,uxtx #3", NN6, NN7, x21,x22,x23,0);
616+TESTINST3("subs x21,x22,w23,uxtx #4", NN8, NN9, x21,x22,x23,0);
617+
618+TESTINST3("subs x21,x22,w23,sxtb #0", NN0, NN1, x21,x22,x23,0);
619+TESTINST3("subs x21,x22,w23,sxtb #1", NN2, NN3, x21,x22,x23,0);
620+TESTINST3("subs x21,x22,w23,sxtb #2", NN4, NN5, x21,x22,x23,0);
621+TESTINST3("subs x21,x22,w23,sxtb #3", NN6, NN7, x21,x22,x23,0);
622+TESTINST3("subs x21,x22,w23,sxtb #4", NN8, NN9, x21,x22,x23,0);
623+
624+TESTINST3("subs x21,x22,w23,sxth #0", NN0, NN1, x21,x22,x23,0);
625+TESTINST3("subs x21,x22,w23,sxth #1", NN2, NN3, x21,x22,x23,0);
626+TESTINST3("subs x21,x22,w23,sxth #2", NN4, NN5, x21,x22,x23,0);
627+TESTINST3("subs x21,x22,w23,sxth #3", NN6, NN7, x21,x22,x23,0);
628+TESTINST3("subs x21,x22,w23,sxth #4", NN8, NN9, x21,x22,x23,0);
629+
630+TESTINST3("subs x21,x22,w23,sxtw #0", NN0, NN1, x21,x22,x23,0);
631+TESTINST3("subs x21,x22,w23,sxtw #1", NN2, NN3, x21,x22,x23,0);
632+TESTINST3("subs x21,x22,w23,sxtw #2", NN4, NN5, x21,x22,x23,0);
633+TESTINST3("subs x21,x22,w23,sxtw #3", NN6, NN7, x21,x22,x23,0);
634+TESTINST3("subs x21,x22,w23,sxtw #4", NN8, NN9, x21,x22,x23,0);
635+
636+TESTINST3("subs x21,x22,w23,sxtx #0", NN0, NN1, x21,x22,x23,0);
637+TESTINST3("subs x21,x22,w23,sxtx #1", NN2, NN3, x21,x22,x23,0);
638+TESTINST3("subs x21,x22,w23,sxtx #2", NN4, NN5, x21,x22,x23,0);
639+TESTINST3("subs x21,x22,w23,sxtx #3", NN6, NN7, x21,x22,x23,0);
640+TESTINST3("subs x21,x22,w23,sxtx #4", NN8, NN9, x21,x22,x23,0);
641
642
643 ////////////////////////////////////////////////////////////////
diff --git a/recipes-devtools/valgrind/valgrind/builtin_setjmp.patch b/recipes-devtools/valgrind/valgrind/builtin_setjmp.patch
index 04b198d..daa22da 100644
--- a/recipes-devtools/valgrind/valgrind/builtin_setjmp.patch
+++ b/recipes-devtools/valgrind/valgrind/builtin_setjmp.patch
@@ -1,3 +1,12 @@
1Author: Bernhard Rosenkraenzer <bernhard.rosenkraenzer.ext@huawei.com>
2
3Implement VG_MINIMAL_SETJMP in inline assembly for OHOS/arm64
4
5Signed-off-by: Bernhard Rosenkraenzer <bernhard.rosenkraenzer.ext@huawei.com>
6Upstream-Status: Pending
7
8Based on patch from Android NDK:
9
1commit cebc9a058d2048e8233ee3eeb510e19b8772909f 10commit cebc9a058d2048e8233ee3eeb510e19b8772909f
2Author: Benoit Jacob <benoitjacob@google.com> 11Author: Benoit Jacob <benoitjacob@google.com>
3Date: Wed May 29 21:15:53 2019 -0400 12Date: Wed May 29 21:15:53 2019 -0400
@@ -10,7 +19,7 @@ diff --git a/include/pub_tool_libcsetjmp.h b/include/pub_tool_libcsetjmp.h
10index 681450cef..ccdf295df 100644 19index 681450cef..ccdf295df 100644
11--- a/include/pub_tool_libcsetjmp.h 20--- a/include/pub_tool_libcsetjmp.h
12+++ b/include/pub_tool_libcsetjmp.h 21+++ b/include/pub_tool_libcsetjmp.h
13@@ -126,6 +126,111 @@ UWord VG_MINIMAL_SETJMP(VG_MINIMAL_JMP_BUF(_env)); 22@@ -126,6 +126,93 @@ UWord VG_MINIMAL_SETJMP(VG_MINIMAL_JMP_BUF(_env));
14 __attribute__((noreturn)) 23 __attribute__((noreturn))
15 void VG_MINIMAL_LONGJMP(VG_MINIMAL_JMP_BUF(_env)); 24 void VG_MINIMAL_LONGJMP(VG_MINIMAL_JMP_BUF(_env));
16 25
@@ -80,43 +89,25 @@ index 681450cef..ccdf295df 100644
80+ return 0; 89+ return 0;
81+} 90+}
82+ 91+
83+__attribute__((noreturn)) 92+#define VG_MINIMAL_LONGJMP(x) \
84+inline void VG_MINIMAL_LONGJMP(VG_MINIMAL_JMP_BUF(_env)) 93+{ \
85+{ 94+ asm volatile( \
86+ asm volatile( 95+ " ldp x19, x20, [%[_env], 0] \n" \
87+ // Loads to match the stores in the above setjmp implementation. 96+ " ldp x21, x22, [%[_env], 0x10] \n" \
88+ " ldp x19, x20, [%[_env], 0] \n" 97+ " ldp x23, x24, [%[_env], 0x20] \n" \
89+ " ldp x21, x22, [%[_env], 0x10] \n" 98+ " ldp x25, x26, [%[_env], 0x30] \n" \
90+ " ldp x23, x24, [%[_env], 0x20] \n" 99+ " ldp x27, x28, [%[_env], 0x40] \n" \
91+ " ldp x25, x26, [%[_env], 0x30] \n" 100+ " ldp x29, x30, [%[_env], 0x50] \n" \
92+ " ldp x27, x28, [%[_env], 0x40] \n" 101+ " ldr x9, [%[_env], 0x60] \n" \
93+ " ldp x29, x30, [%[_env], 0x50] \n" 102+ " mov sp, x9 \n" \
94+ " ldr x9, [%[_env], 0x60] \n" 103+ " mov x0, 1 \n" \
95+ " mov sp, x9 \n" 104+ " ret \n" \
96+ // return as setjmp for the second time, returning 1. 105+ : \
97+ // Since we have loaded the link register x30 from the saved buffer 106+ : \
98+ // that was set by the above setjmp implementation, the 'ret' instruction 107+ [_env]"r"(x) \
99+ // here is going to return to where setjmp was called. 108+ : \
100+ // Per the setjmp/longjmp contract, that pseudo second returning 109+ "x9"); \
101+ // of setjmp should return the value 1. 110+ __builtin_unreachable(); \
102+ // x0 is holds the integer return value.
103+ " mov x0, 1 \n"
104+ " ret \n"
105+ :
106+ // No outputs
107+ :
108+ // Inputs
109+ [_env]"r"(_env)
110+ :
111+ // Clobbers.
112+ // We have used x9 as a temporary
113+ "x9");
114+
115+ // This statement is unreachable because the above asm statement
116+ // unconditionally does a 'ret' instruction. The purpose of this
117+ // statement is to silence clang warnings about this function returning
118+ // while having the 'noreturn' attribute.
119+ __builtin_unreachable();
120+} 111+}
121+ 112+
122 #else 113 #else
diff --git a/recipes-devtools/valgrind/valgrind_%.bbappend b/recipes-devtools/valgrind/valgrind_%.bbappend
index def33ce..2138014 100644
--- a/recipes-devtools/valgrind/valgrind_%.bbappend
+++ b/recipes-devtools/valgrind/valgrind_%.bbappend
@@ -1,2 +1,3 @@
1FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" 1FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
2SRC_URI_append = " file://builtin_setjmp.patch" 2SRC_URI_append = " file://builtin_setjmp.patch \
3 file://aarch64-inline-asm-clang.patch"
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-05-13 07:35:36 +0000