CPU Isolation The level of feature support is target specific. Look up the Feature Compatibility Matrix to see how your target supports this feature. CPU isolation CPU isolation isolation facilitates predictable task scheduling, hence real-time properties, by protecting SMP SMP CPUs CPU from being disturbed by unnecessary interrupts and unwanted tasks. The isolated CPUs are granted a tickless environment, and are excluded from load balancing. Any CPU except for CPU 0 can be isolated. Depending on the capabilities of the kernel for the specific target, the isolated CPUs can obtain a tickless or nearly tickless environment. A tickless environment means that isolated CPUs get no ticks at all (0 Hz). Nearly tickless environment means that isolated CPUs are still disturbed by ticks once a second (1 Hz). The CPU isolation process involves several steps until a CPU is fully isolated. Enea Linux simplifies this process for you by implementing in the distribution kernel patching and configuration, and providing a script that performs the partitioning in runtime. Install partrt in Enea Linux Load and boot Enea Linux on target as described in the Target Guide, but also add the boot parameters isolcpus isolcpus and nohz nohz telling which CPUs to isolate. If booted by U-Boot: setenv bootargs <other params> isolcpus=2,3 nohz_full=2,3 If booted by PXE: append <other params> isolcpus=2,3 nohz_full=2,3 After booting the Linux kernel, execute the partrt partrt script to create real-time partitions for the isolated CPUs. Each CPU is coded as a binary number. The argument to partrt is an OR-ed bit mask of the CPU/s to add to the real-time partition, here 01002 (CPU 2) OR 10002 (CPU 3) = 11002 (0xc). $ partrt create 0xc CPUs 2 and 3 now provide an optimal real-time environment for your application.