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| author | C.R. Guo <chunrong.guo@nxp.com> | 2018-03-07 14:40:38 +0800 |
|---|---|---|
| committer | Otavio Salvador <otavio@ossystems.com.br> | 2018-03-15 09:50:54 -0300 |
| commit | e0518234f9ac3e46755e931c341646cfd9cb6ae2 (patch) | |
| tree | 7d26286b5b9f5752cfe4abc942719a9de500541c | |
| parent | 65cdeeb466ee5be1c5ffff9f8f838c31d52835b5 (diff) | |
| download | meta-freescale-e0518234f9ac3e46755e931c341646cfd9cb6ae2.tar.gz | |
t4240rdb: add machine config
Signed-off-by: Chunrong Guo <chunrong.guo@nxp.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| -rw-r--r-- | conf/machine/t4240rdb.conf | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/conf/machine/t4240rdb.conf b/conf/machine/t4240rdb.conf new file mode 100644 index 000000000..160220f40 --- /dev/null +++ b/conf/machine/t4240rdb.conf | |||
| @@ -0,0 +1,24 @@ | |||
| 1 | #@TYPE: Machine | ||
| 2 | #@NAME: NXP T4240RDB | ||
| 3 | #@SOC: t4240 | ||
| 4 | #@DESCRIPTION: Machine configuration for NXP QorIQ T4240 Reference | ||
| 5 | # Design Board with ppce6500 core in 32b mode | ||
| 6 | #@MAINTAINER: Chunrong Guo <chunrong.guo@nxp.com> | ||
| 7 | |||
| 8 | require conf/machine/include/e6500.inc | ||
| 9 | |||
| 10 | SOC_FAMILY = "t4:t4240" | ||
| 11 | |||
| 12 | UBOOT_CONFIG ??= "nor" | ||
| 13 | UBOOT_CONFIG[nor] = "T4240RDB_config" | ||
| 14 | |||
| 15 | HV_CFG_M = "t4240rdb" | ||
| 16 | |||
| 17 | KERNEL_DEVICETREE ?= "t4240rdb.dtb" | ||
| 18 | KERNEL_DEFCONFIG ?= "corenet64_smp_defconfig" | ||
| 19 | |||
| 20 | JFFS2_ERASEBLOCK = "0x10000" | ||
| 21 | |||
| 22 | EXTRA_IMAGEDEPENDS += "fm-ucode rcw" | ||
| 23 | |||
| 24 | USE_VT ?= "0" | ||
