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authorOtavio Salvador <otavio@ossystems.com.br>2013-04-08 17:56:33 +0000
committerGerrit Code Review <gerrit2@code.ossystems.com.br>2013-04-08 17:56:33 +0000
commit646fc44d54c387d88bb6a245b89c5bac80fca8d1 (patch)
treec5be2ce00ee333a4381c884fc3c2b50312392b55
parent1841b014f3a8e4cc49f0d6603a0cc3aa8a6f91e3 (diff)
parentea6848fca73128a3e39c4488145cb306e43d5c47 (diff)
downloadmeta-fsl-arm-646fc44d54c387d88bb6a245b89c5bac80fca8d1.tar.gz
Merge "linux-imx: Cleanup recipe as SabreLITE machine has been moved"
Diffstat
-rw-r--r--recipes-kernel/linux/linux-imx-3.0.35/imx6qsabrelite/defconfig272
-rw-r--r--recipes-kernel/linux/linux-imx-3.0.35/imx6qsabrelite/sync-boundary-changes.patch7473
-rw-r--r--recipes-kernel/linux/linux-imx_3.0.35.bb3
3 files changed, 0 insertions, 7748 deletions
diff --git a/recipes-kernel/linux/linux-imx-3.0.35/imx6qsabrelite/defconfig b/recipes-kernel/linux/linux-imx-3.0.35/imx6qsabrelite/defconfig
deleted file mode 100644
index 632fb3a..0000000
--- a/recipes-kernel/linux/linux-imx-3.0.35/imx6qsabrelite/defconfig
+++ /dev/null
@@ -1,272 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y
3CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_BLK_DEV_INITRD=y
7CONFIG_EMBEDDED=y
8CONFIG_PERF_EVENTS=y
9CONFIG_MODULES=y
10CONFIG_MODULE_UNLOAD=y
11CONFIG_MODULE_FORCE_UNLOAD=y
12CONFIG_MODVERSIONS=y
13# CONFIG_BLK_DEV_BSG is not set
14CONFIG_ARCH_MXC=y
15CONFIG_GPIO_PCA953X=y
16CONFIG_ARCH_MX6=y
17CONFIG_FORCE_MAX_ZONEORDER=14
18CONFIG_MACH_MX6Q_SABRELITE=y
19CONFIG_IMX_PCIE=y
20CONFIG_USB_EHCI_ARC_H1=y
21CONFIG_MXC_PWM=y
22CONFIG_MXC_REBOOT_MFGMODE=y
23CONFIG_CLK_DEBUG=y
24CONFIG_DMA_ZONE_SIZE=184
25# CONFIG_SWP_EMULATE is not set
26CONFIG_ARM_ERRATA_743622=y
27CONFIG_ARM_ERRATA_751472=y
28CONFIG_ARM_ERRATA_754322=y
29CONFIG_ARM_ERRATA_764369=y
30CONFIG_NO_HZ=y
31CONFIG_HIGH_RES_TIMERS=y
32CONFIG_SMP=y
33CONFIG_VMSPLIT_2G=y
34CONFIG_PREEMPT=y
35CONFIG_AEABI=y
36# CONFIG_OABI_COMPAT is not set
37CONFIG_HIGHMEM=y
38CONFIG_COMPACTION=y
39CONFIG_KSM=y
40CONFIG_ZBOOT_ROM_TEXT=0x0
41CONFIG_ZBOOT_ROM_BSS=0x0
42CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off"
43CONFIG_CPU_FREQ=y
44CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
45CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
46CONFIG_CPU_FREQ_GOV_POWERSAVE=y
47CONFIG_CPU_FREQ_GOV_USERSPACE=y
48CONFIG_CPU_FREQ_GOV_ONDEMAND=y
49CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
50CONFIG_CPU_FREQ_IMX=y
51CONFIG_VFP=y
52CONFIG_NEON=y
53# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
54CONFIG_SUSPEND_DEVICE_TIME_DEBUG=y
55CONFIG_PM_RUNTIME=y
56CONFIG_PM_DEBUG=y
57CONFIG_APM_EMULATION=y
58CONFIG_NET=y
59CONFIG_PACKET=y
60CONFIG_UNIX=y
61CONFIG_INET=y
62CONFIG_IP_MULTICAST=y
63CONFIG_IP_PNP=y
64CONFIG_IP_PNP_DHCP=y
65CONFIG_IP_PNP_BOOTP=y
66# CONFIG_INET_LRO is not set
67# CONFIG_IPV6 is not set
68CONFIG_NETFILTER=y
69CONFIG_LLC2=y
70CONFIG_CAN=y
71CONFIG_CAN_RAW=y
72CONFIG_CAN_BCM=y
73CONFIG_CAN_VCAN=y
74CONFIG_CAN_FLEXCAN=y
75CONFIG_BT=y
76CONFIG_BT_L2CAP=y
77CONFIG_BT_SCO=y
78CONFIG_BT_RFCOMM=y
79CONFIG_BT_RFCOMM_TTY=y
80CONFIG_BT_BNEP=y
81CONFIG_BT_BNEP_MC_FILTER=y
82CONFIG_BT_BNEP_PROTO_FILTER=y
83CONFIG_BT_HIDP=y
84CONFIG_BT_HCIUART=y
85CONFIG_BT_HCIUART_LL=y
86CONFIG_CFG80211=y
87CONFIG_MAC80211=y
88CONFIG_RFKILL=y
89CONFIG_RFKILL_INPUT=y
90CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
91CONFIG_DEVTMPFS=y
92CONFIG_DEVTMPFS_MOUNT=y
93CONFIG_CONNECTOR=y
94CONFIG_MTD=y
95CONFIG_MTD_CMDLINE_PARTS=y
96CONFIG_MTD_CHAR=y
97CONFIG_MTD_BLOCK=y
98CONFIG_MTD_M25P80=y
99CONFIG_MTD_NAND=y
100CONFIG_MTD_UBI=y
101CONFIG_BLK_DEV_LOOP=y
102CONFIG_MISC_DEVICES=y
103CONFIG_MXS_PERFMON=m
104CONFIG_BLK_DEV_SD=y
105CONFIG_SCSI_MULTI_LUN=y
106CONFIG_ATA=y
107# CONFIG_SATA_PMP is not set
108CONFIG_SATA_AHCI_PLATFORM=y
109CONFIG_NETDEVICES=y
110CONFIG_TUN=y
111CONFIG_MII=y
112CONFIG_MICREL_PHY=y
113CONFIG_NET_ETHERNET=y
114CONFIG_FEC_NAPI=y
115# CONFIG_NETDEV_1000 is not set
116# CONFIG_NETDEV_10000 is not set
117CONFIG_HOSTAP=y
118CONFIG_WL12XX_MENU=y
119CONFIG_WL12XX=y
120CONFIG_WL12XX_SDIO=m
121CONFIG_INPUT_POLLDEV=y
122CONFIG_INPUT_EVDEV=y
123CONFIG_KEYBOARD_GPIO=y
124# CONFIG_INPUT_MOUSE is not set
125CONFIG_INPUT_TOUCHSCREEN=y
126CONFIG_TOUCHSCREEN_EGALAX=y
127CONFIG_TOUCHSCREEN_FT5X06=y
128CONFIG_TOUCHSCREEN_FT5X06_SINGLE_TOUCH=y
129CONFIG_TOUCHSCREEN_TSC2004=y
130CONFIG_INPUT_MISC=y
131CONFIG_INPUT_UINPUT=y
132CONFIG_INPUT_ISL29023=y
133CONFIG_VT_HW_CONSOLE_BINDING=y
134CONFIG_SERIAL_IMX=y
135CONFIG_SERIAL_IMX_CONSOLE=y
136CONFIG_FSL_OTP=y
137CONFIG_HW_RANDOM=y
138CONFIG_MXS_VIIM=y
139CONFIG_I2C_CHARDEV=y
140CONFIG_I2C_IMX=y
141CONFIG_SPI=y
142CONFIG_SPI_IMX=y
143CONFIG_GPIO_SYSFS=y
144CONFIG_SENSORS_MAX17135=y
145CONFIG_SENSORS_MAG3110=y
146# CONFIG_MXC_MMA8450 is not set
147CONFIG_WATCHDOG=y
148CONFIG_WATCHDOG_NOWAYOUT=y
149CONFIG_IMX2_WDT=y
150CONFIG_MFD_WM8994=y
151CONFIG_MFD_PFUZE=y
152CONFIG_MFD_MAX17135=y
153CONFIG_REGULATOR=y
154CONFIG_REGULATOR_FIXED_VOLTAGE=y
155CONFIG_REGULATOR_PFUZE100=y
156CONFIG_REGULATOR_MAX17135=y
157CONFIG_MEDIA_SUPPORT=y
158CONFIG_VIDEO_DEV=y
159# CONFIG_RC_CORE is not set
160# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
161CONFIG_VIDEO_MXC_CAMERA=m
162CONFIG_MXC_CAMERA_OV5642=m
163CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m
164CONFIG_USB_VIDEO_CLASS=m
165# CONFIG_RADIO_ADAPTERS is not set
166CONFIG_DRM=m
167CONFIG_DRM_VIVANTE=m
168CONFIG_FB=y
169CONFIG_BACKLIGHT_LCD_SUPPORT=y
170# CONFIG_LCD_CLASS_DEVICE is not set
171CONFIG_BACKLIGHT_CLASS_DEVICE=y
172# CONFIG_BACKLIGHT_GENERIC is not set
173CONFIG_BACKLIGHT_PWM=y
174CONFIG_FB_MXC_LDB=y
175CONFIG_FB_MXC_MIPI_DSI=y
176CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y
177CONFIG_FB_MXC_HDMI=y
178CONFIG_FRAMEBUFFER_CONSOLE=y
179CONFIG_FONTS=y
180CONFIG_FONT_8x16=y
181CONFIG_LOGO=y
182CONFIG_SOUND=y
183CONFIG_SND=y
184CONFIG_SND_USB_AUDIO=y
185CONFIG_SND_SOC=y
186CONFIG_SND_IMX_SOC=y
187CONFIG_SND_SOC_IMX_SGTL5000=y
188CONFIG_SND_SOC_IMX_SPDIF=y
189CONFIG_SND_SOC_IMX_HDMI=y
190CONFIG_HIDRAW=y
191CONFIG_HID_QUANTA=y
192CONFIG_HID_SAMSUNG=m
193CONFIG_HID_SONY=m
194CONFIG_HID_SUNPLUS=m
195CONFIG_USB=y
196CONFIG_USB_DEVICEFS=y
197# CONFIG_USB_DEVICE_CLASS is not set
198CONFIG_USB_SUSPEND=y
199# CONFIG_USB_OTG_WHITELIST is not set
200CONFIG_USB_EHCI_HCD=y
201CONFIG_USB_EHCI_ARC=y
202CONFIG_USB_EHCI_ROOT_HUB_TT=y
203# CONFIG_USB_EHCI_TT_NEWSCHED is not set
204CONFIG_USB_ACM=y
205CONFIG_USB_STORAGE=y
206CONFIG_USB_SERIAL=y
207CONFIG_USB_SERIAL_QUALCOMM=y
208CONFIG_USB_SERIAL_OPTION=y
209CONFIG_USB_GADGET=y
210CONFIG_USB_FILE_STORAGE=m
211CONFIG_USB_G_SERIAL=m
212CONFIG_MXC_OTG=y
213CONFIG_MMC=y
214CONFIG_MMC_UNSAFE_RESUME=y
215CONFIG_MMC_SDHCI=y
216CONFIG_MMC_SDHCI_PLTFM=y
217CONFIG_MMC_SDHCI_ESDHC_IMX=y
218CONFIG_NEW_LEDS=y
219CONFIG_LEDS_CLASS=y
220CONFIG_LEDS_GPIO=y
221CONFIG_LEDS_TRIGGERS=y
222CONFIG_LEDS_TRIGGER_GPIO=y
223CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
224CONFIG_RTC_CLASS=y
225CONFIG_RTC_INTF_DEV_UIE_EMUL=y
226CONFIG_RTC_DRV_SNVS=y
227CONFIG_DMADEVICES=y
228CONFIG_MXC_PXP_V2=y
229CONFIG_IMX_SDMA=y
230CONFIG_MXC_IPU=y
231# CONFIG_MXC_HMP4E is not set
232# CONFIG_MXC_HWEVENT is not set
233CONFIG_MXC_ASRC=y
234CONFIG_MXC_GPU_VIV=y
235CONFIG_MXC_MIPI_CSI2=y
236CONFIG_EXT2_FS=y
237CONFIG_EXT3_FS=y
238# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
239CONFIG_EXT4_FS=y
240CONFIG_AUTOFS4_FS=y
241CONFIG_MSDOS_FS=y
242CONFIG_VFAT_FS=y
243CONFIG_TMPFS=y
244CONFIG_JFFS2_FS=y
245CONFIG_UBIFS_FS=y
246CONFIG_CRAMFS=y
247CONFIG_NFS_FS=y
248CONFIG_NFS_V3=y
249CONFIG_ROOT_NFS=y
250CONFIG_PARTITION_ADVANCED=y
251CONFIG_EFI_PARTITION=y
252CONFIG_NLS_CODEPAGE_437=y
253CONFIG_NLS_ASCII=m
254CONFIG_NLS_ISO8859_1=y
255CONFIG_NLS_UTF8=m
256CONFIG_MAGIC_SYSRQ=y
257CONFIG_DEBUG_FS=y
258CONFIG_SYSCTL_SYSCALL_CHECK=y
259# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
260CONFIG_CRYPTO_TEST=m
261CONFIG_CRYPTO_CCM=y
262CONFIG_CRYPTO_GCM=y
263CONFIG_CRYPTO_CBC=y
264CONFIG_CRYPTO_CTS=y
265CONFIG_CRYPTO_LRW=y
266CONFIG_CRYPTO_PCBC=y
267CONFIG_CRYPTO_XTS=y
268CONFIG_CRYPTO_DES=y
269# CONFIG_CRYPTO_ANSI_CPRNG is not set
270CONFIG_CRYPTO_DEV_FSL_CAAM=y
271# CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API is not set
272CONFIG_CRC_CCITT=m
diff --git a/recipes-kernel/linux/linux-imx-3.0.35/imx6qsabrelite/sync-boundary-changes.patch b/recipes-kernel/linux/linux-imx-3.0.35/imx6qsabrelite/sync-boundary-changes.patch
deleted file mode 100644
index 91f5b2a..0000000
--- a/recipes-kernel/linux/linux-imx-3.0.35/imx6qsabrelite/sync-boundary-changes.patch
+++ /dev/null
@@ -1,7473 +0,0 @@
1diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
2old mode 100755
3new mode 100644
4diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
5old mode 100755
6new mode 100644
7diff --git a/arch/arm/configs/imx5_defconfig b/arch/arm/configs/imx5_defconfig
8old mode 100755
9new mode 100644
10diff --git a/arch/arm/configs/nitrogen6x_defconfig b/arch/arm/configs/nitrogen6x_defconfig
11new file mode 100644
12index 0000000..dfb067c
13--- /dev/null
14+++ b/arch/arm/configs/nitrogen6x_defconfig
15@@ -0,0 +1,3092 @@
16+#
17+# Automatically generated make config: don't edit
18+# Linux/arm 3.0.35 Kernel Configuration
19+#
20+CONFIG_ARM=y
21+CONFIG_HAVE_PWM=y
22+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
23+CONFIG_HAVE_SCHED_CLOCK=y
24+CONFIG_GENERIC_GPIO=y
25+# CONFIG_ARCH_USES_GETTIMEOFFSET is not set
26+CONFIG_GENERIC_CLOCKEVENTS=y
27+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
28+CONFIG_KTIME_SCALAR=y
29+CONFIG_HAVE_PROC_CPU=y
30+CONFIG_STACKTRACE_SUPPORT=y
31+CONFIG_LOCKDEP_SUPPORT=y
32+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
33+CONFIG_HARDIRQS_SW_RESEND=y
34+CONFIG_GENERIC_IRQ_PROBE=y
35+CONFIG_GENERIC_LOCKBREAK=y
36+CONFIG_RWSEM_GENERIC_SPINLOCK=y
37+CONFIG_ARCH_HAS_CPUFREQ=y
38+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
39+CONFIG_GENERIC_HWEIGHT=y
40+CONFIG_GENERIC_CALIBRATE_DELAY=y
41+CONFIG_ZONE_DMA=y
42+CONFIG_NEED_DMA_MAP_STATE=y
43+CONFIG_FIQ=y
44+CONFIG_VECTORS_BASE=0xffff0000
45+# CONFIG_ARM_PATCH_PHYS_VIRT is not set
46+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
47+CONFIG_HAVE_IRQ_WORK=y
48+CONFIG_IRQ_WORK=y
49+
50+#
51+# General setup
52+#
53+CONFIG_EXPERIMENTAL=y
54+CONFIG_INIT_ENV_ARG_LIMIT=32
55+CONFIG_CROSS_COMPILE=""
56+CONFIG_LOCALVERSION=""
57+CONFIG_LOCALVERSION_AUTO=y
58+CONFIG_HAVE_KERNEL_GZIP=y
59+CONFIG_HAVE_KERNEL_LZMA=y
60+CONFIG_HAVE_KERNEL_LZO=y
61+CONFIG_KERNEL_GZIP=y
62+# CONFIG_KERNEL_LZMA is not set
63+# CONFIG_KERNEL_LZO is not set
64+CONFIG_DEFAULT_HOSTNAME="(none)"
65+CONFIG_SWAP=y
66+CONFIG_SYSVIPC=y
67+CONFIG_SYSVIPC_SYSCTL=y
68+# CONFIG_POSIX_MQUEUE is not set
69+# CONFIG_BSD_PROCESS_ACCT is not set
70+# CONFIG_FHANDLE is not set
71+# CONFIG_TASKSTATS is not set
72+# CONFIG_AUDIT is not set
73+CONFIG_HAVE_GENERIC_HARDIRQS=y
74+
75+#
76+# IRQ subsystem
77+#
78+CONFIG_GENERIC_HARDIRQS=y
79+CONFIG_HAVE_SPARSE_IRQ=y
80+CONFIG_GENERIC_IRQ_SHOW=y
81+# CONFIG_SPARSE_IRQ is not set
82+
83+#
84+# RCU Subsystem
85+#
86+CONFIG_TREE_PREEMPT_RCU=y
87+CONFIG_PREEMPT_RCU=y
88+# CONFIG_RCU_TRACE is not set
89+CONFIG_RCU_FANOUT=32
90+# CONFIG_RCU_FANOUT_EXACT is not set
91+# CONFIG_TREE_RCU_TRACE is not set
92+# CONFIG_RCU_BOOST is not set
93+CONFIG_IKCONFIG=y
94+CONFIG_IKCONFIG_PROC=y
95+CONFIG_LOG_BUF_SHIFT=14
96+# CONFIG_CGROUPS is not set
97+# CONFIG_NAMESPACES is not set
98+# CONFIG_SCHED_AUTOGROUP is not set
99+# CONFIG_SYSFS_DEPRECATED is not set
100+# CONFIG_RELAY is not set
101+CONFIG_BLK_DEV_INITRD=y
102+CONFIG_INITRAMFS_SOURCE=""
103+CONFIG_RD_GZIP=y
104+# CONFIG_RD_BZIP2 is not set
105+# CONFIG_RD_LZMA is not set
106+# CONFIG_RD_XZ is not set
107+# CONFIG_RD_LZO is not set
108+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
109+CONFIG_SYSCTL=y
110+CONFIG_ANON_INODES=y
111+CONFIG_EXPERT=y
112+CONFIG_UID16=y
113+CONFIG_SYSCTL_SYSCALL=y
114+CONFIG_KALLSYMS=y
115+CONFIG_HOTPLUG=y
116+CONFIG_PRINTK=y
117+CONFIG_BUG=y
118+CONFIG_ELF_CORE=y
119+CONFIG_BASE_FULL=y
120+CONFIG_FUTEX=y
121+CONFIG_EPOLL=y
122+CONFIG_SIGNALFD=y
123+CONFIG_TIMERFD=y
124+CONFIG_EVENTFD=y
125+CONFIG_SHMEM=y
126+CONFIG_AIO=y
127+CONFIG_EMBEDDED=y
128+CONFIG_HAVE_PERF_EVENTS=y
129+CONFIG_PERF_USE_VMALLOC=y
130+
131+#
132+# Kernel Performance Events And Counters
133+#
134+CONFIG_PERF_EVENTS=y
135+# CONFIG_PERF_COUNTERS is not set
136+CONFIG_VM_EVENT_COUNTERS=y
137+CONFIG_PCI_QUIRKS=y
138+CONFIG_SLUB_DEBUG=y
139+CONFIG_COMPAT_BRK=y
140+# CONFIG_SLAB is not set
141+CONFIG_SLUB=y
142+# CONFIG_SLOB is not set
143+# CONFIG_PROFILING is not set
144+CONFIG_HAVE_OPROFILE=y
145+# CONFIG_KPROBES is not set
146+CONFIG_HAVE_KPROBES=y
147+CONFIG_HAVE_KRETPROBES=y
148+CONFIG_USE_GENERIC_SMP_HELPERS=y
149+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
150+CONFIG_HAVE_CLK=y
151+CONFIG_HAVE_DMA_API_DEBUG=y
152+CONFIG_HAVE_HW_BREAKPOINT=y
153+
154+#
155+# GCOV-based kernel profiling
156+#
157+# CONFIG_GCOV_KERNEL is not set
158+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
159+CONFIG_SLABINFO=y
160+CONFIG_RT_MUTEXES=y
161+CONFIG_BASE_SMALL=0
162+CONFIG_MODULES=y
163+# CONFIG_MODULE_FORCE_LOAD is not set
164+CONFIG_MODULE_UNLOAD=y
165+CONFIG_MODULE_FORCE_UNLOAD=y
166+CONFIG_MODVERSIONS=y
167+# CONFIG_MODULE_SRCVERSION_ALL is not set
168+CONFIG_STOP_MACHINE=y
169+CONFIG_BLOCK=y
170+CONFIG_LBDAF=y
171+# CONFIG_BLK_DEV_BSG is not set
172+# CONFIG_BLK_DEV_INTEGRITY is not set
173+
174+#
175+# IO Schedulers
176+#
177+CONFIG_IOSCHED_NOOP=y
178+CONFIG_IOSCHED_DEADLINE=y
179+CONFIG_IOSCHED_CFQ=y
180+# CONFIG_DEFAULT_DEADLINE is not set
181+CONFIG_DEFAULT_CFQ=y
182+# CONFIG_DEFAULT_NOOP is not set
183+CONFIG_DEFAULT_IOSCHED="cfq"
184+# CONFIG_INLINE_SPIN_TRYLOCK is not set
185+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
186+# CONFIG_INLINE_SPIN_LOCK is not set
187+# CONFIG_INLINE_SPIN_LOCK_BH is not set
188+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
189+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
190+# CONFIG_INLINE_SPIN_UNLOCK is not set
191+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
192+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
193+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
194+# CONFIG_INLINE_READ_TRYLOCK is not set
195+# CONFIG_INLINE_READ_LOCK is not set
196+# CONFIG_INLINE_READ_LOCK_BH is not set
197+# CONFIG_INLINE_READ_LOCK_IRQ is not set
198+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
199+# CONFIG_INLINE_READ_UNLOCK is not set
200+# CONFIG_INLINE_READ_UNLOCK_BH is not set
201+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
202+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
203+# CONFIG_INLINE_WRITE_TRYLOCK is not set
204+# CONFIG_INLINE_WRITE_LOCK is not set
205+# CONFIG_INLINE_WRITE_LOCK_BH is not set
206+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
207+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
208+# CONFIG_INLINE_WRITE_UNLOCK is not set
209+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
210+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
211+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
212+CONFIG_MUTEX_SPIN_ON_OWNER=y
213+CONFIG_FREEZER=y
214+
215+#
216+# System Type
217+#
218+CONFIG_MMU=y
219+# CONFIG_ARCH_INTEGRATOR is not set
220+# CONFIG_ARCH_REALVIEW is not set
221+# CONFIG_ARCH_VERSATILE is not set
222+# CONFIG_ARCH_VEXPRESS is not set
223+# CONFIG_ARCH_AT91 is not set
224+# CONFIG_ARCH_BCMRING is not set
225+# CONFIG_ARCH_CLPS711X is not set
226+# CONFIG_ARCH_CNS3XXX is not set
227+# CONFIG_ARCH_GEMINI is not set
228+# CONFIG_ARCH_EBSA110 is not set
229+# CONFIG_ARCH_EP93XX is not set
230+# CONFIG_ARCH_FOOTBRIDGE is not set
231+CONFIG_ARCH_MXC=y
232+# CONFIG_ARCH_MXS is not set
233+# CONFIG_ARCH_NETX is not set
234+# CONFIG_ARCH_H720X is not set
235+# CONFIG_ARCH_IOP13XX is not set
236+# CONFIG_ARCH_IOP32X is not set
237+# CONFIG_ARCH_IOP33X is not set
238+# CONFIG_ARCH_IXP23XX is not set
239+# CONFIG_ARCH_IXP2000 is not set
240+# CONFIG_ARCH_IXP4XX is not set
241+# CONFIG_ARCH_DOVE is not set
242+# CONFIG_ARCH_KIRKWOOD is not set
243+# CONFIG_ARCH_LOKI is not set
244+# CONFIG_ARCH_LPC32XX is not set
245+# CONFIG_ARCH_MV78XX0 is not set
246+# CONFIG_ARCH_ORION5X is not set
247+# CONFIG_ARCH_MMP is not set
248+# CONFIG_ARCH_KS8695 is not set
249+# CONFIG_ARCH_W90X900 is not set
250+# CONFIG_ARCH_NUC93X is not set
251+# CONFIG_ARCH_TEGRA is not set
252+# CONFIG_ARCH_PNX4008 is not set
253+# CONFIG_ARCH_PXA is not set
254+# CONFIG_ARCH_MSM is not set
255+# CONFIG_ARCH_SHMOBILE is not set
256+# CONFIG_ARCH_RPC is not set
257+# CONFIG_ARCH_SA1100 is not set
258+# CONFIG_ARCH_S3C2410 is not set
259+# CONFIG_ARCH_S3C64XX is not set
260+# CONFIG_ARCH_S5P64X0 is not set
261+# CONFIG_ARCH_S5PC100 is not set
262+# CONFIG_ARCH_S5PV210 is not set
263+# CONFIG_ARCH_EXYNOS4 is not set
264+# CONFIG_ARCH_SHARK is not set
265+# CONFIG_ARCH_TCC_926 is not set
266+# CONFIG_ARCH_U300 is not set
267+# CONFIG_ARCH_U8500 is not set
268+# CONFIG_ARCH_NOMADIK is not set
269+# CONFIG_ARCH_DAVINCI is not set
270+# CONFIG_ARCH_OMAP is not set
271+# CONFIG_PLAT_SPEAR is not set
272+# CONFIG_ARCH_VT8500 is not set
273+CONFIG_GPIO_PCA953X=y
274+# CONFIG_KEYBOARD_GPIO_POLLED is not set
275+CONFIG_IMX_HAVE_PLATFORM_DMA=y
276+CONFIG_IMX_HAVE_PLATFORM_FEC=y
277+CONFIG_IMX_HAVE_PLATFORM_FLEXCAN=y
278+CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC=y
279+CONFIG_IMX_HAVE_PLATFORM_GPMI_NFC=y
280+CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT=y
281+CONFIG_IMX_HAVE_PLATFORM_IMX_SNVS_RTC=y
282+CONFIG_IMX_HAVE_PLATFORM_IMX_CAAM=y
283+CONFIG_IMX_HAVE_PLATFORM_IMX_I2C=y
284+CONFIG_IMX_HAVE_PLATFORM_IMX_SSI=y
285+CONFIG_IMX_HAVE_PLATFORM_IMX_UART=y
286+CONFIG_IMX_HAVE_PLATFORM_MXC_EHCI=y
287+CONFIG_IMX_HAVE_PLATFORM_MXC_PWM=y
288+CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX=y
289+CONFIG_IMX_HAVE_PLATFORM_SPI_IMX=y
290+CONFIG_IMX_HAVE_PLATFORM_IMX_IPUV3=y
291+CONFIG_IMX_HAVE_PLATFORM_IMX_VPU=y
292+CONFIG_IMX_HAVE_PLATFORM_IMX_DVFS=y
293+CONFIG_IMX_HAVE_PLATFORM_AHCI=y
294+CONFIG_IMX_HAVE_PLATFORM_IMX_OCOTP=y
295+CONFIG_IMX_HAVE_PLATFORM_IMX_VIIM=y
296+CONFIG_IMX_HAVE_PLATFORM_PERFMON=y
297+CONFIG_IMX_HAVE_PLATFORM_LDB=y
298+CONFIG_IMX_HAVE_PLATFORM_IMX_SPDIF=y
299+CONFIG_IMX_HAVE_PLATFORM_VIV_GPU=y
300+CONFIG_IMX_HAVE_PLATFORM_MXC_HDMI=y
301+CONFIG_IMX_HAVE_PLATFORM_IMX_ANATOP_THERMAL=y
302+CONFIG_IMX_HAVE_PLATFORM_FSL_OTG=y
303+CONFIG_IMX_HAVE_PLATFORM_FSL_USB_WAKEUP=y
304+CONFIG_IMX_HAVE_PLATFORM_IMX_PM=y
305+CONFIG_IMX_HAVE_PLATFORM_IMX_ASRC=y
306+CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_CSI2=y
307+CONFIG_IMX_HAVE_PLATFORM_IMX_VDOA=y
308+CONFIG_IMX_HAVE_PLATFORM_IMX_PCIE=y
309+
310+#
311+# Freescale MXC Implementations
312+#
313+# CONFIG_ARCH_MX1 is not set
314+# CONFIG_ARCH_MX2 is not set
315+# CONFIG_ARCH_MX25 is not set
316+# CONFIG_ARCH_MX3 is not set
317+# CONFIG_ARCH_MX503 is not set
318+# CONFIG_ARCH_MX51 is not set
319+CONFIG_ARCH_MX6=y
320+CONFIG_ARCH_MX6Q=y
321+CONFIG_FORCE_MAX_ZONEORDER=14
322+CONFIG_SOC_IMX6Q=y
323+# CONFIG_MACH_MX6Q_ARM2 is not set
324+# CONFIG_MACH_MX6SL_ARM2 is not set
325+# CONFIG_MACH_MX6SL_EVK is not set
326+CONFIG_MACH_MX6Q_SABRELITE=y
327+# CONFIG_MACH_MX6Q_SABRESD is not set
328+# CONFIG_MACH_MX6Q_SABREAUTO is not set
329+
330+#
331+# MX6 Options:
332+#
333+CONFIG_IMX_PCIE=y
334+CONFIG_USB_EHCI_ARC_H1=y
335+# CONFIG_MX6_INTER_LDO_BYPASS is not set
336+CONFIG_ISP1504_MXC=y
337+# CONFIG_MXC_IRQ_PRIOR is not set
338+CONFIG_MXC_PWM=y
339+# CONFIG_MXC_DEBUG_BOARD is not set
340+CONFIG_MXC_REBOOT_MFGMODE=y
341+# CONFIG_MXC_REBOOT_ANDROID_CMD is not set
342+CONFIG_ARCH_MXC_IOMUX_V3=y
343+CONFIG_ARCH_MXC_AUDMUX_V2=y
344+CONFIG_IRAM_ALLOC=y
345+CONFIG_CLK_DEBUG=y
346+CONFIG_DMA_ZONE_SIZE=184
347+
348+#
349+# System MMU
350+#
351+
352+#
353+# Processor Type
354+#
355+CONFIG_CPU_V7=y
356+CONFIG_CPU_32v6K=y
357+CONFIG_CPU_32v7=y
358+CONFIG_CPU_ABRT_EV7=y
359+CONFIG_CPU_PABRT_V7=y
360+CONFIG_CPU_CACHE_V7=y
361+CONFIG_CPU_CACHE_VIPT=y
362+CONFIG_CPU_COPY_V6=y
363+CONFIG_CPU_TLB_V7=y
364+CONFIG_CPU_HAS_ASID=y
365+CONFIG_CPU_CP15=y
366+CONFIG_CPU_CP15_MMU=y
367+
368+#
369+# Processor Features
370+#
371+CONFIG_ARM_THUMB=y
372+# CONFIG_ARM_THUMBEE is not set
373+# CONFIG_SWP_EMULATE is not set
374+# CONFIG_CPU_ICACHE_DISABLE is not set
375+# CONFIG_CPU_DCACHE_DISABLE is not set
376+# CONFIG_CPU_BPREDICT_DISABLE is not set
377+CONFIG_OUTER_CACHE=y
378+CONFIG_OUTER_CACHE_SYNC=y
379+CONFIG_CACHE_L2X0=y
380+CONFIG_CACHE_PL310=y
381+CONFIG_ARM_L1_CACHE_SHIFT=5
382+CONFIG_ARM_DMA_MEM_BUFFERABLE=y
383+CONFIG_CPU_HAS_PMU=y
384+# CONFIG_ARM_ERRATA_430973 is not set
385+# CONFIG_ARM_ERRATA_458693 is not set
386+# CONFIG_ARM_ERRATA_460075 is not set
387+# CONFIG_ARM_ERRATA_742230 is not set
388+# CONFIG_ARM_ERRATA_742231 is not set
389+# CONFIG_PL310_ERRATA_588369 is not set
390+# CONFIG_ARM_ERRATA_720789 is not set
391+# CONFIG_PL310_ERRATA_727915 is not set
392+CONFIG_ARM_ERRATA_743622=y
393+CONFIG_ARM_ERRATA_751472=y
394+# CONFIG_ARM_ERRATA_753970 is not set
395+CONFIG_ARM_ERRATA_754322=y
396+# CONFIG_ARM_ERRATA_754327 is not set
397+CONFIG_ARM_GIC=y
398+
399+#
400+# Bus support
401+#
402+CONFIG_PCI=y
403+CONFIG_PCI_SYSCALL=y
404+# CONFIG_ARCH_SUPPORTS_MSI is not set
405+# CONFIG_PCI_STUB is not set
406+# CONFIG_PCI_IOV is not set
407+# CONFIG_PCIEPORTBUS is not set
408+# CONFIG_PCCARD is not set
409+CONFIG_ARM_ERRATA_764369=y
410+# CONFIG_PL310_ERRATA_769419 is not set
411+
412+#
413+# Kernel Features
414+#
415+CONFIG_TICK_ONESHOT=y
416+CONFIG_NO_HZ=y
417+CONFIG_HIGH_RES_TIMERS=y
418+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
419+CONFIG_SMP=y
420+CONFIG_SMP_ON_UP=y
421+CONFIG_HAVE_ARM_SCU=y
422+CONFIG_HAVE_ARM_TWD=y
423+# CONFIG_VMSPLIT_3G is not set
424+CONFIG_VMSPLIT_2G=y
425+# CONFIG_VMSPLIT_1G is not set
426+CONFIG_PAGE_OFFSET=0x80000000
427+CONFIG_NR_CPUS=4
428+CONFIG_HOTPLUG_CPU=y
429+CONFIG_LOCAL_TIMERS=y
430+# CONFIG_PREEMPT_NONE is not set
431+# CONFIG_PREEMPT_VOLUNTARY is not set
432+CONFIG_PREEMPT=y
433+CONFIG_HZ=100
434+# CONFIG_THUMB2_KERNEL is not set
435+CONFIG_AEABI=y
436+# CONFIG_OABI_COMPAT is not set
437+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
438+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
439+CONFIG_HAVE_ARCH_PFN_VALID=y
440+CONFIG_HIGHMEM=y
441+# CONFIG_HIGHPTE is not set
442+CONFIG_HW_PERF_EVENTS=y
443+CONFIG_SELECT_MEMORY_MODEL=y
444+CONFIG_FLATMEM_MANUAL=y
445+CONFIG_FLATMEM=y
446+CONFIG_FLAT_NODE_MEM_MAP=y
447+CONFIG_HAVE_MEMBLOCK=y
448+CONFIG_PAGEFLAGS_EXTENDED=y
449+CONFIG_SPLIT_PTLOCK_CPUS=4
450+CONFIG_COMPACTION=y
451+CONFIG_MIGRATION=y
452+# CONFIG_PHYS_ADDR_T_64BIT is not set
453+CONFIG_ZONE_DMA_FLAG=1
454+CONFIG_BOUNCE=y
455+CONFIG_VIRT_TO_BUS=y
456+CONFIG_KSM=y
457+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
458+# CONFIG_CLEANCACHE is not set
459+CONFIG_ALIGNMENT_TRAP=y
460+# CONFIG_UACCESS_WITH_MEMCPY is not set
461+# CONFIG_SECCOMP is not set
462+# CONFIG_CC_STACKPROTECTOR is not set
463+# CONFIG_DEPRECATED_PARAM_STRUCT is not set
464+
465+#
466+# Boot options
467+#
468+# CONFIG_USE_OF is not set
469+CONFIG_ZBOOT_ROM_TEXT=0x0
470+CONFIG_ZBOOT_ROM_BSS=0x0
471+CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off"
472+CONFIG_CMDLINE_FROM_BOOTLOADER=y
473+# CONFIG_CMDLINE_EXTEND is not set
474+# CONFIG_CMDLINE_FORCE is not set
475+# CONFIG_XIP_KERNEL is not set
476+# CONFIG_KEXEC is not set
477+# CONFIG_CRASH_DUMP is not set
478+# CONFIG_AUTO_ZRELADDR is not set
479+
480+#
481+# CPU Power Management
482+#
483+
484+#
485+# CPU Frequency scaling
486+#
487+CONFIG_CPU_FREQ=y
488+CONFIG_CPU_FREQ_TABLE=y
489+CONFIG_CPU_FREQ_STAT=y
490+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
491+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
492+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
493+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
494+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
495+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
496+CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
497+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
498+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
499+CONFIG_CPU_FREQ_GOV_USERSPACE=y
500+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
501+CONFIG_CPU_FREQ_GOV_INTERACTIVE=y
502+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
503+CONFIG_CPU_FREQ_IMX=y
504+# CONFIG_CPU_IDLE is not set
505+
506+#
507+# Floating point emulation
508+#
509+
510+#
511+# At least one emulation must be selected
512+#
513+CONFIG_VFP=y
514+CONFIG_VFPv3=y
515+CONFIG_NEON=y
516+
517+#
518+# Userspace binary formats
519+#
520+CONFIG_BINFMT_ELF=y
521+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
522+CONFIG_HAVE_AOUT=y
523+# CONFIG_BINFMT_AOUT is not set
524+# CONFIG_BINFMT_MISC is not set
525+
526+#
527+# Power management options
528+#
529+CONFIG_SUSPEND=y
530+# CONFIG_PM_TEST_SUSPEND is not set
531+CONFIG_SUSPEND_DEVICE_TIME_DEBUG=y
532+CONFIG_SUSPEND_FREEZER=y
533+CONFIG_PM_SLEEP=y
534+CONFIG_PM_SLEEP_SMP=y
535+CONFIG_PM_RUNTIME=y
536+CONFIG_PM=y
537+CONFIG_PM_DEBUG=y
538+# CONFIG_PM_ADVANCED_DEBUG is not set
539+CONFIG_CAN_PM_TRACE=y
540+CONFIG_APM_EMULATION=y
541+CONFIG_PM_RUNTIME_CLK=y
542+CONFIG_ARCH_SUSPEND_POSSIBLE=y
543+CONFIG_NET=y
544+
545+#
546+# Networking options
547+#
548+CONFIG_PACKET=y
549+CONFIG_UNIX=y
550+CONFIG_XFRM=y
551+# CONFIG_XFRM_USER is not set
552+# CONFIG_XFRM_SUB_POLICY is not set
553+# CONFIG_XFRM_MIGRATE is not set
554+# CONFIG_XFRM_STATISTICS is not set
555+# CONFIG_NET_KEY is not set
556+CONFIG_INET=y
557+CONFIG_IP_MULTICAST=y
558+# CONFIG_IP_ADVANCED_ROUTER is not set
559+CONFIG_IP_PNP=y
560+CONFIG_IP_PNP_DHCP=y
561+CONFIG_IP_PNP_BOOTP=y
562+# CONFIG_IP_PNP_RARP is not set
563+# CONFIG_NET_IPIP is not set
564+# CONFIG_NET_IPGRE_DEMUX is not set
565+# CONFIG_IP_MROUTE is not set
566+# CONFIG_ARPD is not set
567+# CONFIG_SYN_COOKIES is not set
568+# CONFIG_INET_AH is not set
569+# CONFIG_INET_ESP is not set
570+# CONFIG_INET_IPCOMP is not set
571+# CONFIG_INET_XFRM_TUNNEL is not set
572+# CONFIG_INET_TUNNEL is not set
573+CONFIG_INET_XFRM_MODE_TRANSPORT=y
574+CONFIG_INET_XFRM_MODE_TUNNEL=y
575+CONFIG_INET_XFRM_MODE_BEET=y
576+# CONFIG_INET_LRO is not set
577+CONFIG_INET_DIAG=y
578+CONFIG_INET_TCP_DIAG=y
579+# CONFIG_TCP_CONG_ADVANCED is not set
580+CONFIG_TCP_CONG_CUBIC=y
581+CONFIG_DEFAULT_TCP_CONG="cubic"
582+# CONFIG_TCP_MD5SIG is not set
583+# CONFIG_IPV6 is not set
584+# CONFIG_NETWORK_SECMARK is not set
585+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
586+# CONFIG_NETFILTER is not set
587+# CONFIG_IP_DCCP is not set
588+# CONFIG_IP_SCTP is not set
589+# CONFIG_RDS is not set
590+# CONFIG_TIPC is not set
591+# CONFIG_ATM is not set
592+# CONFIG_L2TP is not set
593+# CONFIG_BRIDGE is not set
594+# CONFIG_NET_DSA is not set
595+# CONFIG_VLAN_8021Q is not set
596+# CONFIG_DECNET is not set
597+CONFIG_LLC=y
598+CONFIG_LLC2=y
599+# CONFIG_IPX is not set
600+# CONFIG_ATALK is not set
601+# CONFIG_X25 is not set
602+# CONFIG_LAPB is not set
603+# CONFIG_ECONET is not set
604+# CONFIG_WAN_ROUTER is not set
605+# CONFIG_PHONET is not set
606+# CONFIG_IEEE802154 is not set
607+# CONFIG_NET_SCHED is not set
608+# CONFIG_DCB is not set
609+# CONFIG_BATMAN_ADV is not set
610+CONFIG_RPS=y
611+CONFIG_RFS_ACCEL=y
612+CONFIG_XPS=y
613+
614+#
615+# Network testing
616+#
617+# CONFIG_NET_PKTGEN is not set
618+# CONFIG_HAMRADIO is not set
619+CONFIG_CAN=y
620+CONFIG_CAN_RAW=y
621+CONFIG_CAN_BCM=y
622+
623+#
624+# CAN Device Drivers
625+#
626+CONFIG_CAN_VCAN=y
627+# CONFIG_CAN_SLCAN is not set
628+CONFIG_CAN_DEV=y
629+CONFIG_CAN_CALC_BITTIMING=y
630+# CONFIG_CAN_MCP251X is not set
631+CONFIG_HAVE_CAN_FLEXCAN=y
632+CONFIG_CAN_FLEXCAN=y
633+# CONFIG_PCH_CAN is not set
634+# CONFIG_CAN_SJA1000 is not set
635+# CONFIG_CAN_C_CAN is not set
636+
637+#
638+# CAN USB interfaces
639+#
640+# CONFIG_CAN_EMS_USB is not set
641+# CONFIG_CAN_ESD_USB2 is not set
642+# CONFIG_CAN_SOFTING is not set
643+# CONFIG_CAN_DEBUG_DEVICES is not set
644+# CONFIG_IRDA is not set
645+CONFIG_BT=y
646+CONFIG_BT_L2CAP=y
647+CONFIG_BT_SCO=y
648+CONFIG_BT_RFCOMM=y
649+CONFIG_BT_RFCOMM_TTY=y
650+CONFIG_BT_BNEP=y
651+CONFIG_BT_BNEP_MC_FILTER=y
652+CONFIG_BT_BNEP_PROTO_FILTER=y
653+CONFIG_BT_HIDP=y
654+
655+#
656+# Bluetooth device drivers
657+#
658+# CONFIG_BT_HCIBTUSB is not set
659+# CONFIG_BT_HCIBTSDIO is not set
660+CONFIG_BT_HCIUART=y
661+# CONFIG_BT_HCIUART_H4 is not set
662+# CONFIG_BT_HCIUART_BCSP is not set
663+# CONFIG_BT_HCIUART_ATH3K is not set
664+CONFIG_BT_HCIUART_LL=y
665+# CONFIG_BT_HCIBCM203X is not set
666+# CONFIG_BT_HCIBPA10X is not set
667+# CONFIG_BT_HCIBFUSB is not set
668+# CONFIG_BT_HCIVHCI is not set
669+# CONFIG_BT_MRVL is not set
670+# CONFIG_AF_RXRPC is not set
671+CONFIG_WIRELESS=y
672+CONFIG_WIRELESS_EXT=y
673+CONFIG_WEXT_CORE=y
674+CONFIG_WEXT_PROC=y
675+CONFIG_WEXT_SPY=y
676+CONFIG_WEXT_PRIV=y
677+CONFIG_CFG80211=y
678+# CONFIG_NL80211_TESTMODE is not set
679+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
680+# CONFIG_CFG80211_REG_DEBUG is not set
681+CONFIG_CFG80211_DEFAULT_PS=y
682+# CONFIG_CFG80211_DEBUGFS is not set
683+# CONFIG_CFG80211_INTERNAL_REGDB is not set
684+CONFIG_CFG80211_WEXT=y
685+CONFIG_WIRELESS_EXT_SYSFS=y
686+CONFIG_LIB80211=y
687+CONFIG_LIB80211_CRYPT_WEP=y
688+CONFIG_LIB80211_CRYPT_CCMP=y
689+CONFIG_LIB80211_CRYPT_TKIP=y
690+# CONFIG_LIB80211_DEBUG is not set
691+CONFIG_MAC80211=y
692+CONFIG_MAC80211_HAS_RC=y
693+# CONFIG_MAC80211_RC_PID is not set
694+CONFIG_MAC80211_RC_MINSTREL=y
695+CONFIG_MAC80211_RC_MINSTREL_HT=y
696+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
697+CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
698+# CONFIG_MAC80211_MESH is not set
699+# CONFIG_MAC80211_LEDS is not set
700+# CONFIG_MAC80211_DEBUGFS is not set
701+# CONFIG_MAC80211_DEBUG_MENU is not set
702+# CONFIG_WIMAX is not set
703+CONFIG_RFKILL=y
704+CONFIG_RFKILL_LEDS=y
705+CONFIG_RFKILL_INPUT=y
706+# CONFIG_RFKILL_REGULATOR is not set
707+# CONFIG_RFKILL_GPIO is not set
708+# CONFIG_NET_9P is not set
709+# CONFIG_CAIF is not set
710+# CONFIG_CEPH_LIB is not set
711+
712+#
713+# Device Drivers
714+#
715+
716+#
717+# Generic Driver Options
718+#
719+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
720+# CONFIG_DEVTMPFS is not set
721+CONFIG_STANDALONE=y
722+CONFIG_PREVENT_FIRMWARE_BUILD=y
723+CONFIG_FW_LOADER=y
724+CONFIG_FIRMWARE_IN_KERNEL=y
725+CONFIG_EXTRA_FIRMWARE=""
726+# CONFIG_SYS_HYPERVISOR is not set
727+CONFIG_CONNECTOR=y
728+CONFIG_PROC_EVENTS=y
729+CONFIG_MTD=y
730+# CONFIG_MTD_DEBUG is not set
731+# CONFIG_MTD_TESTS is not set
732+# CONFIG_MTD_REDBOOT_PARTS is not set
733+CONFIG_MTD_CMDLINE_PARTS=y
734+# CONFIG_MTD_AFS_PARTS is not set
735+# CONFIG_MTD_AR7_PARTS is not set
736+
737+#
738+# User Modules And Translation Layers
739+#
740+CONFIG_MTD_CHAR=y
741+CONFIG_MTD_BLKDEVS=y
742+CONFIG_MTD_BLOCK=y
743+# CONFIG_FTL is not set
744+# CONFIG_NFTL is not set
745+# CONFIG_INFTL is not set
746+# CONFIG_RFD_FTL is not set
747+# CONFIG_SSFDC is not set
748+# CONFIG_SM_FTL is not set
749+# CONFIG_MTD_OOPS is not set
750+# CONFIG_MTD_SWAP is not set
751+
752+#
753+# RAM/ROM/Flash chip drivers
754+#
755+# CONFIG_MTD_CFI is not set
756+# CONFIG_MTD_JEDECPROBE is not set
757+CONFIG_MTD_MAP_BANK_WIDTH_1=y
758+CONFIG_MTD_MAP_BANK_WIDTH_2=y
759+CONFIG_MTD_MAP_BANK_WIDTH_4=y
760+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
761+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
762+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
763+CONFIG_MTD_CFI_I1=y
764+CONFIG_MTD_CFI_I2=y
765+# CONFIG_MTD_CFI_I4 is not set
766+# CONFIG_MTD_CFI_I8 is not set
767+# CONFIG_MTD_RAM is not set
768+# CONFIG_MTD_ROM is not set
769+# CONFIG_MTD_ABSENT is not set
770+
771+#
772+# Mapping drivers for chip access
773+#
774+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
775+# CONFIG_MTD_INTEL_VR_NOR is not set
776+# CONFIG_MTD_PLATRAM is not set
777+
778+#
779+# Self-contained MTD device drivers
780+#
781+# CONFIG_MTD_PMC551 is not set
782+# CONFIG_MTD_DATAFLASH is not set
783+CONFIG_MTD_M25P80=y
784+CONFIG_M25PXX_USE_FAST_READ=y
785+# CONFIG_MTD_SST25L is not set
786+# CONFIG_MTD_SLRAM is not set
787+# CONFIG_MTD_PHRAM is not set
788+# CONFIG_MTD_MTDRAM is not set
789+# CONFIG_MTD_BLOCK2MTD is not set
790+
791+#
792+# Disk-On-Chip Device Drivers
793+#
794+# CONFIG_MTD_DOC2000 is not set
795+# CONFIG_MTD_DOC2001 is not set
796+# CONFIG_MTD_DOC2001PLUS is not set
797+CONFIG_MTD_NAND_ECC=y
798+# CONFIG_MTD_NAND_ECC_SMC is not set
799+CONFIG_MTD_NAND=y
800+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
801+# CONFIG_MTD_NAND_ECC_BCH is not set
802+# CONFIG_MTD_SM_COMMON is not set
803+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
804+# CONFIG_MTD_NAND_DENALI is not set
805+# CONFIG_MTD_NAND_GPIO is not set
806+CONFIG_MTD_NAND_IDS=y
807+# CONFIG_MTD_NAND_RICOH is not set
808+# CONFIG_MTD_NAND_DISKONCHIP is not set
809+# CONFIG_MTD_NAND_CAFE is not set
810+# CONFIG_MTD_NAND_NANDSIM is not set
811+# CONFIG_MTD_NAND_GPMI_NAND is not set
812+# CONFIG_MTD_NAND_PLATFORM is not set
813+# CONFIG_MTD_ALAUDA is not set
814+# CONFIG_MTD_ONENAND is not set
815+
816+#
817+# LPDDR flash memory drivers
818+#
819+# CONFIG_MTD_LPDDR is not set
820+CONFIG_MTD_UBI=y
821+CONFIG_MTD_UBI_WL_THRESHOLD=4096
822+CONFIG_MTD_UBI_BEB_RESERVE=1
823+# CONFIG_MTD_UBI_GLUEBI is not set
824+# CONFIG_MTD_UBI_DEBUG is not set
825+# CONFIG_PARPORT is not set
826+CONFIG_BLK_DEV=y
827+# CONFIG_BLK_CPQ_DA is not set
828+# CONFIG_BLK_CPQ_CISS_DA is not set
829+# CONFIG_BLK_DEV_DAC960 is not set
830+# CONFIG_BLK_DEV_UMEM is not set
831+# CONFIG_BLK_DEV_COW_COMMON is not set
832+CONFIG_BLK_DEV_LOOP=y
833+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
834+# CONFIG_BLK_DEV_DRBD is not set
835+# CONFIG_BLK_DEV_NBD is not set
836+# CONFIG_BLK_DEV_SX8 is not set
837+# CONFIG_BLK_DEV_UB is not set
838+# CONFIG_BLK_DEV_RAM is not set
839+# CONFIG_CDROM_PKTCDVD is not set
840+# CONFIG_ATA_OVER_ETH is not set
841+# CONFIG_MG_DISK is not set
842+# CONFIG_BLK_DEV_RBD is not set
843+# CONFIG_SENSORS_LIS3LV02D is not set
844+CONFIG_MISC_DEVICES=y
845+# CONFIG_AD525X_DPOT is not set
846+# CONFIG_PHANTOM is not set
847+# CONFIG_INTEL_MID_PTI is not set
848+# CONFIG_SGI_IOC4 is not set
849+# CONFIG_TIFM_CORE is not set
850+# CONFIG_ICS932S401 is not set
851+# CONFIG_ENCLOSURE_SERVICES is not set
852+# CONFIG_HP_ILO is not set
853+# CONFIG_APDS9802ALS is not set
854+# CONFIG_ISL29003 is not set
855+# CONFIG_ISL29020 is not set
856+# CONFIG_SENSORS_TSL2550 is not set
857+# CONFIG_SENSORS_BH1780 is not set
858+# CONFIG_SENSORS_BH1770 is not set
859+# CONFIG_SENSORS_APDS990X is not set
860+# CONFIG_HMC6352 is not set
861+# CONFIG_DS1682 is not set
862+# CONFIG_TI_DAC7512 is not set
863+# CONFIG_BMP085 is not set
864+# CONFIG_PCH_PHUB is not set
865+CONFIG_MXS_PERFMON=m
866+# CONFIG_C2PORT is not set
867+
868+#
869+# EEPROM support
870+#
871+# CONFIG_EEPROM_AT24 is not set
872+# CONFIG_EEPROM_AT25 is not set
873+# CONFIG_EEPROM_LEGACY is not set
874+# CONFIG_EEPROM_MAX6875 is not set
875+# CONFIG_EEPROM_93CX6 is not set
876+# CONFIG_CB710_CORE is not set
877+# CONFIG_IWMC3200TOP is not set
878+
879+#
880+# Texas Instruments shared transport line discipline
881+#
882+# CONFIG_TI_ST is not set
883+# CONFIG_SENSORS_LIS3_SPI is not set
884+# CONFIG_SENSORS_LIS3_I2C is not set
885+CONFIG_HAVE_IDE=y
886+# CONFIG_IDE is not set
887+
888+#
889+# SCSI device support
890+#
891+CONFIG_SCSI_MOD=y
892+# CONFIG_RAID_ATTRS is not set
893+CONFIG_SCSI=y
894+CONFIG_SCSI_DMA=y
895+# CONFIG_SCSI_TGT is not set
896+# CONFIG_SCSI_NETLINK is not set
897+CONFIG_SCSI_PROC_FS=y
898+
899+#
900+# SCSI support type (disk, tape, CD-ROM)
901+#
902+CONFIG_BLK_DEV_SD=y
903+# CONFIG_CHR_DEV_ST is not set
904+# CONFIG_CHR_DEV_OSST is not set
905+# CONFIG_BLK_DEV_SR is not set
906+# CONFIG_CHR_DEV_SG is not set
907+# CONFIG_CHR_DEV_SCH is not set
908+CONFIG_SCSI_MULTI_LUN=y
909+# CONFIG_SCSI_CONSTANTS is not set
910+# CONFIG_SCSI_LOGGING is not set
911+# CONFIG_SCSI_SCAN_ASYNC is not set
912+CONFIG_SCSI_WAIT_SCAN=m
913+
914+#
915+# SCSI Transports
916+#
917+# CONFIG_SCSI_SPI_ATTRS is not set
918+# CONFIG_SCSI_FC_ATTRS is not set
919+# CONFIG_SCSI_ISCSI_ATTRS is not set
920+# CONFIG_SCSI_SAS_ATTRS is not set
921+# CONFIG_SCSI_SAS_LIBSAS is not set
922+# CONFIG_SCSI_SRP_ATTRS is not set
923+CONFIG_SCSI_LOWLEVEL=y
924+# CONFIG_ISCSI_TCP is not set
925+# CONFIG_ISCSI_BOOT_SYSFS is not set
926+# CONFIG_SCSI_CXGB3_ISCSI is not set
927+# CONFIG_SCSI_CXGB4_ISCSI is not set
928+# CONFIG_SCSI_BNX2_ISCSI is not set
929+# CONFIG_SCSI_BNX2X_FCOE is not set
930+# CONFIG_BE2ISCSI is not set
931+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
932+# CONFIG_SCSI_HPSA is not set
933+# CONFIG_SCSI_3W_9XXX is not set
934+# CONFIG_SCSI_3W_SAS is not set
935+# CONFIG_SCSI_ACARD is not set
936+# CONFIG_SCSI_AACRAID is not set
937+# CONFIG_SCSI_AIC7XXX is not set
938+# CONFIG_SCSI_AIC7XXX_OLD is not set
939+# CONFIG_SCSI_AIC79XX is not set
940+# CONFIG_SCSI_AIC94XX is not set
941+# CONFIG_SCSI_MVSAS is not set
942+# CONFIG_SCSI_DPT_I2O is not set
943+# CONFIG_SCSI_ADVANSYS is not set
944+# CONFIG_SCSI_ARCMSR is not set
945+# CONFIG_MEGARAID_NEWGEN is not set
946+# CONFIG_MEGARAID_LEGACY is not set
947+# CONFIG_MEGARAID_SAS is not set
948+# CONFIG_SCSI_MPT2SAS is not set
949+# CONFIG_SCSI_HPTIOP is not set
950+# CONFIG_LIBFC is not set
951+# CONFIG_LIBFCOE is not set
952+# CONFIG_FCOE is not set
953+# CONFIG_SCSI_DMX3191D is not set
954+# CONFIG_SCSI_FUTURE_DOMAIN is not set
955+# CONFIG_SCSI_IPS is not set
956+# CONFIG_SCSI_INITIO is not set
957+# CONFIG_SCSI_INIA100 is not set
958+# CONFIG_SCSI_STEX is not set
959+# CONFIG_SCSI_SYM53C8XX_2 is not set
960+# CONFIG_SCSI_IPR is not set
961+# CONFIG_SCSI_QLOGIC_1280 is not set
962+# CONFIG_SCSI_QLA_FC is not set
963+# CONFIG_SCSI_QLA_ISCSI is not set
964+# CONFIG_SCSI_LPFC is not set
965+# CONFIG_SCSI_DC395x is not set
966+# CONFIG_SCSI_DC390T is not set
967+# CONFIG_SCSI_NSP32 is not set
968+# CONFIG_SCSI_DEBUG is not set
969+# CONFIG_SCSI_PMCRAID is not set
970+# CONFIG_SCSI_PM8001 is not set
971+# CONFIG_SCSI_SRP is not set
972+# CONFIG_SCSI_BFA_FC is not set
973+# CONFIG_SCSI_DH is not set
974+# CONFIG_SCSI_OSD_INITIATOR is not set
975+CONFIG_ATA=y
976+# CONFIG_ATA_NONSTANDARD is not set
977+CONFIG_ATA_VERBOSE_ERROR=y
978+# CONFIG_SATA_PMP is not set
979+
980+#
981+# Controllers with non-SFF native interface
982+#
983+# CONFIG_SATA_AHCI is not set
984+CONFIG_SATA_AHCI_PLATFORM=y
985+# CONFIG_SATA_INIC162X is not set
986+# CONFIG_SATA_ACARD_AHCI is not set
987+# CONFIG_SATA_SIL24 is not set
988+CONFIG_ATA_SFF=y
989+
990+#
991+# SFF controllers with custom DMA interface
992+#
993+# CONFIG_PDC_ADMA is not set
994+# CONFIG_SATA_QSTOR is not set
995+# CONFIG_SATA_SX4 is not set
996+CONFIG_ATA_BMDMA=y
997+
998+#
999+# SATA SFF controllers with BMDMA
1000+#
1001+# CONFIG_ATA_PIIX is not set
1002+# CONFIG_SATA_MV is not set
1003+# CONFIG_SATA_NV is not set
1004+# CONFIG_SATA_PROMISE is not set
1005+# CONFIG_SATA_SIL is not set
1006+# CONFIG_SATA_SIS is not set
1007+# CONFIG_SATA_SVW is not set
1008+# CONFIG_SATA_ULI is not set
1009+# CONFIG_SATA_VIA is not set
1010+# CONFIG_SATA_VITESSE is not set
1011+
1012+#
1013+# PATA SFF controllers with BMDMA
1014+#
1015+# CONFIG_PATA_ALI is not set
1016+# CONFIG_PATA_AMD is not set
1017+# CONFIG_PATA_ARASAN_CF is not set
1018+# CONFIG_PATA_ARTOP is not set
1019+# CONFIG_PATA_ATIIXP is not set
1020+# CONFIG_PATA_ATP867X is not set
1021+# CONFIG_PATA_CMD64X is not set
1022+# CONFIG_PATA_CS5520 is not set
1023+# CONFIG_PATA_CS5530 is not set
1024+# CONFIG_PATA_CS5536 is not set
1025+# CONFIG_PATA_CYPRESS is not set
1026+# CONFIG_PATA_EFAR is not set
1027+# CONFIG_PATA_HPT366 is not set
1028+# CONFIG_PATA_HPT37X is not set
1029+# CONFIG_PATA_HPT3X2N is not set
1030+# CONFIG_PATA_HPT3X3 is not set
1031+# CONFIG_PATA_IT8213 is not set
1032+# CONFIG_PATA_IT821X is not set
1033+# CONFIG_PATA_JMICRON is not set
1034+# CONFIG_PATA_MARVELL is not set
1035+# CONFIG_PATA_NETCELL is not set
1036+# CONFIG_PATA_NINJA32 is not set
1037+# CONFIG_PATA_NS87415 is not set
1038+# CONFIG_PATA_OLDPIIX is not set
1039+# CONFIG_PATA_OPTIDMA is not set
1040+# CONFIG_PATA_PDC2027X is not set
1041+# CONFIG_PATA_PDC_OLD is not set
1042+# CONFIG_PATA_RADISYS is not set
1043+# CONFIG_PATA_RDC is not set
1044+# CONFIG_PATA_SC1200 is not set
1045+# CONFIG_PATA_SCH is not set
1046+# CONFIG_PATA_SERVERWORKS is not set
1047+# CONFIG_PATA_SIL680 is not set
1048+# CONFIG_PATA_SIS is not set
1049+# CONFIG_PATA_TOSHIBA is not set
1050+# CONFIG_PATA_TRIFLEX is not set
1051+# CONFIG_PATA_VIA is not set
1052+# CONFIG_PATA_WINBOND is not set
1053+
1054+#
1055+# PIO-only SFF controllers
1056+#
1057+# CONFIG_PATA_CMD640_PCI is not set
1058+# CONFIG_PATA_MPIIX is not set
1059+# CONFIG_PATA_NS87410 is not set
1060+# CONFIG_PATA_OPTI is not set
1061+# CONFIG_PATA_PLATFORM is not set
1062+# CONFIG_PATA_RZ1000 is not set
1063+
1064+#
1065+# Generic fallback / legacy drivers
1066+#
1067+# CONFIG_ATA_GENERIC is not set
1068+# CONFIG_PATA_LEGACY is not set
1069+# CONFIG_MD is not set
1070+# CONFIG_TARGET_CORE is not set
1071+# CONFIG_FUSION is not set
1072+
1073+#
1074+# IEEE 1394 (FireWire) support
1075+#
1076+# CONFIG_FIREWIRE is not set
1077+# CONFIG_FIREWIRE_NOSY is not set
1078+# CONFIG_I2O is not set
1079+CONFIG_NETDEVICES=y
1080+# CONFIG_DUMMY is not set
1081+# CONFIG_BONDING is not set
1082+# CONFIG_MACVLAN is not set
1083+# CONFIG_EQUALIZER is not set
1084+CONFIG_TUN=y
1085+# CONFIG_VETH is not set
1086+# CONFIG_ARCNET is not set
1087+CONFIG_MII=y
1088+CONFIG_PHYLIB=y
1089+
1090+#
1091+# MII PHY device drivers
1092+#
1093+# CONFIG_MARVELL_PHY is not set
1094+# CONFIG_DAVICOM_PHY is not set
1095+# CONFIG_QSEMI_PHY is not set
1096+# CONFIG_LXT_PHY is not set
1097+# CONFIG_CICADA_PHY is not set
1098+# CONFIG_VITESSE_PHY is not set
1099+# CONFIG_SMSC_PHY is not set
1100+# CONFIG_BROADCOM_PHY is not set
1101+# CONFIG_ICPLUS_PHY is not set
1102+# CONFIG_REALTEK_PHY is not set
1103+# CONFIG_NATIONAL_PHY is not set
1104+# CONFIG_STE10XP is not set
1105+# CONFIG_LSI_ET1011C_PHY is not set
1106+CONFIG_MICREL_PHY=y
1107+# CONFIG_FIXED_PHY is not set
1108+# CONFIG_MDIO_BITBANG is not set
1109+CONFIG_NET_ETHERNET=y
1110+# CONFIG_AX88796 is not set
1111+# CONFIG_HAPPYMEAL is not set
1112+# CONFIG_SUNGEM is not set
1113+# CONFIG_CASSINI is not set
1114+# CONFIG_NET_VENDOR_3COM is not set
1115+# CONFIG_SMC91X is not set
1116+# CONFIG_DM9000 is not set
1117+# CONFIG_ENC28J60 is not set
1118+# CONFIG_ETHOC is not set
1119+# CONFIG_SMC911X is not set
1120+# CONFIG_SMSC911X is not set
1121+# CONFIG_DNET is not set
1122+# CONFIG_NET_TULIP is not set
1123+# CONFIG_HP100 is not set
1124+# CONFIG_IBM_NEW_EMAC_ZMII is not set
1125+# CONFIG_IBM_NEW_EMAC_RGMII is not set
1126+# CONFIG_IBM_NEW_EMAC_TAH is not set
1127+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
1128+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
1129+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
1130+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
1131+# CONFIG_NET_PCI is not set
1132+# CONFIG_B44 is not set
1133+# CONFIG_KS8842 is not set
1134+# CONFIG_KS8851 is not set
1135+# CONFIG_KS8851_MLL is not set
1136+CONFIG_FEC=y
1137+CONFIG_FEC_NAPI=y
1138+# CONFIG_FEC_1588 is not set
1139+# CONFIG_ATL2 is not set
1140+# CONFIG_FTMAC100 is not set
1141+# CONFIG_NETDEV_1000 is not set
1142+# CONFIG_NETDEV_10000 is not set
1143+# CONFIG_TR is not set
1144+CONFIG_WLAN=y
1145+# CONFIG_LIBERTAS_THINFIRM is not set
1146+# CONFIG_ATMEL is not set
1147+# CONFIG_AT76C50X_USB is not set
1148+# CONFIG_PRISM54 is not set
1149+# CONFIG_USB_ZD1201 is not set
1150+# CONFIG_USB_NET_RNDIS_WLAN is not set
1151+# CONFIG_RTL8180 is not set
1152+# CONFIG_RTL8187 is not set
1153+# CONFIG_ADM8211 is not set
1154+# CONFIG_MAC80211_HWSIM is not set
1155+# CONFIG_MWL8K is not set
1156+# CONFIG_ATH_COMMON is not set
1157+# CONFIG_B43 is not set
1158+# CONFIG_B43LEGACY is not set
1159+CONFIG_HOSTAP=y
1160+# CONFIG_HOSTAP_FIRMWARE is not set
1161+# CONFIG_HOSTAP_PLX is not set
1162+# CONFIG_HOSTAP_PCI is not set
1163+# CONFIG_IPW2100 is not set
1164+# CONFIG_IPW2200 is not set
1165+# CONFIG_IWLAGN is not set
1166+# CONFIG_IWL4965 is not set
1167+# CONFIG_IWL3945 is not set
1168+# CONFIG_IWM is not set
1169+# CONFIG_LIBERTAS is not set
1170+# CONFIG_HERMES is not set
1171+# CONFIG_P54_COMMON is not set
1172+# CONFIG_RT2X00 is not set
1173+# CONFIG_RTL8192CE is not set
1174+# CONFIG_RTL8192SE is not set
1175+# CONFIG_RTL8192CU is not set
1176+# CONFIG_WL1251 is not set
1177+CONFIG_WL12XX_MENU=y
1178+CONFIG_WL12XX=y
1179+# CONFIG_WL12XX_HT is not set
1180+# CONFIG_WL12XX_SPI is not set
1181+CONFIG_WL12XX_SDIO=m
1182+# CONFIG_WL12XX_SDIO_TEST is not set
1183+CONFIG_WL12XX_PLATFORM_DATA=y
1184+# CONFIG_ZD1211RW is not set
1185+# CONFIG_MWIFIEX is not set
1186+
1187+#
1188+# Enable WiMAX (Networking options) to see the WiMAX drivers
1189+#
1190+
1191+#
1192+# USB Network Adapters
1193+#
1194+# CONFIG_USB_CATC is not set
1195+# CONFIG_USB_KAWETH is not set
1196+# CONFIG_USB_PEGASUS is not set
1197+# CONFIG_USB_RTL8150 is not set
1198+# CONFIG_USB_USBNET is not set
1199+# CONFIG_USB_HSO is not set
1200+# CONFIG_USB_IPHETH is not set
1201+# CONFIG_WAN is not set
1202+
1203+#
1204+# CAIF transport drivers
1205+#
1206+# CONFIG_FDDI is not set
1207+# CONFIG_HIPPI is not set
1208+# CONFIG_PPP is not set
1209+# CONFIG_SLIP is not set
1210+# CONFIG_NET_FC is not set
1211+# CONFIG_NETCONSOLE is not set
1212+# CONFIG_NETPOLL is not set
1213+# CONFIG_NET_POLL_CONTROLLER is not set
1214+# CONFIG_VMXNET3 is not set
1215+# CONFIG_ISDN is not set
1216+# CONFIG_PHONE is not set
1217+
1218+#
1219+# Input device support
1220+#
1221+CONFIG_INPUT=y
1222+# CONFIG_INPUT_FF_MEMLESS is not set
1223+CONFIG_INPUT_POLLDEV=y
1224+# CONFIG_INPUT_SPARSEKMAP is not set
1225+
1226+#
1227+# Userland interfaces
1228+#
1229+CONFIG_INPUT_MOUSEDEV=y
1230+CONFIG_INPUT_MOUSEDEV_PSAUX=y
1231+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
1232+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
1233+# CONFIG_INPUT_JOYDEV is not set
1234+CONFIG_INPUT_EVDEV=y
1235+# CONFIG_INPUT_EVBUG is not set
1236+# CONFIG_INPUT_APMPOWER is not set
1237+
1238+#
1239+# Input Device Drivers
1240+#
1241+CONFIG_INPUT_KEYBOARD=y
1242+# CONFIG_KEYBOARD_ADP5588 is not set
1243+# CONFIG_KEYBOARD_ADP5589 is not set
1244+CONFIG_KEYBOARD_ATKBD=y
1245+# CONFIG_KEYBOARD_QT1070 is not set
1246+# CONFIG_KEYBOARD_QT2160 is not set
1247+# CONFIG_KEYBOARD_LKKBD is not set
1248+CONFIG_KEYBOARD_GPIO=y
1249+# CONFIG_KEYBOARD_TCA6416 is not set
1250+# CONFIG_KEYBOARD_MATRIX is not set
1251+# CONFIG_KEYBOARD_LM8323 is not set
1252+# CONFIG_KEYBOARD_MAX7359 is not set
1253+# CONFIG_KEYBOARD_MCS is not set
1254+# CONFIG_KEYBOARD_MPR121 is not set
1255+# CONFIG_KEYBOARD_IMX is not set
1256+# CONFIG_KEYBOARD_NEWTON is not set
1257+# CONFIG_KEYBOARD_OPENCORES is not set
1258+# CONFIG_KEYBOARD_STOWAWAY is not set
1259+# CONFIG_KEYBOARD_SUNKBD is not set
1260+# CONFIG_KEYBOARD_XTKBD is not set
1261+# CONFIG_KEYBOARD_MXC is not set
1262+# CONFIG_INPUT_MOUSE is not set
1263+# CONFIG_INPUT_JOYSTICK is not set
1264+# CONFIG_INPUT_TABLET is not set
1265+CONFIG_INPUT_TOUCHSCREEN=y
1266+# CONFIG_TOUCHSCREEN_ADS7846 is not set
1267+# CONFIG_TOUCHSCREEN_AD7877 is not set
1268+# CONFIG_TOUCHSCREEN_AD7879 is not set
1269+# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
1270+# CONFIG_TOUCHSCREEN_BU21013 is not set
1271+# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
1272+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
1273+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
1274+# CONFIG_TOUCHSCREEN_EETI is not set
1275+CONFIG_TOUCHSCREEN_EGALAX=y
1276+# CONFIG_TOUCHSCREEN_ELAN is not set
1277+# CONFIG_TOUCHSCREEN_EGALAX_SINGLE_TOUCH is not set
1278+# CONFIG_TOUCHSCREEN_FUJITSU is not set
1279+# CONFIG_TOUCHSCREEN_GUNZE is not set
1280+# CONFIG_TOUCHSCREEN_ELO is not set
1281+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
1282+# CONFIG_TOUCHSCREEN_MAX11801 is not set
1283+CONFIG_TOUCHSCREEN_FT5X06=y
1284+CONFIG_TOUCHSCREEN_FT5X06_SINGLE_TOUCH=y
1285+# CONFIG_TOUCHSCREEN_MCS5000 is not set
1286+# CONFIG_TOUCHSCREEN_MTOUCH is not set
1287+# CONFIG_TOUCHSCREEN_INEXIO is not set
1288+# CONFIG_TOUCHSCREEN_MK712 is not set
1289+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
1290+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
1291+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
1292+# CONFIG_TOUCHSCREEN_WM97XX is not set
1293+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
1294+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
1295+# CONFIG_TOUCHSCREEN_TSC2005 is not set
1296+# CONFIG_TOUCHSCREEN_TSC2007 is not set
1297+CONFIG_TOUCHSCREEN_TSC2004=y
1298+# CONFIG_TOUCHSCREEN_W90X900 is not set
1299+# CONFIG_TOUCHSCREEN_ST1232 is not set
1300+# CONFIG_TOUCHSCREEN_P1003 is not set
1301+# CONFIG_TOUCHSCREEN_TPS6507X is not set
1302+CONFIG_INPUT_MISC=y
1303+# CONFIG_INPUT_AD714X is not set
1304+# CONFIG_INPUT_ATI_REMOTE is not set
1305+# CONFIG_INPUT_ATI_REMOTE2 is not set
1306+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
1307+# CONFIG_INPUT_POWERMATE is not set
1308+# CONFIG_INPUT_YEALINK is not set
1309+# CONFIG_INPUT_CM109 is not set
1310+CONFIG_INPUT_UINPUT=y
1311+# CONFIG_INPUT_PCF8574 is not set
1312+# CONFIG_INPUT_PWM_BEEPER is not set
1313+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
1314+# CONFIG_INPUT_ADXL34X is not set
1315+# CONFIG_INPUT_CMA3000 is not set
1316+CONFIG_INPUT_ISL29023=y
1317+
1318+#
1319+# Hardware I/O ports
1320+#
1321+CONFIG_SERIO=y
1322+CONFIG_SERIO_SERPORT=y
1323+# CONFIG_SERIO_PCIPS2 is not set
1324+CONFIG_SERIO_LIBPS2=y
1325+# CONFIG_SERIO_RAW is not set
1326+# CONFIG_SERIO_ALTERA_PS2 is not set
1327+# CONFIG_SERIO_PS2MULT is not set
1328+# CONFIG_GAMEPORT is not set
1329+
1330+#
1331+# Character devices
1332+#
1333+CONFIG_VT=y
1334+CONFIG_CONSOLE_TRANSLATIONS=y
1335+CONFIG_VT_CONSOLE=y
1336+CONFIG_HW_CONSOLE=y
1337+CONFIG_VT_HW_CONSOLE_BINDING=y
1338+CONFIG_UNIX98_PTYS=y
1339+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
1340+CONFIG_LEGACY_PTYS=y
1341+CONFIG_LEGACY_PTY_COUNT=256
1342+# CONFIG_SERIAL_NONSTANDARD is not set
1343+# CONFIG_NOZOMI is not set
1344+# CONFIG_N_GSM is not set
1345+# CONFIG_TRACE_SINK is not set
1346+CONFIG_DEVKMEM=y
1347+
1348+#
1349+# Serial drivers
1350+#
1351+# CONFIG_SERIAL_8250 is not set
1352+
1353+#
1354+# Non-8250 serial port support
1355+#
1356+# CONFIG_SERIAL_MAX3100 is not set
1357+# CONFIG_SERIAL_MAX3107 is not set
1358+# CONFIG_SERIAL_MFD_HSU is not set
1359+CONFIG_SERIAL_IMX=y
1360+CONFIG_SERIAL_IMX_CONSOLE=y
1361+CONFIG_SERIAL_CORE=y
1362+CONFIG_SERIAL_CORE_CONSOLE=y
1363+# CONFIG_SERIAL_JSM is not set
1364+# CONFIG_SERIAL_TIMBERDALE is not set
1365+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
1366+# CONFIG_SERIAL_ALTERA_UART is not set
1367+# CONFIG_SERIAL_IFX6X60 is not set
1368+# CONFIG_SERIAL_PCH_UART is not set
1369+# CONFIG_SERIAL_XILINX_PS_UART is not set
1370+# CONFIG_TTY_PRINTK is not set
1371+CONFIG_FSL_OTP=y
1372+# CONFIG_HVC_DCC is not set
1373+# CONFIG_IPMI_HANDLER is not set
1374+CONFIG_HW_RANDOM=y
1375+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
1376+# CONFIG_R3964 is not set
1377+# CONFIG_APPLICOM is not set
1378+# CONFIG_RAW_DRIVER is not set
1379+# CONFIG_TCG_TPM is not set
1380+CONFIG_DEVPORT=y
1381+# CONFIG_RAMOOPS is not set
1382+CONFIG_MXS_VIIM=y
1383+CONFIG_I2C=y
1384+CONFIG_I2C_BOARDINFO=y
1385+CONFIG_I2C_COMPAT=y
1386+CONFIG_I2C_CHARDEV=y
1387+# CONFIG_I2C_MUX is not set
1388+CONFIG_I2C_HELPER_AUTO=y
1389+CONFIG_I2C_ALGOBIT=m
1390+
1391+#
1392+# I2C Hardware Bus support
1393+#
1394+
1395+#
1396+# PC SMBus host controller drivers
1397+#
1398+# CONFIG_I2C_ALI1535 is not set
1399+# CONFIG_I2C_ALI1563 is not set
1400+# CONFIG_I2C_ALI15X3 is not set
1401+# CONFIG_I2C_AMD756 is not set
1402+# CONFIG_I2C_AMD8111 is not set
1403+# CONFIG_I2C_I801 is not set
1404+# CONFIG_I2C_ISCH is not set
1405+# CONFIG_I2C_PIIX4 is not set
1406+# CONFIG_I2C_NFORCE2 is not set
1407+# CONFIG_I2C_SIS5595 is not set
1408+# CONFIG_I2C_SIS630 is not set
1409+# CONFIG_I2C_SIS96X is not set
1410+# CONFIG_I2C_VIA is not set
1411+# CONFIG_I2C_VIAPRO is not set
1412+
1413+#
1414+# I2C system bus drivers (mostly embedded / system-on-chip)
1415+#
1416+# CONFIG_I2C_DESIGNWARE is not set
1417+# CONFIG_I2C_GPIO is not set
1418+CONFIG_I2C_IMX=y
1419+# CONFIG_I2C_INTEL_MID is not set
1420+# CONFIG_I2C_OCORES is not set
1421+# CONFIG_I2C_PCA_PLATFORM is not set
1422+# CONFIG_I2C_PXA_PCI is not set
1423+# CONFIG_I2C_SIMTEC is not set
1424+# CONFIG_I2C_XILINX is not set
1425+# CONFIG_I2C_EG20T is not set
1426+
1427+#
1428+# External I2C/SMBus adapter drivers
1429+#
1430+# CONFIG_I2C_DIOLAN_U2C is not set
1431+# CONFIG_I2C_PARPORT_LIGHT is not set
1432+# CONFIG_I2C_TAOS_EVM is not set
1433+# CONFIG_I2C_TINY_USB is not set
1434+
1435+#
1436+# Other I2C/SMBus bus drivers
1437+#
1438+# CONFIG_I2C_STUB is not set
1439+# CONFIG_I2C_DEBUG_CORE is not set
1440+# CONFIG_I2C_DEBUG_ALGO is not set
1441+# CONFIG_I2C_DEBUG_BUS is not set
1442+CONFIG_SPI=y
1443+CONFIG_SPI_MASTER=y
1444+
1445+#
1446+# SPI Master Controller Drivers
1447+#
1448+# CONFIG_SPI_ALTERA is not set
1449+CONFIG_SPI_BITBANG=y
1450+# CONFIG_SPI_GPIO is not set
1451+CONFIG_SPI_IMX_VER_2_3=y
1452+CONFIG_SPI_IMX=y
1453+# CONFIG_SPI_OC_TINY is not set
1454+# CONFIG_SPI_PXA2XX_PCI is not set
1455+# CONFIG_SPI_TOPCLIFF_PCH is not set
1456+# CONFIG_SPI_XILINX is not set
1457+# CONFIG_SPI_DESIGNWARE is not set
1458+
1459+#
1460+# SPI Protocol Masters
1461+#
1462+# CONFIG_SPI_SPIDEV is not set
1463+# CONFIG_SPI_TLE62X0 is not set
1464+
1465+#
1466+# PPS support
1467+#
1468+# CONFIG_PPS is not set
1469+
1470+#
1471+# PPS generators support
1472+#
1473+
1474+#
1475+# PTP clock support
1476+#
1477+
1478+#
1479+# Enable Device Drivers -> PPS to see the PTP clock options.
1480+#
1481+CONFIG_ARCH_REQUIRE_GPIOLIB=y
1482+CONFIG_GPIOLIB=y
1483+CONFIG_GPIO_SYSFS=y
1484+
1485+#
1486+# Memory mapped GPIO drivers:
1487+#
1488+# CONFIG_GPIO_BASIC_MMIO is not set
1489+# CONFIG_GPIO_IT8761E is not set
1490+# CONFIG_GPIO_VX855 is not set
1491+
1492+#
1493+# I2C GPIO expanders:
1494+#
1495+# CONFIG_GPIO_MAX7300 is not set
1496+# CONFIG_GPIO_MAX732X is not set
1497+# CONFIG_GPIO_PCA953X_IRQ is not set
1498+# CONFIG_GPIO_PCF857X is not set
1499+# CONFIG_GPIO_SX150X is not set
1500+# CONFIG_GPIO_WM8994 is not set
1501+# CONFIG_GPIO_ADP5588 is not set
1502+
1503+#
1504+# PCI GPIO expanders:
1505+#
1506+# CONFIG_GPIO_BT8XX is not set
1507+# CONFIG_GPIO_ML_IOH is not set
1508+# CONFIG_GPIO_RDC321X is not set
1509+
1510+#
1511+# SPI GPIO expanders:
1512+#
1513+# CONFIG_GPIO_MAX7301 is not set
1514+# CONFIG_GPIO_MCP23S08 is not set
1515+# CONFIG_GPIO_MC33880 is not set
1516+# CONFIG_GPIO_74X164 is not set
1517+
1518+#
1519+# AC97 GPIO expanders:
1520+#
1521+
1522+#
1523+# MODULbus GPIO expanders:
1524+#
1525+# CONFIG_W1 is not set
1526+CONFIG_POWER_SUPPLY=y
1527+# CONFIG_POWER_SUPPLY_DEBUG is not set
1528+# CONFIG_PDA_POWER is not set
1529+# CONFIG_APM_POWER is not set
1530+# CONFIG_TEST_POWER is not set
1531+# CONFIG_BATTERY_DS2780 is not set
1532+# CONFIG_BATTERY_DS2782 is not set
1533+# CONFIG_BATTERY_BQ20Z75 is not set
1534+# CONFIG_BATTERY_BQ27x00 is not set
1535+# CONFIG_BATTERY_MAX17040 is not set
1536+# CONFIG_BATTERY_MAX17042 is not set
1537+# CONFIG_CHARGER_ISP1704 is not set
1538+# CONFIG_CHARGER_MAX8903 is not set
1539+# CONFIG_CHARGER_GPIO is not set
1540+CONFIG_HWMON=y
1541+# CONFIG_HWMON_VID is not set
1542+# CONFIG_HWMON_DEBUG_CHIP is not set
1543+
1544+#
1545+# Native drivers
1546+#
1547+# CONFIG_SENSORS_AD7414 is not set
1548+# CONFIG_SENSORS_AD7418 is not set
1549+# CONFIG_SENSORS_ADCXX is not set
1550+# CONFIG_SENSORS_ADM1021 is not set
1551+# CONFIG_SENSORS_ADM1025 is not set
1552+# CONFIG_SENSORS_ADM1026 is not set
1553+# CONFIG_SENSORS_ADM1029 is not set
1554+# CONFIG_SENSORS_ADM1031 is not set
1555+# CONFIG_SENSORS_ADM9240 is not set
1556+# CONFIG_SENSORS_ADT7411 is not set
1557+# CONFIG_SENSORS_ADT7462 is not set
1558+# CONFIG_SENSORS_ADT7470 is not set
1559+# CONFIG_SENSORS_ADT7475 is not set
1560+# CONFIG_SENSORS_ASC7621 is not set
1561+# CONFIG_SENSORS_ATXP1 is not set
1562+# CONFIG_SENSORS_DS620 is not set
1563+# CONFIG_SENSORS_DS1621 is not set
1564+# CONFIG_SENSORS_I5K_AMB is not set
1565+# CONFIG_SENSORS_F71805F is not set
1566+# CONFIG_SENSORS_F71882FG is not set
1567+# CONFIG_SENSORS_F75375S is not set
1568+# CONFIG_SENSORS_G760A is not set
1569+# CONFIG_SENSORS_GL518SM is not set
1570+# CONFIG_SENSORS_GL520SM is not set
1571+# CONFIG_SENSORS_GPIO_FAN is not set
1572+# CONFIG_SENSORS_IT87 is not set
1573+# CONFIG_SENSORS_JC42 is not set
1574+# CONFIG_SENSORS_LINEAGE is not set
1575+# CONFIG_SENSORS_LM63 is not set
1576+# CONFIG_SENSORS_LM70 is not set
1577+# CONFIG_SENSORS_LM73 is not set
1578+# CONFIG_SENSORS_LM75 is not set
1579+# CONFIG_SENSORS_LM77 is not set
1580+# CONFIG_SENSORS_LM78 is not set
1581+# CONFIG_SENSORS_LM80 is not set
1582+# CONFIG_SENSORS_LM83 is not set
1583+# CONFIG_SENSORS_LM85 is not set
1584+# CONFIG_SENSORS_LM87 is not set
1585+# CONFIG_SENSORS_LM90 is not set
1586+# CONFIG_SENSORS_LM92 is not set
1587+# CONFIG_SENSORS_LM93 is not set
1588+# CONFIG_SENSORS_LTC4151 is not set
1589+# CONFIG_SENSORS_LTC4215 is not set
1590+# CONFIG_SENSORS_LTC4245 is not set
1591+# CONFIG_SENSORS_LTC4261 is not set
1592+# CONFIG_SENSORS_LM95241 is not set
1593+# CONFIG_SENSORS_MAX1111 is not set
1594+# CONFIG_SENSORS_MAX16065 is not set
1595+# CONFIG_SENSORS_MAX1619 is not set
1596+# CONFIG_SENSORS_MAX6639 is not set
1597+# CONFIG_SENSORS_MAX6642 is not set
1598+CONFIG_SENSORS_MAX17135=y
1599+# CONFIG_SENSORS_MAX6650 is not set
1600+# CONFIG_SENSORS_PC87360 is not set
1601+# CONFIG_SENSORS_PC87427 is not set
1602+# CONFIG_SENSORS_PCF8591 is not set
1603+# CONFIG_PMBUS is not set
1604+# CONFIG_SENSORS_SHT15 is not set
1605+# CONFIG_SENSORS_SHT21 is not set
1606+# CONFIG_SENSORS_SIS5595 is not set
1607+# CONFIG_SENSORS_SMM665 is not set
1608+# CONFIG_SENSORS_DME1737 is not set
1609+# CONFIG_SENSORS_EMC1403 is not set
1610+# CONFIG_SENSORS_EMC2103 is not set
1611+# CONFIG_SENSORS_EMC6W201 is not set
1612+# CONFIG_SENSORS_SMSC47M1 is not set
1613+# CONFIG_SENSORS_SMSC47M192 is not set
1614+# CONFIG_SENSORS_SMSC47B397 is not set
1615+# CONFIG_SENSORS_SCH5627 is not set
1616+# CONFIG_SENSORS_ADS1015 is not set
1617+# CONFIG_SENSORS_ADS7828 is not set
1618+# CONFIG_SENSORS_ADS7871 is not set
1619+# CONFIG_SENSORS_AMC6821 is not set
1620+# CONFIG_SENSORS_THMC50 is not set
1621+# CONFIG_SENSORS_TMP102 is not set
1622+# CONFIG_SENSORS_TMP401 is not set
1623+# CONFIG_SENSORS_TMP421 is not set
1624+# CONFIG_SENSORS_VIA686A is not set
1625+# CONFIG_SENSORS_VT1211 is not set
1626+# CONFIG_SENSORS_VT8231 is not set
1627+# CONFIG_SENSORS_W83781D is not set
1628+# CONFIG_SENSORS_W83791D is not set
1629+# CONFIG_SENSORS_W83792D is not set
1630+# CONFIG_SENSORS_W83793 is not set
1631+# CONFIG_SENSORS_W83795 is not set
1632+# CONFIG_SENSORS_W83L785TS is not set
1633+# CONFIG_SENSORS_W83L786NG is not set
1634+# CONFIG_SENSORS_W83627HF is not set
1635+# CONFIG_SENSORS_W83627EHF is not set
1636+CONFIG_SENSORS_MAG3110=y
1637+# CONFIG_MXC_MMA8450 is not set
1638+CONFIG_MXC_MMA8451=y
1639+CONFIG_THERMAL=y
1640+# CONFIG_THERMAL_HWMON is not set
1641+CONFIG_WATCHDOG=y
1642+CONFIG_WATCHDOG_NOWAYOUT=y
1643+
1644+#
1645+# Watchdog Device Drivers
1646+#
1647+# CONFIG_SOFT_WATCHDOG is not set
1648+# CONFIG_MPCORE_WATCHDOG is not set
1649+# CONFIG_MAX63XX_WATCHDOG is not set
1650+CONFIG_IMX2_WDT=y
1651+# CONFIG_ALIM7101_WDT is not set
1652+
1653+#
1654+# PCI-based Watchdog Cards
1655+#
1656+# CONFIG_PCIPCWATCHDOG is not set
1657+# CONFIG_WDTPCI is not set
1658+
1659+#
1660+# USB-based Watchdog Cards
1661+#
1662+# CONFIG_USBPCWATCHDOG is not set
1663+CONFIG_SSB_POSSIBLE=y
1664+
1665+#
1666+# Sonics Silicon Backplane
1667+#
1668+# CONFIG_SSB is not set
1669+CONFIG_BCMA_POSSIBLE=y
1670+
1671+#
1672+# Broadcom specific AMBA
1673+#
1674+# CONFIG_BCMA is not set
1675+CONFIG_MFD_SUPPORT=y
1676+CONFIG_MFD_CORE=y
1677+# CONFIG_MFD_88PM860X is not set
1678+# CONFIG_MFD_SM501 is not set
1679+# CONFIG_MFD_ASIC3 is not set
1680+# CONFIG_HTC_EGPIO is not set
1681+# CONFIG_HTC_PASIC3 is not set
1682+# CONFIG_HTC_I2CPLD is not set
1683+# CONFIG_UCB1400_CORE is not set
1684+# CONFIG_TPS6105X is not set
1685+# CONFIG_TPS65010 is not set
1686+# CONFIG_TPS6507X is not set
1687+# CONFIG_MFD_TPS6586X is not set
1688+# CONFIG_TWL4030_CORE is not set
1689+# CONFIG_MFD_STMPE is not set
1690+# CONFIG_MFD_TC3589X is not set
1691+# CONFIG_MFD_TMIO is not set
1692+# CONFIG_MFD_T7L66XB is not set
1693+# CONFIG_MFD_TC6387XB is not set
1694+# CONFIG_MFD_TC6393XB is not set
1695+# CONFIG_PMIC_DA903X is not set
1696+# CONFIG_PMIC_ADP5520 is not set
1697+# CONFIG_MFD_MAX8925 is not set
1698+# CONFIG_MFD_MAX8997 is not set
1699+# CONFIG_MFD_MAX8998 is not set
1700+# CONFIG_MFD_WM8400 is not set
1701+# CONFIG_MFD_WM831X_I2C is not set
1702+# CONFIG_MFD_WM831X_SPI is not set
1703+# CONFIG_MFD_WM8350_I2C is not set
1704+CONFIG_MFD_WM8994=y
1705+# CONFIG_MFD_PCF50633 is not set
1706+# CONFIG_PMIC_DIALOG is not set
1707+# CONFIG_MFD_MC_PMIC is not set
1708+# CONFIG_MFD_MC34708 is not set
1709+CONFIG_MFD_PFUZE=y
1710+# CONFIG_MFD_MC13XXX is not set
1711+# CONFIG_ABX500_CORE is not set
1712+# CONFIG_EZX_PCAP is not set
1713+# CONFIG_MFD_TIMBERDALE is not set
1714+# CONFIG_LPC_SCH is not set
1715+# CONFIG_MFD_RDC321X is not set
1716+# CONFIG_MFD_JANZ_CMODIO is not set
1717+# CONFIG_MFD_VX855 is not set
1718+# CONFIG_MFD_WL1273_CORE is not set
1719+# CONFIG_MFD_TPS65910 is not set
1720+CONFIG_MFD_MAX17135=y
1721+CONFIG_MFD_MXC_HDMI=y
1722+CONFIG_REGULATOR=y
1723+# CONFIG_REGULATOR_DEBUG is not set
1724+# CONFIG_REGULATOR_DUMMY is not set
1725+CONFIG_REGULATOR_FIXED_VOLTAGE=y
1726+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
1727+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
1728+# CONFIG_REGULATOR_BQ24022 is not set
1729+# CONFIG_REGULATOR_MAX1586 is not set
1730+# CONFIG_REGULATOR_MAX8649 is not set
1731+# CONFIG_REGULATOR_MAX8660 is not set
1732+# CONFIG_REGULATOR_MAX8952 is not set
1733+# CONFIG_REGULATOR_WM8994 is not set
1734+# CONFIG_REGULATOR_LP3971 is not set
1735+# CONFIG_REGULATOR_LP3972 is not set
1736+# CONFIG_REGULATOR_MC34708 is not set
1737+CONFIG_REGULATOR_PFUZE100=y
1738+# CONFIG_REGULATOR_TPS65023 is not set
1739+# CONFIG_REGULATOR_TPS6507X is not set
1740+# CONFIG_REGULATOR_ISL6271A is not set
1741+# CONFIG_REGULATOR_AD5398 is not set
1742+CONFIG_REGULATOR_ANATOP=y
1743+# CONFIG_REGULATOR_TPS6524X is not set
1744+CONFIG_REGULATOR_MAX17135=y
1745+CONFIG_MEDIA_SUPPORT=y
1746+
1747+#
1748+# Multimedia core support
1749+#
1750+# CONFIG_MEDIA_CONTROLLER is not set
1751+CONFIG_VIDEO_DEV=y
1752+CONFIG_VIDEO_V4L2_COMMON=y
1753+# CONFIG_DVB_CORE is not set
1754+CONFIG_VIDEO_MEDIA=y
1755+
1756+#
1757+# Multimedia drivers
1758+#
1759+# CONFIG_RC_CORE is not set
1760+# CONFIG_MEDIA_ATTACH is not set
1761+CONFIG_MEDIA_TUNER=y
1762+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
1763+CONFIG_MEDIA_TUNER_SIMPLE=y
1764+CONFIG_MEDIA_TUNER_TDA8290=y
1765+CONFIG_MEDIA_TUNER_TDA827X=y
1766+CONFIG_MEDIA_TUNER_TDA18271=y
1767+CONFIG_MEDIA_TUNER_TDA9887=y
1768+CONFIG_MEDIA_TUNER_TEA5761=y
1769+CONFIG_MEDIA_TUNER_TEA5767=y
1770+CONFIG_MEDIA_TUNER_MT20XX=y
1771+CONFIG_MEDIA_TUNER_XC2028=y
1772+CONFIG_MEDIA_TUNER_XC5000=y
1773+CONFIG_MEDIA_TUNER_MC44S803=y
1774+CONFIG_VIDEO_V4L2=y
1775+CONFIG_VIDEOBUF_GEN=y
1776+CONFIG_VIDEOBUF_DMA_CONTIG=y
1777+CONFIG_VIDEO_CAPTURE_DRIVERS=y
1778+# CONFIG_VIDEO_ADV_DEBUG is not set
1779+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
1780+# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
1781+
1782+#
1783+# Encoders, decoders, sensors and other helper chips
1784+#
1785+
1786+#
1787+# Audio decoders, processors and mixers
1788+#
1789+# CONFIG_VIDEO_TVAUDIO is not set
1790+# CONFIG_VIDEO_TDA7432 is not set
1791+# CONFIG_VIDEO_TDA9840 is not set
1792+# CONFIG_VIDEO_TEA6415C is not set
1793+# CONFIG_VIDEO_TEA6420 is not set
1794+# CONFIG_VIDEO_MSP3400 is not set
1795+# CONFIG_VIDEO_CS5345 is not set
1796+# CONFIG_VIDEO_CS53L32A is not set
1797+# CONFIG_VIDEO_TLV320AIC23B is not set
1798+# CONFIG_VIDEO_WM8775 is not set
1799+# CONFIG_VIDEO_WM8739 is not set
1800+# CONFIG_VIDEO_VP27SMPX is not set
1801+
1802+#
1803+# RDS decoders
1804+#
1805+# CONFIG_VIDEO_SAA6588 is not set
1806+
1807+#
1808+# Video decoders
1809+#
1810+# CONFIG_VIDEO_ADV7180 is not set
1811+# CONFIG_VIDEO_BT819 is not set
1812+# CONFIG_VIDEO_BT856 is not set
1813+# CONFIG_VIDEO_BT866 is not set
1814+# CONFIG_VIDEO_KS0127 is not set
1815+# CONFIG_VIDEO_SAA7110 is not set
1816+# CONFIG_VIDEO_SAA711X is not set
1817+# CONFIG_VIDEO_SAA7191 is not set
1818+# CONFIG_VIDEO_TVP514X is not set
1819+# CONFIG_VIDEO_TVP5150 is not set
1820+# CONFIG_VIDEO_TVP7002 is not set
1821+# CONFIG_VIDEO_VPX3220 is not set
1822+
1823+#
1824+# Video and audio decoders
1825+#
1826+# CONFIG_VIDEO_SAA717X is not set
1827+# CONFIG_VIDEO_CX25840 is not set
1828+
1829+#
1830+# MPEG video encoders
1831+#
1832+# CONFIG_VIDEO_CX2341X is not set
1833+
1834+#
1835+# Video encoders
1836+#
1837+# CONFIG_VIDEO_SAA7127 is not set
1838+# CONFIG_VIDEO_SAA7185 is not set
1839+# CONFIG_VIDEO_ADV7170 is not set
1840+# CONFIG_VIDEO_ADV7175 is not set
1841+# CONFIG_VIDEO_ADV7343 is not set
1842+# CONFIG_VIDEO_AK881X is not set
1843+
1844+#
1845+# Camera sensor devices
1846+#
1847+# CONFIG_VIDEO_OV7670 is not set
1848+# CONFIG_VIDEO_MT9V011 is not set
1849+# CONFIG_VIDEO_TCM825X is not set
1850+
1851+#
1852+# Video improvement chips
1853+#
1854+# CONFIG_VIDEO_UPD64031A is not set
1855+# CONFIG_VIDEO_UPD64083 is not set
1856+
1857+#
1858+# Miscelaneous helper chips
1859+#
1860+# CONFIG_VIDEO_THS7303 is not set
1861+# CONFIG_VIDEO_M52790 is not set
1862+# CONFIG_VIDEO_VIVI is not set
1863+CONFIG_VIDEO_MXC_CAMERA=m
1864+
1865+#
1866+# MXC Camera/V4L2 PRP Features support
1867+#
1868+CONFIG_VIDEO_MXC_IPU_CAMERA=y
1869+# CONFIG_VIDEO_MXC_CSI_CAMERA is not set
1870+# CONFIG_MXC_CAMERA_MICRON111 is not set
1871+# CONFIG_MXC_CAMERA_OV2640 is not set
1872+# CONFIG_MXC_CAMERA_OV3640 is not set
1873+# CONFIG_MXC_CAMERA_OV5640 is not set
1874+# CONFIG_MXC_CAMERA_OV8820_MIPI is not set
1875+CONFIG_MXC_CAMERA_OV5642=m
1876+# CONFIG_MXC_CAMERA_OV5640_MIPI is not set
1877+CONFIG_MXC_CAMERA_SENSOR_CLK=m
1878+CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m
1879+CONFIG_MXC_IPU_PRP_ENC=m
1880+CONFIG_MXC_IPU_CSI_ENC=m
1881+CONFIG_VIDEO_MXC_OUTPUT=y
1882+CONFIG_VIDEO_MXC_IPU_OUTPUT=y
1883+# CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT is not set
1884+# CONFIG_VIDEO_MXC_OPL is not set
1885+# CONFIG_VIDEO_CPIA2 is not set
1886+# CONFIG_VIDEO_ZORAN is not set
1887+# CONFIG_VIDEO_SAA7134 is not set
1888+# CONFIG_VIDEO_MXB is not set
1889+# CONFIG_VIDEO_HEXIUM_ORION is not set
1890+# CONFIG_VIDEO_HEXIUM_GEMINI is not set
1891+# CONFIG_VIDEO_TIMBERDALE is not set
1892+# CONFIG_VIDEO_CAFE_CCIC is not set
1893+# CONFIG_VIDEO_SR030PC30 is not set
1894+# CONFIG_VIDEO_NOON010PC30 is not set
1895+# CONFIG_SOC_CAMERA is not set
1896+CONFIG_V4L_USB_DRIVERS=y
1897+CONFIG_USB_VIDEO_CLASS=m
1898+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
1899+CONFIG_USB_GSPCA=m
1900+# CONFIG_USB_M5602 is not set
1901+# CONFIG_USB_STV06XX is not set
1902+# CONFIG_USB_GL860 is not set
1903+# CONFIG_USB_GSPCA_BENQ is not set
1904+# CONFIG_USB_GSPCA_CONEX is not set
1905+# CONFIG_USB_GSPCA_CPIA1 is not set
1906+# CONFIG_USB_GSPCA_ETOMS is not set
1907+# CONFIG_USB_GSPCA_FINEPIX is not set
1908+# CONFIG_USB_GSPCA_JEILINJ is not set
1909+# CONFIG_USB_GSPCA_KINECT is not set
1910+# CONFIG_USB_GSPCA_KONICA is not set
1911+# CONFIG_USB_GSPCA_MARS is not set
1912+# CONFIG_USB_GSPCA_MR97310A is not set
1913+# CONFIG_USB_GSPCA_NW80X is not set
1914+# CONFIG_USB_GSPCA_OV519 is not set
1915+# CONFIG_USB_GSPCA_OV534 is not set
1916+# CONFIG_USB_GSPCA_OV534_9 is not set
1917+# CONFIG_USB_GSPCA_PAC207 is not set
1918+# CONFIG_USB_GSPCA_PAC7302 is not set
1919+# CONFIG_USB_GSPCA_PAC7311 is not set
1920+# CONFIG_USB_GSPCA_SN9C2028 is not set
1921+# CONFIG_USB_GSPCA_SN9C20X is not set
1922+# CONFIG_USB_GSPCA_SONIXB is not set
1923+# CONFIG_USB_GSPCA_SONIXJ is not set
1924+# CONFIG_USB_GSPCA_SPCA500 is not set
1925+# CONFIG_USB_GSPCA_SPCA501 is not set
1926+# CONFIG_USB_GSPCA_SPCA505 is not set
1927+# CONFIG_USB_GSPCA_SPCA506 is not set
1928+# CONFIG_USB_GSPCA_SPCA508 is not set
1929+# CONFIG_USB_GSPCA_SPCA561 is not set
1930+# CONFIG_USB_GSPCA_SPCA1528 is not set
1931+# CONFIG_USB_GSPCA_SQ905 is not set
1932+# CONFIG_USB_GSPCA_SQ905C is not set
1933+# CONFIG_USB_GSPCA_SQ930X is not set
1934+# CONFIG_USB_GSPCA_STK014 is not set
1935+# CONFIG_USB_GSPCA_STV0680 is not set
1936+# CONFIG_USB_GSPCA_SUNPLUS is not set
1937+# CONFIG_USB_GSPCA_T613 is not set
1938+# CONFIG_USB_GSPCA_TV8532 is not set
1939+# CONFIG_USB_GSPCA_VC032X is not set
1940+# CONFIG_USB_GSPCA_VICAM is not set
1941+# CONFIG_USB_GSPCA_XIRLINK_CIT is not set
1942+# CONFIG_USB_GSPCA_ZC3XX is not set
1943+# CONFIG_VIDEO_PVRUSB2 is not set
1944+# CONFIG_VIDEO_HDPVR is not set
1945+# CONFIG_VIDEO_USBVISION is not set
1946+# CONFIG_USB_ET61X251 is not set
1947+# CONFIG_USB_SN9C102 is not set
1948+# CONFIG_USB_PWC is not set
1949+# CONFIG_USB_ZR364XX is not set
1950+# CONFIG_USB_STKWEBCAM is not set
1951+# CONFIG_USB_S2255 is not set
1952+# CONFIG_V4L_MEM2MEM_DRIVERS is not set
1953+# CONFIG_RADIO_ADAPTERS is not set
1954+
1955+#
1956+# Graphics support
1957+#
1958+CONFIG_VGA_ARB=y
1959+CONFIG_VGA_ARB_MAX_GPUS=16
1960+CONFIG_DRM=m
1961+CONFIG_DRM_VIVANTE=m
1962+# CONFIG_STUB_POULSBO is not set
1963+# CONFIG_VGASTATE is not set
1964+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
1965+CONFIG_FB=y
1966+# CONFIG_FIRMWARE_EDID is not set
1967+# CONFIG_FB_DDC is not set
1968+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
1969+CONFIG_FB_CFB_FILLRECT=y
1970+CONFIG_FB_CFB_COPYAREA=y
1971+CONFIG_FB_CFB_IMAGEBLIT=y
1972+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
1973+# CONFIG_FB_SYS_FILLRECT is not set
1974+# CONFIG_FB_SYS_COPYAREA is not set
1975+# CONFIG_FB_SYS_IMAGEBLIT is not set
1976+# CONFIG_FB_FOREIGN_ENDIAN is not set
1977+# CONFIG_FB_SYS_FOPS is not set
1978+# CONFIG_FB_WMT_GE_ROPS is not set
1979+# CONFIG_FB_SVGALIB is not set
1980+# CONFIG_FB_MACMODES is not set
1981+# CONFIG_FB_BACKLIGHT is not set
1982+CONFIG_FB_MODE_HELPERS=y
1983+# CONFIG_FB_TILEBLITTING is not set
1984+
1985+#
1986+# Frame buffer hardware drivers
1987+#
1988+# CONFIG_FB_CIRRUS is not set
1989+# CONFIG_FB_PM2 is not set
1990+# CONFIG_FB_CYBER2000 is not set
1991+# CONFIG_FB_ASILIANT is not set
1992+# CONFIG_FB_IMSTT is not set
1993+# CONFIG_FB_UVESA is not set
1994+# CONFIG_FB_S1D13XXX is not set
1995+# CONFIG_FB_NVIDIA is not set
1996+# CONFIG_FB_RIVA is not set
1997+# CONFIG_FB_MATROX is not set
1998+# CONFIG_FB_RADEON is not set
1999+# CONFIG_FB_ATY128 is not set
2000+# CONFIG_FB_ATY is not set
2001+# CONFIG_FB_S3 is not set
2002+# CONFIG_FB_SAVAGE is not set
2003+# CONFIG_FB_SIS is not set
2004+# CONFIG_FB_NEOMAGIC is not set
2005+# CONFIG_FB_KYRO is not set
2006+# CONFIG_FB_3DFX is not set
2007+# CONFIG_FB_VOODOO1 is not set
2008+# CONFIG_FB_VT8623 is not set
2009+# CONFIG_FB_TRIDENT is not set
2010+# CONFIG_FB_ARK is not set
2011+# CONFIG_FB_PM3 is not set
2012+# CONFIG_FB_CARMINE is not set
2013+# CONFIG_FB_TMIO is not set
2014+# CONFIG_FB_UDL is not set
2015+# CONFIG_FB_VIRTUAL is not set
2016+# CONFIG_FB_METRONOME is not set
2017+# CONFIG_FB_MB862XX is not set
2018+# CONFIG_FB_BROADSHEET is not set
2019+CONFIG_BACKLIGHT_LCD_SUPPORT=y
2020+# CONFIG_LCD_CLASS_DEVICE is not set
2021+CONFIG_BACKLIGHT_CLASS_DEVICE=y
2022+# CONFIG_BACKLIGHT_GENERIC is not set
2023+CONFIG_BACKLIGHT_PWM=y
2024+# CONFIG_BACKLIGHT_ADP8860 is not set
2025+# CONFIG_BACKLIGHT_ADP8870 is not set
2026+
2027+#
2028+# Display device support
2029+#
2030+# CONFIG_DISPLAY_SUPPORT is not set
2031+CONFIG_FB_MXC=y
2032+CONFIG_FB_MXC_EDID=y
2033+CONFIG_FB_MXC_SYNC_PANEL=y
2034+# CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL is not set
2035+CONFIG_FB_MXC_LDB=y
2036+CONFIG_FB_MXC_MIPI_DSI=y
2037+CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y
2038+# CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set
2039+# CONFIG_FB_MXC_SEIKO_WVGA_SYNC_PANEL is not set
2040+# CONFIG_FB_MXC_SII902X is not set
2041+# CONFIG_FB_MXC_CH7026 is not set
2042+# CONFIG_FB_MXC_TVOUT_CH7024 is not set
2043+# CONFIG_FB_MXC_ASYNC_PANEL is not set
2044+# CONFIG_FB_MXC_EINK_PANEL is not set
2045+# CONFIG_FB_MXC_SIPIX_PANEL is not set
2046+# CONFIG_FB_MXC_ELCDIF_FB is not set
2047+CONFIG_FB_MXC_HDMI=y
2048+
2049+#
2050+# Console display driver support
2051+#
2052+CONFIG_DUMMY_CONSOLE=y
2053+CONFIG_FRAMEBUFFER_CONSOLE=y
2054+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
2055+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
2056+CONFIG_FONTS=y
2057+# CONFIG_FONT_8x8 is not set
2058+CONFIG_FONT_8x16=y
2059+# CONFIG_FONT_6x11 is not set
2060+# CONFIG_FONT_7x14 is not set
2061+# CONFIG_FONT_PEARL_8x8 is not set
2062+# CONFIG_FONT_ACORN_8x8 is not set
2063+# CONFIG_FONT_MINI_4x6 is not set
2064+# CONFIG_FONT_SUN8x16 is not set
2065+# CONFIG_FONT_SUN12x22 is not set
2066+# CONFIG_FONT_10x18 is not set
2067+CONFIG_LOGO=y
2068+CONFIG_LOGO_LINUX_MONO=y
2069+CONFIG_LOGO_LINUX_VGA16=y
2070+CONFIG_LOGO_LINUX_CLUT224=y
2071+CONFIG_SOUND=y
2072+# CONFIG_SOUND_OSS_CORE is not set
2073+CONFIG_SND=y
2074+CONFIG_SND_TIMER=y
2075+CONFIG_SND_PCM=y
2076+CONFIG_SND_HWDEP=y
2077+CONFIG_SND_RAWMIDI=y
2078+CONFIG_SND_JACK=y
2079+# CONFIG_SND_SEQUENCER is not set
2080+# CONFIG_SND_MIXER_OSS is not set
2081+# CONFIG_SND_PCM_OSS is not set
2082+# CONFIG_SND_HRTIMER is not set
2083+# CONFIG_SND_DYNAMIC_MINORS is not set
2084+CONFIG_SND_SUPPORT_OLD_API=y
2085+CONFIG_SND_VERBOSE_PROCFS=y
2086+# CONFIG_SND_VERBOSE_PRINTK is not set
2087+# CONFIG_SND_DEBUG is not set
2088+# CONFIG_SND_RAWMIDI_SEQ is not set
2089+# CONFIG_SND_OPL3_LIB_SEQ is not set
2090+# CONFIG_SND_OPL4_LIB_SEQ is not set
2091+# CONFIG_SND_SBAWE_SEQ is not set
2092+# CONFIG_SND_EMU10K1_SEQ is not set
2093+CONFIG_SND_DRIVERS=y
2094+# CONFIG_SND_DUMMY is not set
2095+# CONFIG_SND_ALOOP is not set
2096+# CONFIG_SND_MTPAV is not set
2097+# CONFIG_SND_SERIAL_U16550 is not set
2098+# CONFIG_SND_MPU401 is not set
2099+CONFIG_SND_PCI=y
2100+# CONFIG_SND_AD1889 is not set
2101+# CONFIG_SND_ALS300 is not set
2102+# CONFIG_SND_ALI5451 is not set
2103+# CONFIG_SND_ATIIXP is not set
2104+# CONFIG_SND_ATIIXP_MODEM is not set
2105+# CONFIG_SND_AU8810 is not set
2106+# CONFIG_SND_AU8820 is not set
2107+# CONFIG_SND_AU8830 is not set
2108+# CONFIG_SND_AW2 is not set
2109+# CONFIG_SND_AZT3328 is not set
2110+# CONFIG_SND_BT87X is not set
2111+# CONFIG_SND_CA0106 is not set
2112+# CONFIG_SND_CMIPCI is not set
2113+# CONFIG_SND_OXYGEN is not set
2114+# CONFIG_SND_CS4281 is not set
2115+# CONFIG_SND_CS46XX is not set
2116+# CONFIG_SND_CS5535AUDIO is not set
2117+# CONFIG_SND_CTXFI is not set
2118+# CONFIG_SND_DARLA20 is not set
2119+# CONFIG_SND_GINA20 is not set
2120+# CONFIG_SND_LAYLA20 is not set
2121+# CONFIG_SND_DARLA24 is not set
2122+# CONFIG_SND_GINA24 is not set
2123+# CONFIG_SND_LAYLA24 is not set
2124+# CONFIG_SND_MONA is not set
2125+# CONFIG_SND_MIA is not set
2126+# CONFIG_SND_ECHO3G is not set
2127+# CONFIG_SND_INDIGO is not set
2128+# CONFIG_SND_INDIGOIO is not set
2129+# CONFIG_SND_INDIGODJ is not set
2130+# CONFIG_SND_INDIGOIOX is not set
2131+# CONFIG_SND_INDIGODJX is not set
2132+# CONFIG_SND_EMU10K1 is not set
2133+# CONFIG_SND_EMU10K1X is not set
2134+# CONFIG_SND_ENS1370 is not set
2135+# CONFIG_SND_ENS1371 is not set
2136+# CONFIG_SND_ES1938 is not set
2137+# CONFIG_SND_ES1968 is not set
2138+# CONFIG_SND_FM801 is not set
2139+# CONFIG_SND_HDA_INTEL is not set
2140+# CONFIG_SND_HDSP is not set
2141+# CONFIG_SND_HDSPM is not set
2142+# CONFIG_SND_ICE1712 is not set
2143+# CONFIG_SND_ICE1724 is not set
2144+# CONFIG_SND_INTEL8X0 is not set
2145+# CONFIG_SND_INTEL8X0M is not set
2146+# CONFIG_SND_KORG1212 is not set
2147+# CONFIG_SND_LOLA is not set
2148+# CONFIG_SND_LX6464ES is not set
2149+# CONFIG_SND_MAESTRO3 is not set
2150+# CONFIG_SND_MIXART is not set
2151+# CONFIG_SND_NM256 is not set
2152+# CONFIG_SND_PCXHR is not set
2153+# CONFIG_SND_RIPTIDE is not set
2154+# CONFIG_SND_RME32 is not set
2155+# CONFIG_SND_RME96 is not set
2156+# CONFIG_SND_RME9652 is not set
2157+# CONFIG_SND_SONICVIBES is not set
2158+# CONFIG_SND_TRIDENT is not set
2159+# CONFIG_SND_VIA82XX is not set
2160+# CONFIG_SND_VIA82XX_MODEM is not set
2161+# CONFIG_SND_VIRTUOSO is not set
2162+# CONFIG_SND_VX222 is not set
2163+# CONFIG_SND_YMFPCI is not set
2164+CONFIG_SND_ARM=y
2165+CONFIG_SND_SPI=y
2166+CONFIG_SND_USB=y
2167+CONFIG_SND_USB_AUDIO=y
2168+# CONFIG_SND_USB_UA101 is not set
2169+# CONFIG_SND_USB_CAIAQ is not set
2170+# CONFIG_SND_USB_6FIRE is not set
2171+CONFIG_SND_SOC=y
2172+# CONFIG_SND_SOC_CACHE_LZO is not set
2173+CONFIG_SND_SOC_AC97_BUS=y
2174+CONFIG_SND_IMX_SOC=y
2175+CONFIG_SND_MXC_SOC_MX2=y
2176+CONFIG_SND_MXC_SOC_SPDIF_DAI=y
2177+CONFIG_SND_SOC_IMX_SGTL5000=y
2178+# CONFIG_SND_SOC_IMX_WM8958 is not set
2179+# CONFIG_SND_SOC_IMX_WM8962 is not set
2180+# CONFIG_SND_SOC_IMX_SI4763 is not set
2181+CONFIG_SND_SOC_IMX_SPDIF=y
2182+CONFIG_SND_SOC_IMX_HDMI=y
2183+CONFIG_SND_SOC_I2C_AND_SPI=y
2184+# CONFIG_SND_SOC_ALL_CODECS is not set
2185+CONFIG_SND_SOC_MXC_HDMI=y
2186+CONFIG_SND_SOC_MXC_SPDIF=y
2187+CONFIG_SND_SOC_SGTL5000=y
2188+# CONFIG_SOUND_PRIME is not set
2189+CONFIG_AC97_BUS=y
2190+CONFIG_HID_SUPPORT=y
2191+CONFIG_HID=y
2192+CONFIG_HIDRAW=y
2193+
2194+#
2195+# USB Input Devices
2196+#
2197+CONFIG_USB_HID=y
2198+# CONFIG_HID_PID is not set
2199+# CONFIG_USB_HIDDEV is not set
2200+
2201+#
2202+# Special HID drivers
2203+#
2204+# CONFIG_HID_A4TECH is not set
2205+# CONFIG_HID_ACRUX is not set
2206+# CONFIG_HID_APPLE is not set
2207+# CONFIG_HID_BELKIN is not set
2208+# CONFIG_HID_CHERRY is not set
2209+# CONFIG_HID_CHICONY is not set
2210+# CONFIG_HID_PRODIKEYS is not set
2211+# CONFIG_HID_CYPRESS is not set
2212+# CONFIG_HID_DRAGONRISE is not set
2213+# CONFIG_HID_EMS_FF is not set
2214+# CONFIG_HID_ELECOM is not set
2215+# CONFIG_HID_EZKEY is not set
2216+# CONFIG_HID_KEYTOUCH is not set
2217+# CONFIG_HID_KYE is not set
2218+# CONFIG_HID_UCLOGIC is not set
2219+# CONFIG_HID_WALTOP is not set
2220+# CONFIG_HID_GYRATION is not set
2221+# CONFIG_HID_TWINHAN is not set
2222+# CONFIG_HID_KENSINGTON is not set
2223+# CONFIG_HID_LCPOWER is not set
2224+# CONFIG_HID_LOGITECH is not set
2225+# CONFIG_HID_MAGICMOUSE is not set
2226+# CONFIG_HID_MICROSOFT is not set
2227+# CONFIG_HID_MONTEREY is not set
2228+# CONFIG_HID_MULTITOUCH is not set
2229+# CONFIG_HID_NTRIG is not set
2230+# CONFIG_HID_ORTEK is not set
2231+# CONFIG_HID_PANTHERLORD is not set
2232+# CONFIG_HID_PETALYNX is not set
2233+# CONFIG_HID_PICOLCD is not set
2234+CONFIG_HID_QUANTA=y
2235+# CONFIG_HID_ROCCAT is not set
2236+# CONFIG_HID_ROCCAT_ARVO is not set
2237+# CONFIG_HID_ROCCAT_KONE is not set
2238+# CONFIG_HID_ROCCAT_KONEPLUS is not set
2239+# CONFIG_HID_ROCCAT_KOVAPLUS is not set
2240+# CONFIG_HID_ROCCAT_PYRA is not set
2241+CONFIG_HID_SAMSUNG=m
2242+CONFIG_HID_SONY=m
2243+CONFIG_HID_SUNPLUS=m
2244+# CONFIG_HID_GREENASIA is not set
2245+# CONFIG_HID_SMARTJOYPLUS is not set
2246+# CONFIG_HID_TOPSEED is not set
2247+# CONFIG_HID_THRUSTMASTER is not set
2248+# CONFIG_HID_WACOM is not set
2249+# CONFIG_HID_ZEROPLUS is not set
2250+# CONFIG_HID_ZYDACRON is not set
2251+CONFIG_USB_SUPPORT=y
2252+CONFIG_USB_ARCH_HAS_HCD=y
2253+CONFIG_USB_ARCH_HAS_OHCI=y
2254+CONFIG_USB_ARCH_HAS_EHCI=y
2255+CONFIG_USB=y
2256+# CONFIG_USB_DEBUG is not set
2257+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
2258+
2259+#
2260+# Miscellaneous USB options
2261+#
2262+CONFIG_USB_DEVICEFS=y
2263+# CONFIG_USB_DEVICE_CLASS is not set
2264+# CONFIG_USB_DYNAMIC_MINORS is not set
2265+CONFIG_USB_SUSPEND=y
2266+CONFIG_USB_OTG=y
2267+# CONFIG_USB_OTG_WHITELIST is not set
2268+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
2269+# CONFIG_USB_MON is not set
2270+# CONFIG_USB_WUSB is not set
2271+# CONFIG_USB_WUSB_CBAF is not set
2272+
2273+#
2274+# USB Host Controller Drivers
2275+#
2276+# CONFIG_USB_C67X00_HCD is not set
2277+# CONFIG_USB_XHCI_HCD is not set
2278+CONFIG_USB_EHCI_HCD=y
2279+CONFIG_USB_EHCI_ARC=y
2280+CONFIG_USB_EHCI_ARC_OTG=y
2281+# CONFIG_USB_EHCI_ARC_HSIC is not set
2282+# CONFIG_USB_STATIC_IRAM is not set
2283+CONFIG_USB_EHCI_ROOT_HUB_TT=y
2284+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
2285+# CONFIG_USB_EHCI_MXC is not set
2286+# CONFIG_USB_OXU210HP_HCD is not set
2287+# CONFIG_USB_ISP116X_HCD is not set
2288+# CONFIG_USB_ISP1760_HCD is not set
2289+# CONFIG_USB_ISP1362_HCD is not set
2290+# CONFIG_USB_OHCI_HCD is not set
2291+# CONFIG_USB_UHCI_HCD is not set
2292+# CONFIG_USB_SL811_HCD is not set
2293+# CONFIG_USB_R8A66597_HCD is not set
2294+# CONFIG_USB_WHCI_HCD is not set
2295+# CONFIG_USB_HWA_HCD is not set
2296+# CONFIG_USB_MUSB_HDRC is not set
2297+
2298+#
2299+# USB Device Class drivers
2300+#
2301+CONFIG_USB_ACM=y
2302+# CONFIG_USB_PRINTER is not set
2303+# CONFIG_USB_WDM is not set
2304+# CONFIG_USB_TMC is not set
2305+
2306+#
2307+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
2308+#
2309+
2310+#
2311+# also be needed; see USB_STORAGE Help for more info
2312+#
2313+CONFIG_USB_STORAGE=y
2314+# CONFIG_USB_STORAGE_DEBUG is not set
2315+# CONFIG_USB_STORAGE_REALTEK is not set
2316+# CONFIG_USB_STORAGE_DATAFAB is not set
2317+# CONFIG_USB_STORAGE_FREECOM is not set
2318+# CONFIG_USB_STORAGE_ISD200 is not set
2319+# CONFIG_USB_STORAGE_USBAT is not set
2320+# CONFIG_USB_STORAGE_SDDR09 is not set
2321+# CONFIG_USB_STORAGE_SDDR55 is not set
2322+# CONFIG_USB_STORAGE_JUMPSHOT is not set
2323+# CONFIG_USB_STORAGE_ALAUDA is not set
2324+# CONFIG_USB_STORAGE_ONETOUCH is not set
2325+# CONFIG_USB_STORAGE_KARMA is not set
2326+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
2327+# CONFIG_USB_STORAGE_ENE_UB6250 is not set
2328+# CONFIG_USB_UAS is not set
2329+# CONFIG_USB_LIBUSUAL is not set
2330+
2331+#
2332+# USB Imaging devices
2333+#
2334+# CONFIG_USB_MDC800 is not set
2335+# CONFIG_USB_MICROTEK is not set
2336+
2337+#
2338+# USB port drivers
2339+#
2340+CONFIG_USB_SERIAL=y
2341+# CONFIG_USB_SERIAL_CONSOLE is not set
2342+# CONFIG_USB_EZUSB is not set
2343+# CONFIG_USB_SERIAL_GENERIC is not set
2344+# CONFIG_USB_SERIAL_AIRCABLE is not set
2345+# CONFIG_USB_SERIAL_ARK3116 is not set
2346+# CONFIG_USB_SERIAL_BELKIN is not set
2347+# CONFIG_USB_SERIAL_CH341 is not set
2348+# CONFIG_USB_SERIAL_WHITEHEAT is not set
2349+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
2350+# CONFIG_USB_SERIAL_CP210X is not set
2351+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
2352+# CONFIG_USB_SERIAL_EMPEG is not set
2353+# CONFIG_USB_SERIAL_FTDI_SIO is not set
2354+# CONFIG_USB_SERIAL_FUNSOFT is not set
2355+# CONFIG_USB_SERIAL_VISOR is not set
2356+# CONFIG_USB_SERIAL_IPAQ is not set
2357+# CONFIG_USB_SERIAL_IR is not set
2358+# CONFIG_USB_SERIAL_EDGEPORT is not set
2359+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
2360+# CONFIG_USB_SERIAL_GARMIN is not set
2361+# CONFIG_USB_SERIAL_IPW is not set
2362+# CONFIG_USB_SERIAL_IUU is not set
2363+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
2364+# CONFIG_USB_SERIAL_KEYSPAN is not set
2365+# CONFIG_USB_SERIAL_KLSI is not set
2366+# CONFIG_USB_SERIAL_KOBIL_SCT is not set
2367+# CONFIG_USB_SERIAL_MCT_U232 is not set
2368+# CONFIG_USB_SERIAL_MOS7720 is not set
2369+# CONFIG_USB_SERIAL_MOS7840 is not set
2370+# CONFIG_USB_SERIAL_MOTOROLA is not set
2371+# CONFIG_USB_SERIAL_NAVMAN is not set
2372+# CONFIG_USB_SERIAL_PL2303 is not set
2373+# CONFIG_USB_SERIAL_OTI6858 is not set
2374+# CONFIG_USB_SERIAL_QCAUX is not set
2375+CONFIG_USB_SERIAL_QUALCOMM=y
2376+# CONFIG_USB_SERIAL_SPCP8X5 is not set
2377+# CONFIG_USB_SERIAL_HP4X is not set
2378+# CONFIG_USB_SERIAL_SAFE is not set
2379+# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
2380+# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
2381+# CONFIG_USB_SERIAL_SYMBOL is not set
2382+# CONFIG_USB_SERIAL_TI is not set
2383+# CONFIG_USB_SERIAL_CYBERJACK is not set
2384+# CONFIG_USB_SERIAL_XIRCOM is not set
2385+CONFIG_USB_SERIAL_WWAN=y
2386+CONFIG_USB_SERIAL_OPTION=y
2387+# CONFIG_USB_SERIAL_OMNINET is not set
2388+# CONFIG_USB_SERIAL_OPTICON is not set
2389+# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set
2390+# CONFIG_USB_SERIAL_ZIO is not set
2391+# CONFIG_USB_SERIAL_SSU100 is not set
2392+# CONFIG_USB_SERIAL_DEBUG is not set
2393+
2394+#
2395+# USB Miscellaneous drivers
2396+#
2397+# CONFIG_USB_EMI62 is not set
2398+# CONFIG_USB_EMI26 is not set
2399+# CONFIG_USB_ADUTUX is not set
2400+# CONFIG_USB_SEVSEG is not set
2401+# CONFIG_USB_RIO500 is not set
2402+# CONFIG_USB_LEGOTOWER is not set
2403+# CONFIG_USB_LCD is not set
2404+# CONFIG_USB_LED is not set
2405+# CONFIG_USB_CYPRESS_CY7C63 is not set
2406+# CONFIG_USB_CYTHERM is not set
2407+# CONFIG_USB_IDMOUSE is not set
2408+# CONFIG_USB_FTDI_ELAN is not set
2409+# CONFIG_USB_APPLEDISPLAY is not set
2410+# CONFIG_USB_SISUSBVGA is not set
2411+# CONFIG_USB_LD is not set
2412+# CONFIG_USB_TRANCEVIBRATOR is not set
2413+# CONFIG_USB_IOWARRIOR is not set
2414+# CONFIG_USB_TEST is not set
2415+# CONFIG_USB_ISIGHTFW is not set
2416+# CONFIG_USB_YUREX is not set
2417+CONFIG_USB_GADGET=y
2418+# CONFIG_USB_GADGET_DEBUG_FILES is not set
2419+# CONFIG_USB_GADGET_DEBUG_FS is not set
2420+CONFIG_USB_GADGET_VBUS_DRAW=2
2421+CONFIG_USB_GADGET_SELECTED=y
2422+CONFIG_USB_GADGET_ARC=y
2423+# CONFIG_IMX_USB_CHARGER is not set
2424+CONFIG_USB_ARC=y
2425+# CONFIG_USB_GADGET_FSL_USB2 is not set
2426+# CONFIG_USB_GADGET_FUSB300 is not set
2427+# CONFIG_USB_GADGET_R8A66597 is not set
2428+# CONFIG_USB_GADGET_PXA_U2O is not set
2429+# CONFIG_USB_GADGET_M66592 is not set
2430+# CONFIG_USB_GADGET_AMD5536UDC is not set
2431+# CONFIG_USB_GADGET_CI13XXX_PCI is not set
2432+# CONFIG_USB_GADGET_NET2280 is not set
2433+# CONFIG_USB_GADGET_GOKU is not set
2434+# CONFIG_USB_GADGET_LANGWELL is not set
2435+# CONFIG_USB_GADGET_EG20T is not set
2436+# CONFIG_USB_GADGET_DUMMY_HCD is not set
2437+CONFIG_USB_GADGET_DUALSPEED=y
2438+# CONFIG_USB_ZERO is not set
2439+# CONFIG_USB_AUDIO is not set
2440+# CONFIG_USB_ETH is not set
2441+# CONFIG_USB_G_NCM is not set
2442+# CONFIG_USB_GADGETFS is not set
2443+# CONFIG_USB_FUNCTIONFS is not set
2444+CONFIG_USB_FILE_STORAGE=m
2445+# CONFIG_FSL_UTP is not set
2446+# CONFIG_USB_FILE_STORAGE_TEST is not set
2447+# CONFIG_USB_MASS_STORAGE is not set
2448+CONFIG_USB_G_SERIAL=m
2449+# CONFIG_USB_MIDI_GADGET is not set
2450+# CONFIG_USB_G_PRINTER is not set
2451+# CONFIG_USB_CDC_COMPOSITE is not set
2452+# CONFIG_USB_G_MULTI is not set
2453+# CONFIG_USB_G_HID is not set
2454+# CONFIG_USB_G_DBGP is not set
2455+# CONFIG_USB_G_WEBCAM is not set
2456+
2457+#
2458+# OTG and related infrastructure
2459+#
2460+CONFIG_USB_OTG_UTILS=y
2461+# CONFIG_USB_GPIO_VBUS is not set
2462+# CONFIG_USB_ULPI is not set
2463+# CONFIG_NOP_USB_XCEIV is not set
2464+CONFIG_MXC_OTG=y
2465+# CONFIG_UWB is not set
2466+CONFIG_MMC=y
2467+# CONFIG_MMC_DEBUG is not set
2468+CONFIG_MMC_UNSAFE_RESUME=y
2469+# CONFIG_MMC_CLKGATE is not set
2470+
2471+#
2472+# MMC/SD/SDIO Card Drivers
2473+#
2474+CONFIG_MMC_BLOCK=y
2475+CONFIG_MMC_BLOCK_MINORS=8
2476+CONFIG_MMC_BLOCK_BOUNCE=y
2477+# CONFIG_SDIO_UART is not set
2478+# CONFIG_MMC_TEST is not set
2479+
2480+#
2481+# MMC/SD/SDIO Host Controller Drivers
2482+#
2483+CONFIG_MMC_SDHCI=y
2484+CONFIG_MMC_SDHCI_IO_ACCESSORS=y
2485+# CONFIG_MMC_SDHCI_PCI is not set
2486+CONFIG_MMC_SDHCI_PLTFM=y
2487+CONFIG_MMC_SDHCI_ESDHC_IMX=y
2488+# CONFIG_MMC_TIFM_SD is not set
2489+# CONFIG_MMC_CB710 is not set
2490+# CONFIG_MMC_VIA_SDMMC is not set
2491+# CONFIG_MMC_DW is not set
2492+# CONFIG_MMC_VUB300 is not set
2493+# CONFIG_MMC_USHC is not set
2494+# CONFIG_MEMSTICK is not set
2495+CONFIG_NEW_LEDS=y
2496+CONFIG_LEDS_CLASS=y
2497+
2498+#
2499+# LED drivers
2500+#
2501+# CONFIG_LEDS_LM3530 is not set
2502+# CONFIG_LEDS_PCA9532 is not set
2503+CONFIG_LEDS_GPIO=y
2504+CONFIG_LEDS_GPIO_PLATFORM=y
2505+# CONFIG_LEDS_LP3944 is not set
2506+# CONFIG_LEDS_LP5521 is not set
2507+# CONFIG_LEDS_LP5523 is not set
2508+# CONFIG_LEDS_PCA955X is not set
2509+# CONFIG_LEDS_DAC124S085 is not set
2510+# CONFIG_LEDS_PWM is not set
2511+# CONFIG_LEDS_REGULATOR is not set
2512+# CONFIG_LEDS_BD2802 is not set
2513+# CONFIG_LEDS_LT3593 is not set
2514+CONFIG_LEDS_TRIGGERS=y
2515+
2516+#
2517+# LED Triggers
2518+#
2519+# CONFIG_LEDS_TRIGGER_TIMER is not set
2520+# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
2521+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
2522+CONFIG_LEDS_TRIGGER_GPIO=y
2523+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
2524+
2525+#
2526+# iptables trigger is under Netfilter config (LED target)
2527+#
2528+
2529+#
2530+# LED Triggers
2531+#
2532+# CONFIG_NFC_DEVICES is not set
2533+# CONFIG_ACCESSIBILITY is not set
2534+# CONFIG_INFINIBAND is not set
2535+CONFIG_RTC_LIB=y
2536+CONFIG_RTC_CLASS=y
2537+CONFIG_RTC_HCTOSYS=y
2538+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
2539+# CONFIG_RTC_DEBUG is not set
2540+
2541+#
2542+# RTC interfaces
2543+#
2544+CONFIG_RTC_INTF_SYSFS=y
2545+CONFIG_RTC_INTF_PROC=y
2546+CONFIG_RTC_INTF_DEV=y
2547+CONFIG_RTC_INTF_DEV_UIE_EMUL=y
2548+# CONFIG_RTC_DRV_TEST is not set
2549+
2550+#
2551+# I2C RTC drivers
2552+#
2553+# CONFIG_RTC_DRV_DS1307 is not set
2554+# CONFIG_RTC_DRV_DS1374 is not set
2555+# CONFIG_RTC_DRV_DS1672 is not set
2556+# CONFIG_RTC_DRV_DS3232 is not set
2557+# CONFIG_RTC_DRV_MAX6900 is not set
2558+# CONFIG_RTC_DRV_RS5C372 is not set
2559+# CONFIG_RTC_DRV_ISL1208 is not set
2560+# CONFIG_RTC_DRV_ISL12022 is not set
2561+# CONFIG_RTC_DRV_X1205 is not set
2562+# CONFIG_RTC_DRV_PCF8563 is not set
2563+# CONFIG_RTC_DRV_PCF8583 is not set
2564+# CONFIG_RTC_DRV_M41T80 is not set
2565+# CONFIG_RTC_DRV_BQ32K is not set
2566+# CONFIG_RTC_DRV_S35390A is not set
2567+# CONFIG_RTC_DRV_FM3130 is not set
2568+# CONFIG_RTC_DRV_RX8581 is not set
2569+# CONFIG_RTC_DRV_RX8025 is not set
2570+# CONFIG_RTC_DRV_EM3027 is not set
2571+# CONFIG_RTC_DRV_RV3029C2 is not set
2572+
2573+#
2574+# SPI RTC drivers
2575+#
2576+# CONFIG_RTC_DRV_M41T93 is not set
2577+# CONFIG_RTC_DRV_M41T94 is not set
2578+# CONFIG_RTC_DRV_DS1305 is not set
2579+# CONFIG_RTC_DRV_DS1390 is not set
2580+# CONFIG_RTC_DRV_MAX6902 is not set
2581+# CONFIG_RTC_DRV_R9701 is not set
2582+# CONFIG_RTC_DRV_RS5C348 is not set
2583+# CONFIG_RTC_DRV_DS3234 is not set
2584+# CONFIG_RTC_DRV_PCF2123 is not set
2585+
2586+#
2587+# Platform RTC drivers
2588+#
2589+# CONFIG_RTC_DRV_CMOS is not set
2590+# CONFIG_RTC_DRV_DS1286 is not set
2591+# CONFIG_RTC_DRV_DS1511 is not set
2592+# CONFIG_RTC_DRV_DS1553 is not set
2593+# CONFIG_RTC_DRV_DS1742 is not set
2594+# CONFIG_RTC_DRV_STK17TA8 is not set
2595+# CONFIG_RTC_DRV_M48T86 is not set
2596+# CONFIG_RTC_DRV_M48T35 is not set
2597+# CONFIG_RTC_DRV_M48T59 is not set
2598+# CONFIG_RTC_DRV_MSM6242 is not set
2599+# CONFIG_RTC_MXC is not set
2600+# CONFIG_RTC_DRV_MXC_V2 is not set
2601+CONFIG_RTC_DRV_SNVS=y
2602+# CONFIG_RTC_DRV_BQ4802 is not set
2603+# CONFIG_RTC_DRV_RP5C01 is not set
2604+# CONFIG_RTC_DRV_V3020 is not set
2605+
2606+#
2607+# on-CPU RTC drivers
2608+#
2609+CONFIG_DMADEVICES=y
2610+# CONFIG_DMADEVICES_DEBUG is not set
2611+
2612+#
2613+# DMA Devices
2614+#
2615+# CONFIG_DW_DMAC is not set
2616+CONFIG_MXC_PXP_V2=y
2617+CONFIG_MXC_PXP_CLIENT_DEVICE=y
2618+# CONFIG_TIMB_DMA is not set
2619+CONFIG_IMX_SDMA=y
2620+# CONFIG_MXS_DMA is not set
2621+CONFIG_DMA_ENGINE=y
2622+
2623+#
2624+# DMA Clients
2625+#
2626+# CONFIG_NET_DMA is not set
2627+# CONFIG_ASYNC_TX_DMA is not set
2628+# CONFIG_DMATEST is not set
2629+# CONFIG_AUXDISPLAY is not set
2630+# CONFIG_UIO is not set
2631+# CONFIG_STAGING is not set
2632+CONFIG_CLKDEV_LOOKUP=y
2633+CONFIG_CLKSRC_MMIO=y
2634+
2635+#
2636+# MXC support drivers
2637+#
2638+CONFIG_MXC_IPU=y
2639+CONFIG_MXC_IPU_V3=y
2640+CONFIG_MXC_IPU_V3H=y
2641+
2642+#
2643+# MXC SSI support
2644+#
2645+# CONFIG_MXC_SSI is not set
2646+
2647+#
2648+# MXC Digital Audio Multiplexer support
2649+#
2650+# CONFIG_MXC_DAM is not set
2651+
2652+#
2653+# MXC PMIC support
2654+#
2655+# CONFIG_MXC_PMIC_MC13783 is not set
2656+# CONFIG_MXC_PMIC_MC13892 is not set
2657+# CONFIG_MXC_PMIC_MC34704 is not set
2658+# CONFIG_MXC_PMIC_MC9SDZ60 is not set
2659+# CONFIG_MXC_PMIC_MC9S08DZ60 is not set
2660+
2661+#
2662+# MXC Security Drivers
2663+#
2664+# CONFIG_MXC_SECURITY_SCC is not set
2665+# CONFIG_MXC_SECURITY_RNG is not set
2666+
2667+#
2668+# MXC MPEG4 Encoder Kernel module support
2669+#
2670+# CONFIG_MXC_HMP4E is not set
2671+
2672+#
2673+# MXC HARDWARE EVENT
2674+#
2675+# CONFIG_MXC_HWEVENT is not set
2676+
2677+#
2678+# MXC VPU(Video Processing Unit) support
2679+#
2680+CONFIG_MXC_VPU=y
2681+# CONFIG_MXC_VPU_DEBUG is not set
2682+# CONFIG_MX6_VPU_352M is not set
2683+
2684+#
2685+# MXC Asynchronous Sample Rate Converter support
2686+#
2687+CONFIG_MXC_ASRC=y
2688+
2689+#
2690+# MXC Bluetooth support
2691+#
2692+
2693+#
2694+# Broadcom GPS ioctrl support
2695+#
2696+
2697+#
2698+# MXC Media Local Bus Driver
2699+#
2700+# CONFIG_MXC_MLB150 is not set
2701+
2702+#
2703+# i.MX ADC support
2704+#
2705+# CONFIG_IMX_ADC is not set
2706+
2707+#
2708+# MXC Vivante GPU support
2709+#
2710+CONFIG_MXC_GPU_VIV=m
2711+
2712+#
2713+# ANATOP_THERMAL
2714+#
2715+CONFIG_ANATOP_THERMAL=y
2716+
2717+#
2718+# MXC MIPI Support
2719+#
2720+CONFIG_MXC_MIPI_CSI2=y
2721+
2722+#
2723+# MXC HDMI CEC (Consumer Electronics Control) support
2724+#
2725+# CONFIG_MXC_HDMI_CEC is not set
2726+
2727+#
2728+# File systems
2729+#
2730+CONFIG_EXT2_FS=y
2731+# CONFIG_EXT2_FS_XATTR is not set
2732+# CONFIG_EXT2_FS_XIP is not set
2733+CONFIG_EXT3_FS=y
2734+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
2735+CONFIG_EXT3_FS_XATTR=y
2736+# CONFIG_EXT3_FS_POSIX_ACL is not set
2737+# CONFIG_EXT3_FS_SECURITY is not set
2738+CONFIG_EXT4_FS=y
2739+CONFIG_EXT4_FS_XATTR=y
2740+# CONFIG_EXT4_FS_POSIX_ACL is not set
2741+# CONFIG_EXT4_FS_SECURITY is not set
2742+# CONFIG_EXT4_DEBUG is not set
2743+CONFIG_JBD=y
2744+# CONFIG_JBD_DEBUG is not set
2745+CONFIG_JBD2=y
2746+# CONFIG_JBD2_DEBUG is not set
2747+CONFIG_FS_MBCACHE=y
2748+# CONFIG_REISERFS_FS is not set
2749+# CONFIG_JFS_FS is not set
2750+# CONFIG_XFS_FS is not set
2751+# CONFIG_GFS2_FS is not set
2752+# CONFIG_BTRFS_FS is not set
2753+# CONFIG_NILFS2_FS is not set
2754+# CONFIG_FS_POSIX_ACL is not set
2755+CONFIG_FILE_LOCKING=y
2756+CONFIG_FSNOTIFY=y
2757+CONFIG_DNOTIFY=y
2758+CONFIG_INOTIFY_USER=y
2759+# CONFIG_FANOTIFY is not set
2760+# CONFIG_QUOTA is not set
2761+# CONFIG_QUOTACTL is not set
2762+CONFIG_AUTOFS4_FS=y
2763+# CONFIG_FUSE_FS is not set
2764+
2765+#
2766+# Caches
2767+#
2768+# CONFIG_FSCACHE is not set
2769+
2770+#
2771+# CD-ROM/DVD Filesystems
2772+#
2773+# CONFIG_ISO9660_FS is not set
2774+# CONFIG_UDF_FS is not set
2775+
2776+#
2777+# DOS/FAT/NT Filesystems
2778+#
2779+CONFIG_FAT_FS=y
2780+CONFIG_MSDOS_FS=y
2781+CONFIG_VFAT_FS=y
2782+CONFIG_FAT_DEFAULT_CODEPAGE=437
2783+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
2784+# CONFIG_NTFS_FS is not set
2785+
2786+#
2787+# Pseudo filesystems
2788+#
2789+CONFIG_PROC_FS=y
2790+CONFIG_PROC_SYSCTL=y
2791+CONFIG_PROC_PAGE_MONITOR=y
2792+CONFIG_SYSFS=y
2793+CONFIG_TMPFS=y
2794+# CONFIG_TMPFS_POSIX_ACL is not set
2795+# CONFIG_TMPFS_XATTR is not set
2796+# CONFIG_HUGETLB_PAGE is not set
2797+# CONFIG_CONFIGFS_FS is not set
2798+CONFIG_MISC_FILESYSTEMS=y
2799+# CONFIG_ADFS_FS is not set
2800+# CONFIG_AFFS_FS is not set
2801+# CONFIG_HFS_FS is not set
2802+# CONFIG_HFSPLUS_FS is not set
2803+# CONFIG_BEFS_FS is not set
2804+# CONFIG_BFS_FS is not set
2805+# CONFIG_EFS_FS is not set
2806+CONFIG_JFFS2_FS=y
2807+CONFIG_JFFS2_FS_DEBUG=0
2808+CONFIG_JFFS2_FS_WRITEBUFFER=y
2809+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
2810+# CONFIG_JFFS2_SUMMARY is not set
2811+# CONFIG_JFFS2_FS_XATTR is not set
2812+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
2813+CONFIG_JFFS2_ZLIB=y
2814+# CONFIG_JFFS2_LZO is not set
2815+CONFIG_JFFS2_RTIME=y
2816+# CONFIG_JFFS2_RUBIN is not set
2817+CONFIG_UBIFS_FS=y
2818+# CONFIG_UBIFS_FS_XATTR is not set
2819+# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
2820+CONFIG_UBIFS_FS_LZO=y
2821+CONFIG_UBIFS_FS_ZLIB=y
2822+# CONFIG_UBIFS_FS_DEBUG is not set
2823+# CONFIG_LOGFS is not set
2824+CONFIG_CRAMFS=y
2825+# CONFIG_SQUASHFS is not set
2826+# CONFIG_VXFS_FS is not set
2827+# CONFIG_MINIX_FS is not set
2828+# CONFIG_OMFS_FS is not set
2829+# CONFIG_HPFS_FS is not set
2830+# CONFIG_QNX4FS_FS is not set
2831+# CONFIG_ROMFS_FS is not set
2832+# CONFIG_PSTORE is not set
2833+# CONFIG_SYSV_FS is not set
2834+# CONFIG_UFS_FS is not set
2835+CONFIG_NETWORK_FILESYSTEMS=y
2836+CONFIG_NFS_FS=y
2837+CONFIG_NFS_V3=y
2838+# CONFIG_NFS_V3_ACL is not set
2839+# CONFIG_NFS_V4 is not set
2840+CONFIG_ROOT_NFS=y
2841+# CONFIG_NFSD is not set
2842+CONFIG_LOCKD=y
2843+CONFIG_LOCKD_V4=y
2844+CONFIG_NFS_COMMON=y
2845+CONFIG_SUNRPC=y
2846+# CONFIG_CEPH_FS is not set
2847+# CONFIG_CIFS is not set
2848+# CONFIG_NCP_FS is not set
2849+# CONFIG_CODA_FS is not set
2850+# CONFIG_AFS_FS is not set
2851+
2852+#
2853+# Partition Types
2854+#
2855+CONFIG_PARTITION_ADVANCED=y
2856+# CONFIG_ACORN_PARTITION is not set
2857+# CONFIG_OSF_PARTITION is not set
2858+# CONFIG_AMIGA_PARTITION is not set
2859+# CONFIG_ATARI_PARTITION is not set
2860+# CONFIG_MAC_PARTITION is not set
2861+CONFIG_MSDOS_PARTITION=y
2862+# CONFIG_BSD_DISKLABEL is not set
2863+# CONFIG_MINIX_SUBPARTITION is not set
2864+# CONFIG_SOLARIS_X86_PARTITION is not set
2865+# CONFIG_UNIXWARE_DISKLABEL is not set
2866+# CONFIG_LDM_PARTITION is not set
2867+# CONFIG_SGI_PARTITION is not set
2868+# CONFIG_ULTRIX_PARTITION is not set
2869+# CONFIG_SUN_PARTITION is not set
2870+# CONFIG_KARMA_PARTITION is not set
2871+CONFIG_EFI_PARTITION=y
2872+# CONFIG_SYSV68_PARTITION is not set
2873+CONFIG_NLS=y
2874+CONFIG_NLS_DEFAULT="iso8859-1"
2875+CONFIG_NLS_CODEPAGE_437=y
2876+# CONFIG_NLS_CODEPAGE_737 is not set
2877+# CONFIG_NLS_CODEPAGE_775 is not set
2878+# CONFIG_NLS_CODEPAGE_850 is not set
2879+# CONFIG_NLS_CODEPAGE_852 is not set
2880+# CONFIG_NLS_CODEPAGE_855 is not set
2881+# CONFIG_NLS_CODEPAGE_857 is not set
2882+# CONFIG_NLS_CODEPAGE_860 is not set
2883+# CONFIG_NLS_CODEPAGE_861 is not set
2884+# CONFIG_NLS_CODEPAGE_862 is not set
2885+# CONFIG_NLS_CODEPAGE_863 is not set
2886+# CONFIG_NLS_CODEPAGE_864 is not set
2887+# CONFIG_NLS_CODEPAGE_865 is not set
2888+# CONFIG_NLS_CODEPAGE_866 is not set
2889+# CONFIG_NLS_CODEPAGE_869 is not set
2890+# CONFIG_NLS_CODEPAGE_936 is not set
2891+# CONFIG_NLS_CODEPAGE_950 is not set
2892+# CONFIG_NLS_CODEPAGE_932 is not set
2893+# CONFIG_NLS_CODEPAGE_949 is not set
2894+# CONFIG_NLS_CODEPAGE_874 is not set
2895+# CONFIG_NLS_ISO8859_8 is not set
2896+# CONFIG_NLS_CODEPAGE_1250 is not set
2897+# CONFIG_NLS_CODEPAGE_1251 is not set
2898+CONFIG_NLS_ASCII=m
2899+CONFIG_NLS_ISO8859_1=y
2900+# CONFIG_NLS_ISO8859_2 is not set
2901+# CONFIG_NLS_ISO8859_3 is not set
2902+# CONFIG_NLS_ISO8859_4 is not set
2903+# CONFIG_NLS_ISO8859_5 is not set
2904+# CONFIG_NLS_ISO8859_6 is not set
2905+# CONFIG_NLS_ISO8859_7 is not set
2906+# CONFIG_NLS_ISO8859_9 is not set
2907+# CONFIG_NLS_ISO8859_13 is not set
2908+# CONFIG_NLS_ISO8859_14 is not set
2909+# CONFIG_NLS_ISO8859_15 is not set
2910+# CONFIG_NLS_KOI8_R is not set
2911+# CONFIG_NLS_KOI8_U is not set
2912+CONFIG_NLS_UTF8=m
2913+
2914+#
2915+# Kernel hacking
2916+#
2917+# CONFIG_PRINTK_TIME is not set
2918+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
2919+CONFIG_ENABLE_WARN_DEPRECATED=y
2920+CONFIG_ENABLE_MUST_CHECK=y
2921+CONFIG_FRAME_WARN=1024
2922+CONFIG_MAGIC_SYSRQ=y
2923+# CONFIG_STRIP_ASM_SYMS is not set
2924+# CONFIG_UNUSED_SYMBOLS is not set
2925+CONFIG_DEBUG_FS=y
2926+# CONFIG_HEADERS_CHECK is not set
2927+# CONFIG_DEBUG_SECTION_MISMATCH is not set
2928+# CONFIG_DEBUG_KERNEL is not set
2929+# CONFIG_HARDLOCKUP_DETECTOR is not set
2930+# CONFIG_SLUB_DEBUG_ON is not set
2931+# CONFIG_SLUB_STATS is not set
2932+# CONFIG_SPARSE_RCU_POINTER is not set
2933+CONFIG_DEBUG_BUGVERBOSE=y
2934+# CONFIG_DEBUG_MEMORY_INIT is not set
2935+CONFIG_RCU_CPU_STALL_TIMEOUT=60
2936+CONFIG_RCU_CPU_STALL_VERBOSE=y
2937+# CONFIG_LKDTM is not set
2938+CONFIG_SYSCTL_SYSCALL_CHECK=y
2939+CONFIG_HAVE_FUNCTION_TRACER=y
2940+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
2941+CONFIG_HAVE_DYNAMIC_FTRACE=y
2942+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
2943+CONFIG_HAVE_C_RECORDMCOUNT=y
2944+CONFIG_TRACING_SUPPORT=y
2945+# CONFIG_FTRACE is not set
2946+# CONFIG_DYNAMIC_DEBUG is not set
2947+# CONFIG_DMA_API_DEBUG is not set
2948+# CONFIG_ATOMIC64_SELFTEST is not set
2949+# CONFIG_SAMPLES is not set
2950+CONFIG_HAVE_ARCH_KGDB=y
2951+# CONFIG_TEST_KSTRTOX is not set
2952+# CONFIG_STRICT_DEVMEM is not set
2953+CONFIG_ARM_UNWIND=y
2954+# CONFIG_DEBUG_USER is not set
2955+# CONFIG_OC_ETM is not set
2956+
2957+#
2958+# Security options
2959+#
2960+# CONFIG_KEYS is not set
2961+# CONFIG_SECURITY_DMESG_RESTRICT is not set
2962+# CONFIG_SECURITY is not set
2963+# CONFIG_SECURITYFS is not set
2964+CONFIG_DEFAULT_SECURITY_DAC=y
2965+CONFIG_DEFAULT_SECURITY=""
2966+CONFIG_CRYPTO=y
2967+
2968+#
2969+# Crypto core or helper
2970+#
2971+CONFIG_CRYPTO_ALGAPI=y
2972+CONFIG_CRYPTO_ALGAPI2=y
2973+CONFIG_CRYPTO_AEAD=y
2974+CONFIG_CRYPTO_AEAD2=y
2975+CONFIG_CRYPTO_BLKCIPHER=y
2976+CONFIG_CRYPTO_BLKCIPHER2=y
2977+CONFIG_CRYPTO_HASH=y
2978+CONFIG_CRYPTO_HASH2=y
2979+CONFIG_CRYPTO_RNG=y
2980+CONFIG_CRYPTO_RNG2=y
2981+CONFIG_CRYPTO_PCOMP2=y
2982+CONFIG_CRYPTO_MANAGER=y
2983+CONFIG_CRYPTO_MANAGER2=y
2984+# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
2985+CONFIG_CRYPTO_GF128MUL=y
2986+# CONFIG_CRYPTO_NULL is not set
2987+# CONFIG_CRYPTO_PCRYPT is not set
2988+CONFIG_CRYPTO_WORKQUEUE=y
2989+# CONFIG_CRYPTO_CRYPTD is not set
2990+CONFIG_CRYPTO_AUTHENC=y
2991+CONFIG_CRYPTO_TEST=m
2992+# CONFIG_CRYPTO_CRYPTODEV is not set
2993+
2994+#
2995+# Authenticated Encryption with Associated Data
2996+#
2997+CONFIG_CRYPTO_CCM=y
2998+CONFIG_CRYPTO_GCM=y
2999+CONFIG_CRYPTO_SEQIV=y
3000+
3001+#
3002+# Block modes
3003+#
3004+CONFIG_CRYPTO_CBC=y
3005+CONFIG_CRYPTO_CTR=y
3006+CONFIG_CRYPTO_CTS=y
3007+CONFIG_CRYPTO_ECB=y
3008+CONFIG_CRYPTO_LRW=y
3009+CONFIG_CRYPTO_PCBC=y
3010+CONFIG_CRYPTO_XTS=y
3011+
3012+#
3013+# Hash modes
3014+#
3015+# CONFIG_CRYPTO_HMAC is not set
3016+# CONFIG_CRYPTO_XCBC is not set
3017+# CONFIG_CRYPTO_VMAC is not set
3018+
3019+#
3020+# Digest
3021+#
3022+# CONFIG_CRYPTO_CRC32C is not set
3023+CONFIG_CRYPTO_GHASH=y
3024+# CONFIG_CRYPTO_MD4 is not set
3025+# CONFIG_CRYPTO_MD5 is not set
3026+CONFIG_CRYPTO_MICHAEL_MIC=y
3027+# CONFIG_CRYPTO_RMD128 is not set
3028+# CONFIG_CRYPTO_RMD160 is not set
3029+# CONFIG_CRYPTO_RMD256 is not set
3030+# CONFIG_CRYPTO_RMD320 is not set
3031+# CONFIG_CRYPTO_SHA1 is not set
3032+# CONFIG_CRYPTO_SHA256 is not set
3033+# CONFIG_CRYPTO_SHA512 is not set
3034+# CONFIG_CRYPTO_TGR192 is not set
3035+# CONFIG_CRYPTO_WP512 is not set
3036+
3037+#
3038+# Ciphers
3039+#
3040+CONFIG_CRYPTO_AES=y
3041+# CONFIG_CRYPTO_ANUBIS is not set
3042+CONFIG_CRYPTO_ARC4=y
3043+# CONFIG_CRYPTO_BLOWFISH is not set
3044+# CONFIG_CRYPTO_CAMELLIA is not set
3045+# CONFIG_CRYPTO_CAST5 is not set
3046+# CONFIG_CRYPTO_CAST6 is not set
3047+CONFIG_CRYPTO_DES=y
3048+# CONFIG_CRYPTO_FCRYPT is not set
3049+# CONFIG_CRYPTO_KHAZAD is not set
3050+# CONFIG_CRYPTO_SALSA20 is not set
3051+# CONFIG_CRYPTO_SEED is not set
3052+# CONFIG_CRYPTO_SERPENT is not set
3053+# CONFIG_CRYPTO_TEA is not set
3054+# CONFIG_CRYPTO_TWOFISH is not set
3055+
3056+#
3057+# Compression
3058+#
3059+CONFIG_CRYPTO_DEFLATE=y
3060+# CONFIG_CRYPTO_ZLIB is not set
3061+CONFIG_CRYPTO_LZO=y
3062+
3063+#
3064+# Random Number Generation
3065+#
3066+# CONFIG_CRYPTO_ANSI_CPRNG is not set
3067+# CONFIG_CRYPTO_USER_API_HASH is not set
3068+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
3069+CONFIG_CRYPTO_HW=y
3070+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
3071+CONFIG_CRYPTO_DEV_FSL_CAAM=y
3072+CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9
3073+CONFIG_CRYPTO_DEV_FSL_CAAM_INTC=y
3074+CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD=255
3075+CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD=2048
3076+CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y
3077+# CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API is not set
3078+CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y
3079+# CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_TEST is not set
3080+# CONFIG_BINARY_PRINTF is not set
3081+
3082+#
3083+# Library routines
3084+#
3085+CONFIG_BITREVERSE=y
3086+CONFIG_RATIONAL=y
3087+CONFIG_CRC_CCITT=m
3088+CONFIG_CRC16=y
3089+# CONFIG_CRC_T10DIF is not set
3090+# CONFIG_CRC_ITU_T is not set
3091+CONFIG_CRC32=y
3092+CONFIG_CRC7=y
3093+# CONFIG_LIBCRC32C is not set
3094+CONFIG_ZLIB_INFLATE=y
3095+CONFIG_ZLIB_DEFLATE=y
3096+CONFIG_LZO_COMPRESS=y
3097+CONFIG_LZO_DECOMPRESS=y
3098+# CONFIG_XZ_DEC is not set
3099+# CONFIG_XZ_DEC_BCJ is not set
3100+CONFIG_DECOMPRESS_GZIP=y
3101+CONFIG_GENERIC_ALLOCATOR=y
3102+CONFIG_HAS_IOMEM=y
3103+CONFIG_HAS_IOPORT=y
3104+CONFIG_HAS_DMA=y
3105+CONFIG_CPU_RMAP=y
3106+CONFIG_NLATTR=y
3107+CONFIG_AVERAGE=y
3108diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
3109old mode 100755
3110new mode 100644
3111diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
3112old mode 100755
3113new mode 100644
3114diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
3115old mode 100755
3116new mode 100644
3117diff --git a/arch/arm/mach-mx5/board-mx50_rdp.c b/arch/arm/mach-mx5/board-mx50_rdp.c
3118old mode 100755
3119new mode 100644
3120diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
3121old mode 100755
3122new mode 100644
3123diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c
3124old mode 100755
3125new mode 100644
3126diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c
3127old mode 100755
3128new mode 100644
3129diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
3130old mode 100755
3131new mode 100644
3132diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c
3133old mode 100755
3134new mode 100644
3135diff --git a/arch/arm/mach-mx5/bus_freq.c b/arch/arm/mach-mx5/bus_freq.c
3136old mode 100755
3137new mode 100644
3138diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
3139old mode 100755
3140new mode 100644
3141diff --git a/arch/arm/mach-mx5/clock.c b/arch/arm/mach-mx5/clock.c
3142old mode 100755
3143new mode 100644
3144diff --git a/arch/arm/mach-mx5/clock_mx50.c b/arch/arm/mach-mx5/clock_mx50.c
3145old mode 100755
3146new mode 100644
3147diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
3148old mode 100755
3149new mode 100644
3150diff --git a/arch/arm/mach-mx5/cpu_op-mx50.c b/arch/arm/mach-mx5/cpu_op-mx50.c
3151old mode 100755
3152new mode 100644
3153diff --git a/arch/arm/mach-mx5/cpu_op-mx50.h b/arch/arm/mach-mx5/cpu_op-mx50.h
3154old mode 100755
3155new mode 100644
3156diff --git a/arch/arm/mach-mx5/cpu_op-mx51.c b/arch/arm/mach-mx5/cpu_op-mx51.c
3157old mode 100755
3158new mode 100644
3159diff --git a/arch/arm/mach-mx5/cpu_op-mx51.h b/arch/arm/mach-mx5/cpu_op-mx51.h
3160old mode 100755
3161new mode 100644
3162diff --git a/arch/arm/mach-mx5/cpu_op-mx53.c b/arch/arm/mach-mx5/cpu_op-mx53.c
3163old mode 100755
3164new mode 100644
3165diff --git a/arch/arm/mach-mx5/cpu_op-mx53.h b/arch/arm/mach-mx5/cpu_op-mx53.h
3166old mode 100755
3167new mode 100644
3168diff --git a/arch/arm/mach-mx5/crm_regs.h b/arch/arm/mach-mx5/crm_regs.h
3169old mode 100755
3170new mode 100644
3171diff --git a/arch/arm/mach-mx5/devices-imx50.h b/arch/arm/mach-mx5/devices-imx50.h
3172old mode 100755
3173new mode 100644
3174diff --git a/arch/arm/mach-mx5/devices-imx51.h b/arch/arm/mach-mx5/devices-imx51.h
3175old mode 100755
3176new mode 100644
3177diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-mx5/devices-imx53.h
3178old mode 100755
3179new mode 100644
3180diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c
3181old mode 100755
3182new mode 100644
3183diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h
3184old mode 100755
3185new mode 100644
3186diff --git a/arch/arm/mach-mx5/imx_bt_rfkill.c b/arch/arm/mach-mx5/imx_bt_rfkill.c
3187old mode 100755
3188new mode 100644
3189diff --git a/arch/arm/mach-mx5/mx50_ddr_freq.S b/arch/arm/mach-mx5/mx50_ddr_freq.S
3190old mode 100755
3191new mode 100644
3192diff --git a/arch/arm/mach-mx5/mx50_freq.c b/arch/arm/mach-mx5/mx50_freq.c
3193old mode 100755
3194new mode 100644
3195diff --git a/arch/arm/mach-mx5/mx50_suspend.S b/arch/arm/mach-mx5/mx50_suspend.S
3196old mode 100755
3197new mode 100644
3198diff --git a/arch/arm/mach-mx5/mx50_wfi.S b/arch/arm/mach-mx5/mx50_wfi.S
3199old mode 100755
3200new mode 100644
3201diff --git a/arch/arm/mach-mx5/mx53_loco_pmic_da9053.c b/arch/arm/mach-mx5/mx53_loco_pmic_da9053.c
3202old mode 100755
3203new mode 100644
3204diff --git a/arch/arm/mach-mx5/mx53_smd_pmic_da9053.c b/arch/arm/mach-mx5/mx53_smd_pmic_da9053.c
3205old mode 100755
3206new mode 100644
3207diff --git a/arch/arm/mach-mx5/pm.c b/arch/arm/mach-mx5/pm.c
3208old mode 100755
3209new mode 100644
3210diff --git a/arch/arm/mach-mx5/sdram_autogating.c b/arch/arm/mach-mx5/sdram_autogating.c
3211old mode 100755
3212new mode 100644
3213diff --git a/arch/arm/mach-mx5/suspend.S b/arch/arm/mach-mx5/suspend.S
3214old mode 100755
3215new mode 100644
3216diff --git a/arch/arm/mach-mx5/system.c b/arch/arm/mach-mx5/system.c
3217old mode 100755
3218new mode 100644
3219diff --git a/arch/arm/mach-mx5/usb.h b/arch/arm/mach-mx5/usb.h
3220old mode 100755
3221new mode 100644
3222diff --git a/arch/arm/mach-mx5/usb_dr.c b/arch/arm/mach-mx5/usb_dr.c
3223old mode 100755
3224new mode 100644
3225diff --git a/arch/arm/mach-mx5/usb_h1.c b/arch/arm/mach-mx5/usb_h1.c
3226old mode 100755
3227new mode 100644
3228diff --git a/arch/arm/mach-mx5/usb_h2.c b/arch/arm/mach-mx5/usb_h2.c
3229old mode 100755
3230new mode 100644
3231diff --git a/arch/arm/mach-mx6/Kconfig b/arch/arm/mach-mx6/Kconfig
3232index 2ffd90d..481075b 100644
3233--- a/arch/arm/mach-mx6/Kconfig
3234+++ b/arch/arm/mach-mx6/Kconfig
3235@@ -175,6 +175,10 @@ config MACH_MX6Q_SABRELITE
3236 select IMX_HAVE_PLATFORM_IMX_ASRC
3237 select IMX_HAVE_PLATFORM_FLEXCAN
3238 select IMX_HAVE_PLATFORM_IMX_CAAM
3239+ select IMX_HAVE_PLATFORM_IMX_DVFS
3240+ select IMX_HAVE_PLATFORM_IMX_MIPI_CSI2
3241+ select IMX_HAVE_PLATFORM_IMX_PCIE
3242+ select IMX_HAVE_PLATFORM_PERFMON
3243 help
3244 Include support for i.MX 6Quad SABRE Lite platform. This includes specific
3245 configurations for the board and its peripherals.
3246diff --git a/arch/arm/mach-mx6/board-mx6q_sabrelite.c b/arch/arm/mach-mx6/board-mx6q_sabrelite.c
3247index 736b423..b586426 100644
3248--- a/arch/arm/mach-mx6/board-mx6q_sabrelite.c
3249+++ b/arch/arm/mach-mx6/board-mx6q_sabrelite.c
3250@@ -56,12 +56,15 @@
3251 #include <mach/mxc_dvfs.h>
3252 #include <mach/memory.h>
3253 #include <mach/iomux-mx6q.h>
3254+#include <mach/iomux-mx6dl.h>
3255 #include <mach/imx-uart.h>
3256 #include <mach/viv_gpu.h>
3257 #include <mach/ahci_sata.h>
3258 #include <mach/ipu-v3.h>
3259 #include <mach/mxc_hdmi.h>
3260 #include <mach/mxc_asrc.h>
3261+#include <linux/i2c/tsc2007.h>
3262+#include <linux/wl12xx.h>
3263
3264 #include <asm/irq.h>
3265 #include <asm/setup.h>
3266@@ -74,29 +77,53 @@
3267 #include "crm_regs.h"
3268 #include "cpu_op-mx6.h"
3269
3270-#define MX6Q_SABRELITE_SD3_CD IMX_GPIO_NR(7, 0)
3271-#define MX6Q_SABRELITE_SD3_WP IMX_GPIO_NR(7, 1)
3272-#define MX6Q_SABRELITE_SD4_CD IMX_GPIO_NR(2, 6)
3273-#define MX6Q_SABRELITE_SD4_WP IMX_GPIO_NR(2, 7)
3274-#define MX6Q_SABRELITE_ECSPI1_CS1 IMX_GPIO_NR(3, 19)
3275-#define MX6Q_SABRELITE_USB_OTG_PWR IMX_GPIO_NR(3, 22)
3276-#define MX6Q_SABRELITE_CAP_TCH_INT1 IMX_GPIO_NR(1, 9)
3277-#define MX6Q_SABRELITE_USB_HUB_RESET IMX_GPIO_NR(7, 12)
3278-#define MX6Q_SABRELITE_CAN1_STBY IMX_GPIO_NR(1, 2)
3279-#define MX6Q_SABRELITE_CAN1_EN IMX_GPIO_NR(1, 4)
3280-#define MX6Q_SABRELITE_MENU_KEY IMX_GPIO_NR(2, 1)
3281-#define MX6Q_SABRELITE_BACK_KEY IMX_GPIO_NR(2, 2)
3282-#define MX6Q_SABRELITE_ONOFF_KEY IMX_GPIO_NR(2, 3)
3283-#define MX6Q_SABRELITE_HOME_KEY IMX_GPIO_NR(2, 4)
3284-#define MX6Q_SABRELITE_VOL_UP_KEY IMX_GPIO_NR(7, 13)
3285-#define MX6Q_SABRELITE_VOL_DOWN_KEY IMX_GPIO_NR(4, 5)
3286-#define MX6Q_SABRELITE_CSI0_RST IMX_GPIO_NR(1, 8)
3287-#define MX6Q_SABRELITE_CSI0_PWN IMX_GPIO_NR(1, 6)
3288-
3289-#define MX6Q_SABRELITE_SD3_WP_PADCFG (PAD_CTL_PKE | PAD_CTL_PUE | \
3290+#define MX6_SABRELITE_SD3_CD IMX_GPIO_NR(7, 0)
3291+#define MX6_SABRELITE_SD3_WP IMX_GPIO_NR(7, 1)
3292+#define MX6_SABRELITE_SD4_CD IMX_GPIO_NR(2, 6)
3293+#define MX6_SABRELITE_SD4_WP IMX_GPIO_NR(2, 7)
3294+#define MX6_SABRELITE_ECSPI1_CS1 IMX_GPIO_NR(3, 19)
3295+#define MX6_SABRELITE_USB_OTG_PWR IMX_GPIO_NR(3, 22)
3296+#define MX6_SABRELITE_CAP_TCH_INT1 IMX_GPIO_NR(1, 9)
3297+#define MX6_SABRELITE_DRGB_IRQGPIO IMX_GPIO_NR(4, 20)
3298+#define MX6_SABRELITE_USB_HUB_RESET IMX_GPIO_NR(7, 12)
3299+#define MX6_SABRELITE_CAN1_STBY IMX_GPIO_NR(1, 2)
3300+#define MX6_SABRELITE_CAN1_EN IMX_GPIO_NR(1, 4)
3301+#define MX6_SABRELITE_CAN1_ERR IMX_GPIO_NR(1, 7)
3302+#define MX6_SABRELITE_MENU_KEY IMX_GPIO_NR(2, 1)
3303+#define MX6_SABRELITE_BACK_KEY IMX_GPIO_NR(2, 2)
3304+#define MX6_SABRELITE_ONOFF_KEY IMX_GPIO_NR(2, 3)
3305+#define MX6_SABRELITE_HOME_KEY IMX_GPIO_NR(2, 4)
3306+#define MX6_SABRELITE_VOL_UP_KEY IMX_GPIO_NR(7, 13)
3307+#define MX6_SABRELITE_VOL_DOWN_KEY IMX_GPIO_NR(4, 5)
3308+#define MX6_SABRELITE_CSI0_RST IMX_GPIO_NR(1, 8)
3309+#define MX6_SABRELITE_CSI0_PWN IMX_GPIO_NR(1, 6)
3310+#define MX6_SABRELITE_ENET_PHY_INT IMX_GPIO_NR(1, 28)
3311+
3312+#define N6_WL1271_WL_IRQ IMX_GPIO_NR(6, 14)
3313+#define N6_WL1271_WL_EN IMX_GPIO_NR(6, 15)
3314+#define N6_WL1271_BT_EN IMX_GPIO_NR(6, 16)
3315+
3316+#define MX6_SABRELITE_CAN1_ERR_TEST_PADCFG (PAD_CTL_PKE | PAD_CTL_PUE | \
3317+ PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \
3318+ PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
3319+#define MX6_SABRELITE_CAN1_ERR_PADCFG (PAD_CTL_PUE | \
3320+ PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \
3321+ PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
3322+#define MX6_SABRELITE_SD3_WP_PADCFG (PAD_CTL_PKE | PAD_CTL_PUE | \
3323 PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_MED | \
3324 PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
3325
3326+#define WEAK_PULLUP (PAD_CTL_HYS | PAD_CTL_PKE \
3327+ | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
3328+
3329+#define N6_IRQ_PADCFG (PAD_CTL_PUE | PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
3330+#define N6_IRQ_TEST_PADCFG (PAD_CTL_PKE | N6_IRQ_PADCFG)
3331+#define N6_EN_PADCFG (PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)
3332+
3333+#include "pads-mx6_sabrelite.h"
3334+#define FOR_DL_SOLO
3335+#include "pads-mx6_sabrelite.h"
3336+
3337 void __init early_console_setup(unsigned long base, struct clk *clk);
3338 static struct clk *sata_clk;
3339
3340@@ -108,252 +135,49 @@ static int caam_enabled;
3341 extern struct regulator *(*get_cpu_regulator)(void);
3342 extern void (*put_cpu_regulator)(void);
3343
3344-static iomux_v3_cfg_t mx6q_sabrelite_pads[] = {
3345- /* AUDMUX */
3346- MX6Q_PAD_SD2_DAT0__AUDMUX_AUD4_RXD,
3347- MX6Q_PAD_SD2_DAT3__AUDMUX_AUD4_TXC,
3348- MX6Q_PAD_SD2_DAT2__AUDMUX_AUD4_TXD,
3349- MX6Q_PAD_SD2_DAT1__AUDMUX_AUD4_TXFS,
3350-
3351- /* CAN1 */
3352- MX6Q_PAD_KEY_ROW2__CAN1_RXCAN,
3353- MX6Q_PAD_KEY_COL2__CAN1_TXCAN,
3354- MX6Q_PAD_GPIO_2__GPIO_1_2, /* STNDBY */
3355- MX6Q_PAD_GPIO_7__GPIO_1_7, /* NERR */
3356- MX6Q_PAD_GPIO_4__GPIO_1_4, /* Enable */
3357-
3358- /* CCM */
3359- MX6Q_PAD_GPIO_0__CCM_CLKO, /* SGTL500 sys_mclk */
3360- MX6Q_PAD_GPIO_3__CCM_CLKO2, /* J5 - Camera MCLK */
3361-
3362- /* ECSPI1 */
3363- MX6Q_PAD_EIM_D17__ECSPI1_MISO,
3364- MX6Q_PAD_EIM_D18__ECSPI1_MOSI,
3365- MX6Q_PAD_EIM_D16__ECSPI1_SCLK,
3366- MX6Q_PAD_EIM_D19__GPIO_3_19, /*SS1*/
3367-
3368- /* ENET */
3369- MX6Q_PAD_ENET_MDIO__ENET_MDIO,
3370- MX6Q_PAD_ENET_MDC__ENET_MDC,
3371- MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC,
3372- MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0,
3373- MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1,
3374- MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2,
3375- MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3,
3376- MX6Q_PAD_RGMII_TX_CTL__ENET_RGMII_TX_CTL,
3377- MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK,
3378- MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC,
3379- MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0,
3380- MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1,
3381- MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2,
3382- MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3,
3383- MX6Q_PAD_RGMII_RX_CTL__ENET_RGMII_RX_CTL,
3384- MX6Q_PAD_ENET_TX_EN__GPIO_1_28, /* Micrel RGMII Phy Interrupt */
3385- MX6Q_PAD_EIM_D23__GPIO_3_23, /* RGMII reset */
3386-
3387- /* GPIO1 */
3388- MX6Q_PAD_ENET_RX_ER__GPIO_1_24, /* J9 - Microphone Detect */
3389-
3390- /* GPIO2 */
3391- MX6Q_PAD_NANDF_D1__GPIO_2_1, /* J14 - Menu Button */
3392- MX6Q_PAD_NANDF_D2__GPIO_2_2, /* J14 - Back Button */
3393- MX6Q_PAD_NANDF_D3__GPIO_2_3, /* J14 - Search Button */
3394- MX6Q_PAD_NANDF_D4__GPIO_2_4, /* J14 - Home Button */
3395- MX6Q_PAD_EIM_A22__GPIO_2_16, /* J12 - Boot Mode Select */
3396- MX6Q_PAD_EIM_A21__GPIO_2_17, /* J12 - Boot Mode Select */
3397- MX6Q_PAD_EIM_A20__GPIO_2_18, /* J12 - Boot Mode Select */
3398- MX6Q_PAD_EIM_A19__GPIO_2_19, /* J12 - Boot Mode Select */
3399- MX6Q_PAD_EIM_A18__GPIO_2_20, /* J12 - Boot Mode Select */
3400- MX6Q_PAD_EIM_A17__GPIO_2_21, /* J12 - Boot Mode Select */
3401- MX6Q_PAD_EIM_A16__GPIO_2_22, /* J12 - Boot Mode Select */
3402- MX6Q_PAD_EIM_RW__GPIO_2_26, /* J12 - Boot Mode Select */
3403- MX6Q_PAD_EIM_LBA__GPIO_2_27, /* J12 - Boot Mode Select */
3404- MX6Q_PAD_EIM_EB0__GPIO_2_28, /* J12 - Boot Mode Select */
3405- MX6Q_PAD_EIM_EB1__GPIO_2_29, /* J12 - Boot Mode Select */
3406- MX6Q_PAD_EIM_EB3__GPIO_2_31, /* J12 - Boot Mode Select */
3407-
3408- /* GPIO3 */
3409- MX6Q_PAD_EIM_DA0__GPIO_3_0, /* J12 - Boot Mode Select */
3410- MX6Q_PAD_EIM_DA1__GPIO_3_1, /* J12 - Boot Mode Select */
3411- MX6Q_PAD_EIM_DA2__GPIO_3_2, /* J12 - Boot Mode Select */
3412- MX6Q_PAD_EIM_DA3__GPIO_3_3, /* J12 - Boot Mode Select */
3413- MX6Q_PAD_EIM_DA4__GPIO_3_4, /* J12 - Boot Mode Select */
3414- MX6Q_PAD_EIM_DA5__GPIO_3_5, /* J12 - Boot Mode Select */
3415- MX6Q_PAD_EIM_DA6__GPIO_3_6, /* J12 - Boot Mode Select */
3416- MX6Q_PAD_EIM_DA7__GPIO_3_7, /* J12 - Boot Mode Select */
3417- MX6Q_PAD_EIM_DA8__GPIO_3_8, /* J12 - Boot Mode Select */
3418- MX6Q_PAD_EIM_DA9__GPIO_3_9, /* J12 - Boot Mode Select */
3419- MX6Q_PAD_EIM_DA10__GPIO_3_10, /* J12 - Boot Mode Select */
3420- MX6Q_PAD_EIM_DA11__GPIO_3_11, /* J12 - Boot Mode Select */
3421- MX6Q_PAD_EIM_DA12__GPIO_3_12, /* J12 - Boot Mode Select */
3422- MX6Q_PAD_EIM_DA13__GPIO_3_13, /* J12 - Boot Mode Select */
3423- MX6Q_PAD_EIM_DA14__GPIO_3_14, /* J12 - Boot Mode Select */
3424- MX6Q_PAD_EIM_DA15__GPIO_3_15, /* J12 - Boot Mode Select */
3425-
3426- /* GPIO4 */
3427- MX6Q_PAD_GPIO_19__GPIO_4_5, /* J14 - Volume Down */
3428-
3429- /* GPIO5 */
3430- MX6Q_PAD_EIM_WAIT__GPIO_5_0, /* J12 - Boot Mode Select */
3431- MX6Q_PAD_EIM_A24__GPIO_5_4, /* J12 - Boot Mode Select */
3432-
3433- /* GPIO6 */
3434- MX6Q_PAD_EIM_A23__GPIO_6_6, /* J12 - Boot Mode Select */
3435-
3436- /* GPIO7 */
3437- MX6Q_PAD_GPIO_17__GPIO_7_12, /* USB Hub Reset */
3438- MX6Q_PAD_GPIO_18__GPIO_7_13, /* J14 - Volume Up */
3439-
3440- /* I2C1, SGTL5000 */
3441- MX6Q_PAD_EIM_D21__I2C1_SCL, /* GPIO3[21] */
3442- MX6Q_PAD_EIM_D28__I2C1_SDA, /* GPIO3[28] */
3443-
3444- /* I2C2 Camera, MIPI */
3445- MX6Q_PAD_KEY_COL3__I2C2_SCL, /* GPIO4[12] */
3446- MX6Q_PAD_KEY_ROW3__I2C2_SDA, /* GPIO4[13] */
3447-
3448- /* I2C3 */
3449- MX6Q_PAD_GPIO_5__I2C3_SCL, /* GPIO1[5] - J7 - Display card */
3450-#ifdef CONFIG_FEC_1588
3451- MX6Q_PAD_GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT,
3452-#else
3453- MX6Q_PAD_GPIO_16__I2C3_SDA, /* GPIO7[11] - J15 - RGB connector */
3454-#endif
3455+#define IOMUX_SETUP(pad_list) mxc_iomux_v3_setup_pads(mx6q_##pad_list, \
3456+ mx6dl_solo_##pad_list)
3457
3458- /* DISPLAY */
3459- MX6Q_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK,
3460- MX6Q_PAD_DI0_PIN15__IPU1_DI0_PIN15, /* DE */
3461- MX6Q_PAD_DI0_PIN2__IPU1_DI0_PIN2, /* HSync */
3462- MX6Q_PAD_DI0_PIN3__IPU1_DI0_PIN3, /* VSync */
3463- MX6Q_PAD_DI0_PIN4__IPU1_DI0_PIN4, /* Contrast */
3464- MX6Q_PAD_DISP0_DAT0__IPU1_DISP0_DAT_0,
3465- MX6Q_PAD_DISP0_DAT1__IPU1_DISP0_DAT_1,
3466- MX6Q_PAD_DISP0_DAT2__IPU1_DISP0_DAT_2,
3467- MX6Q_PAD_DISP0_DAT3__IPU1_DISP0_DAT_3,
3468- MX6Q_PAD_DISP0_DAT4__IPU1_DISP0_DAT_4,
3469- MX6Q_PAD_DISP0_DAT5__IPU1_DISP0_DAT_5,
3470- MX6Q_PAD_DISP0_DAT6__IPU1_DISP0_DAT_6,
3471- MX6Q_PAD_DISP0_DAT7__IPU1_DISP0_DAT_7,
3472- MX6Q_PAD_DISP0_DAT8__IPU1_DISP0_DAT_8,
3473- MX6Q_PAD_DISP0_DAT9__IPU1_DISP0_DAT_9,
3474- MX6Q_PAD_DISP0_DAT10__IPU1_DISP0_DAT_10,
3475- MX6Q_PAD_DISP0_DAT11__IPU1_DISP0_DAT_11,
3476- MX6Q_PAD_DISP0_DAT12__IPU1_DISP0_DAT_12,
3477- MX6Q_PAD_DISP0_DAT13__IPU1_DISP0_DAT_13,
3478- MX6Q_PAD_DISP0_DAT14__IPU1_DISP0_DAT_14,
3479- MX6Q_PAD_DISP0_DAT15__IPU1_DISP0_DAT_15,
3480- MX6Q_PAD_DISP0_DAT16__IPU1_DISP0_DAT_16,
3481- MX6Q_PAD_DISP0_DAT17__IPU1_DISP0_DAT_17,
3482- MX6Q_PAD_DISP0_DAT18__IPU1_DISP0_DAT_18,
3483- MX6Q_PAD_DISP0_DAT19__IPU1_DISP0_DAT_19,
3484- MX6Q_PAD_DISP0_DAT20__IPU1_DISP0_DAT_20,
3485- MX6Q_PAD_DISP0_DAT21__IPU1_DISP0_DAT_21,
3486- MX6Q_PAD_DISP0_DAT22__IPU1_DISP0_DAT_22,
3487- MX6Q_PAD_DISP0_DAT23__IPU1_DISP0_DAT_23,
3488- MX6Q_PAD_GPIO_7__GPIO_1_7, /* J7 - Display Connector GP */
3489- MX6Q_PAD_GPIO_9__GPIO_1_9, /* J7 - Display Connector GP */
3490- MX6Q_PAD_NANDF_D0__GPIO_2_0, /* J6 - LVDS Display contrast */
3491-
3492-
3493- /* PWM1 */
3494- MX6Q_PAD_SD1_DAT3__PWM1_PWMO, /* GPIO1[21] */
3495-
3496- /* PWM2 */
3497- MX6Q_PAD_SD1_DAT2__PWM2_PWMO, /* GPIO1[19] */
3498-
3499- /* PWM3 */
3500- MX6Q_PAD_SD1_DAT1__PWM3_PWMO, /* GPIO1[17] */
3501-
3502- /* PWM4 */
3503- MX6Q_PAD_SD1_CMD__PWM4_PWMO, /* GPIO1[18] */
3504-
3505- /* UART1 */
3506- MX6Q_PAD_SD3_DAT7__UART1_TXD,
3507- MX6Q_PAD_SD3_DAT6__UART1_RXD,
3508-
3509- /* UART2 for debug */
3510- MX6Q_PAD_EIM_D26__UART2_TXD,
3511- MX6Q_PAD_EIM_D27__UART2_RXD,
3512-
3513- /* USBOTG ID pin */
3514- MX6Q_PAD_GPIO_1__USBOTG_ID,
3515-
3516- /* USB OC pin */
3517- MX6Q_PAD_KEY_COL4__USBOH3_USBOTG_OC,
3518- MX6Q_PAD_EIM_D30__USBOH3_USBH1_OC,
3519-
3520- /* USDHC3 */
3521- MX6Q_PAD_SD3_CLK__USDHC3_CLK_50MHZ,
3522- MX6Q_PAD_SD3_CMD__USDHC3_CMD_50MHZ,
3523- MX6Q_PAD_SD3_DAT0__USDHC3_DAT0_50MHZ,
3524- MX6Q_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ,
3525- MX6Q_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ,
3526- MX6Q_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ,
3527- MX6Q_PAD_SD3_DAT5__GPIO_7_0, /* J18 - SD3_CD */
3528- NEW_PAD_CTRL(MX6Q_PAD_SD3_DAT4__GPIO_7_1, MX6Q_SABRELITE_SD3_WP_PADCFG),
3529-
3530- /* USDHC4 */
3531- MX6Q_PAD_SD4_CLK__USDHC4_CLK_50MHZ,
3532- MX6Q_PAD_SD4_CMD__USDHC4_CMD_50MHZ,
3533- MX6Q_PAD_SD4_DAT0__USDHC4_DAT0_50MHZ,
3534- MX6Q_PAD_SD4_DAT1__USDHC4_DAT1_50MHZ,
3535- MX6Q_PAD_SD4_DAT2__USDHC4_DAT2_50MHZ,
3536- MX6Q_PAD_SD4_DAT3__USDHC4_DAT3_50MHZ,
3537- MX6Q_PAD_NANDF_D6__GPIO_2_6, /* J20 - SD4_CD */
3538- MX6Q_PAD_NANDF_D7__GPIO_2_7, /* SD4_WP */
3539-};
3540-
3541-static iomux_v3_cfg_t mx6q_sabrelite_csi0_sensor_pads[] = {
3542- /* IPU1 Camera */
3543- MX6Q_PAD_CSI0_DAT8__IPU1_CSI0_D_8,
3544- MX6Q_PAD_CSI0_DAT9__IPU1_CSI0_D_9,
3545- MX6Q_PAD_CSI0_DAT10__IPU1_CSI0_D_10,
3546- MX6Q_PAD_CSI0_DAT11__IPU1_CSI0_D_11,
3547- MX6Q_PAD_CSI0_DAT12__IPU1_CSI0_D_12,
3548- MX6Q_PAD_CSI0_DAT13__IPU1_CSI0_D_13,
3549- MX6Q_PAD_CSI0_DAT14__IPU1_CSI0_D_14,
3550- MX6Q_PAD_CSI0_DAT15__IPU1_CSI0_D_15,
3551- MX6Q_PAD_CSI0_DAT16__IPU1_CSI0_D_16,
3552- MX6Q_PAD_CSI0_DAT17__IPU1_CSI0_D_17,
3553- MX6Q_PAD_CSI0_DAT18__IPU1_CSI0_D_18,
3554- MX6Q_PAD_CSI0_DAT19__IPU1_CSI0_D_19,
3555- MX6Q_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN,
3556- MX6Q_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC,
3557- MX6Q_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK,
3558- MX6Q_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC,
3559- MX6Q_PAD_GPIO_6__GPIO_1_6, /* J5 - Camera GP */
3560- MX6Q_PAD_GPIO_8__GPIO_1_8, /* J5 - Camera Reset */
3561- MX6Q_PAD_SD1_DAT0__GPIO_1_16, /* J5 - Camera GP */
3562- MX6Q_PAD_NANDF_D5__GPIO_2_5, /* J16 - MIPI GP */
3563- MX6Q_PAD_NANDF_WP_B__GPIO_6_9, /* J16 - MIPI GP */
3564-};
3565-
3566-static iomux_v3_cfg_t mx6q_sabrelite_hdmi_ddc_pads[] = {
3567- MX6Q_PAD_KEY_COL3__HDMI_TX_DDC_SCL, /* HDMI DDC SCL */
3568- MX6Q_PAD_KEY_ROW3__HDMI_TX_DDC_SDA, /* HDMI DDC SDA */
3569-};
3570-
3571-static iomux_v3_cfg_t mx6q_sabrelite_i2c2_pads[] = {
3572- MX6Q_PAD_KEY_COL3__I2C2_SCL, /* I2C2 SCL */
3573- MX6Q_PAD_KEY_ROW3__I2C2_SDA, /* I2C2 SDA */
3574-};
3575-
3576-#define MX6Q_USDHC_PAD_SETTING(id, speed) \
3577-mx6q_sd##id##_##speed##mhz[] = { \
3578- MX6Q_PAD_SD##id##_CLK__USDHC##id##_CLK_##speed##MHZ, \
3579- MX6Q_PAD_SD##id##_CMD__USDHC##id##_CMD_##speed##MHZ, \
3580- MX6Q_PAD_SD##id##_DAT0__USDHC##id##_DAT0_##speed##MHZ, \
3581- MX6Q_PAD_SD##id##_DAT1__USDHC##id##_DAT1_##speed##MHZ, \
3582- MX6Q_PAD_SD##id##_DAT2__USDHC##id##_DAT2_##speed##MHZ, \
3583- MX6Q_PAD_SD##id##_DAT3__USDHC##id##_DAT3_##speed##MHZ, \
3584+int mxc_iomux_v3_setup_pads(iomux_v3_cfg_t *mx6q_pad_list,
3585+ iomux_v3_cfg_t *mx6dl_solo_pad_list)
3586+{
3587+ iomux_v3_cfg_t *p = cpu_is_mx6q() ? mx6q_pad_list : mx6dl_solo_pad_list;
3588+ int ret;
3589+
3590+ while (*p) {
3591+ ret = mxc_iomux_v3_setup_pad(*p);
3592+ if (ret)
3593+ return ret;
3594+ p++;
3595+ }
3596+ return 0;
3597 }
3598
3599-static iomux_v3_cfg_t MX6Q_USDHC_PAD_SETTING(3, 50);
3600-static iomux_v3_cfg_t MX6Q_USDHC_PAD_SETTING(3, 100);
3601-static iomux_v3_cfg_t MX6Q_USDHC_PAD_SETTING(3, 200);
3602-static iomux_v3_cfg_t MX6Q_USDHC_PAD_SETTING(4, 50);
3603-static iomux_v3_cfg_t MX6Q_USDHC_PAD_SETTING(4, 100);
3604-static iomux_v3_cfg_t MX6Q_USDHC_PAD_SETTING(4, 200);
3605+struct gpio n6w_wl1271_gpios[] __initdata = {
3606+ {.label = "wl1271_int", .gpio = N6_WL1271_WL_IRQ, .flags = GPIOF_DIR_IN},
3607+ {.label = "wl1271_bt_en", .gpio = N6_WL1271_BT_EN, .flags = 0},
3608+ {.label = "wl1271_wl_en", .gpio = N6_WL1271_WL_EN, .flags = 0},
3609+};
3610+
3611+int is_nitrogen6w(void)
3612+{
3613+ int ret = gpio_request_array(n6w_wl1271_gpios,
3614+ ARRAY_SIZE(n6w_wl1271_gpios));
3615+ if (ret) {
3616+ printk(KERN_ERR "%s gpio_request_array failed("
3617+ "%d) for n6w_wl1271_gpios\n", __func__, ret);
3618+ return ret;
3619+ }
3620+ ret = gpio_get_value(N6_WL1271_WL_IRQ);
3621+ if (ret <= 0) {
3622+ /* Sabrelite, not nitrogen6w */
3623+ gpio_free(N6_WL1271_WL_IRQ);
3624+ gpio_free(N6_WL1271_WL_EN);
3625+ gpio_free(N6_WL1271_BT_EN);
3626+ ret = 0;
3627+ }
3628+ return ret;
3629+}
3630
3631 enum sd_pad_mode {
3632 SD_PAD_MODE_LOW_SPEED,
3633@@ -365,35 +189,9 @@ static int plt_sd_pad_change(unsigned int index, int clock)
3634 {
3635 /* LOW speed is the default state of SD pads */
3636 static enum sd_pad_mode pad_mode = SD_PAD_MODE_LOW_SPEED;
3637+ int i = (index - 1) * SD_SPEED_CNT;
3638
3639- iomux_v3_cfg_t *sd_pads_200mhz = NULL;
3640- iomux_v3_cfg_t *sd_pads_100mhz = NULL;
3641- iomux_v3_cfg_t *sd_pads_50mhz = NULL;
3642-
3643- u32 sd_pads_200mhz_cnt;
3644- u32 sd_pads_100mhz_cnt;
3645- u32 sd_pads_50mhz_cnt;
3646-
3647- switch (index) {
3648- case 2:
3649- sd_pads_200mhz = mx6q_sd3_200mhz;
3650- sd_pads_100mhz = mx6q_sd3_100mhz;
3651- sd_pads_50mhz = mx6q_sd3_50mhz;
3652-
3653- sd_pads_200mhz_cnt = ARRAY_SIZE(mx6q_sd3_200mhz);
3654- sd_pads_100mhz_cnt = ARRAY_SIZE(mx6q_sd3_100mhz);
3655- sd_pads_50mhz_cnt = ARRAY_SIZE(mx6q_sd3_50mhz);
3656- break;
3657- case 3:
3658- sd_pads_200mhz = mx6q_sd4_200mhz;
3659- sd_pads_100mhz = mx6q_sd4_100mhz;
3660- sd_pads_50mhz = mx6q_sd4_50mhz;
3661-
3662- sd_pads_200mhz_cnt = ARRAY_SIZE(mx6q_sd4_200mhz);
3663- sd_pads_100mhz_cnt = ARRAY_SIZE(mx6q_sd4_100mhz);
3664- sd_pads_50mhz_cnt = ARRAY_SIZE(mx6q_sd4_50mhz);
3665- break;
3666- default:
3667+ if ((index < 1) || (index > 3)) {
3668 printk(KERN_ERR "no such SD host controller index %d\n", index);
3669 return -EINVAL;
3670 }
3671@@ -401,61 +199,71 @@ static int plt_sd_pad_change(unsigned int index, int clock)
3672 if (clock > 100000000) {
3673 if (pad_mode == SD_PAD_MODE_HIGH_SPEED)
3674 return 0;
3675- BUG_ON(!sd_pads_200mhz);
3676 pad_mode = SD_PAD_MODE_HIGH_SPEED;
3677- return mxc_iomux_v3_setup_multiple_pads(sd_pads_200mhz,
3678- sd_pads_200mhz_cnt);
3679+ i += _200MHZ;
3680 } else if (clock > 52000000) {
3681 if (pad_mode == SD_PAD_MODE_MED_SPEED)
3682 return 0;
3683- BUG_ON(!sd_pads_100mhz);
3684 pad_mode = SD_PAD_MODE_MED_SPEED;
3685- return mxc_iomux_v3_setup_multiple_pads(sd_pads_100mhz,
3686- sd_pads_100mhz_cnt);
3687+ i += _100MHZ;
3688 } else {
3689 if (pad_mode == SD_PAD_MODE_LOW_SPEED)
3690 return 0;
3691- BUG_ON(!sd_pads_50mhz);
3692 pad_mode = SD_PAD_MODE_LOW_SPEED;
3693- return mxc_iomux_v3_setup_multiple_pads(sd_pads_50mhz,
3694- sd_pads_50mhz_cnt);
3695+ i += _50MHZ;
3696 }
3697+ return IOMUX_SETUP(sd_pads[i]);
3698 }
3699
3700-static const struct esdhc_platform_data mx6q_sabrelite_sd3_data __initconst = {
3701- .cd_gpio = MX6Q_SABRELITE_SD3_CD,
3702- .wp_gpio = MX6Q_SABRELITE_SD3_WP,
3703+#ifdef CONFIG_WL12XX_PLATFORM_DATA
3704+static struct esdhc_platform_data mx6_sabrelite_sd2_data = {
3705+ .always_present = 1,
3706+ .cd_gpio = -1,
3707+ .wp_gpio = -1,
3708+ .keep_power_at_suspend = 0,
3709+ .caps = MMC_CAP_POWER_OFF_CARD,
3710+ .platform_pad_change = plt_sd_pad_change,
3711+};
3712+#endif
3713+
3714+static struct esdhc_platform_data mx6_sabrelite_sd3_data = {
3715+ .cd_gpio = MX6_SABRELITE_SD3_CD,
3716+ .wp_gpio = MX6_SABRELITE_SD3_WP,
3717 .keep_power_at_suspend = 1,
3718 .platform_pad_change = plt_sd_pad_change,
3719 };
3720
3721-static const struct esdhc_platform_data mx6q_sabrelite_sd4_data __initconst = {
3722- .cd_gpio = MX6Q_SABRELITE_SD4_CD,
3723- .wp_gpio = MX6Q_SABRELITE_SD4_WP,
3724+static const struct esdhc_platform_data mx6_sabrelite_sd4_data __initconst = {
3725+ .cd_gpio = MX6_SABRELITE_SD4_CD,
3726+ .wp_gpio = -1,
3727 .keep_power_at_suspend = 1,
3728 .platform_pad_change = plt_sd_pad_change,
3729 };
3730
3731 static const struct anatop_thermal_platform_data
3732- mx6q_sabrelite_anatop_thermal_data __initconst = {
3733+ mx6_sabrelite_anatop_thermal_data __initconst = {
3734 .name = "anatop_thermal",
3735 };
3736
3737-static inline void mx6q_sabrelite_init_uart(void)
3738-{
3739- imx6q_add_imx_uart(0, NULL);
3740- imx6q_add_imx_uart(1, NULL);
3741-}
3742+static const struct imxuart_platform_data mx6_arm2_uart2_data __initconst = {
3743+ .flags = IMXUART_HAVE_RTSCTS | IMXUART_SDMA,
3744+ .dma_req_rx = MX6Q_DMA_REQ_UART3_RX,
3745+ .dma_req_tx = MX6Q_DMA_REQ_UART3_TX,
3746+};
3747
3748-static int mx6q_sabrelite_fec_phy_init(struct phy_device *phydev)
3749+static int mx6_sabrelite_fec_phy_init(struct phy_device *phydev)
3750 {
3751- /* prefer master mode, disable 1000 Base-T capable */
3752- phy_write(phydev, 0x9, 0x1c00);
3753+ /* prefer master mode */
3754+ phy_write(phydev, 0x9, 0x1f00);
3755
3756 /* min rx data delay */
3757 phy_write(phydev, 0x0b, 0x8105);
3758 phy_write(phydev, 0x0c, 0x0000);
3759
3760+ /* min tx data delay */
3761+ phy_write(phydev, 0x0b, 0x8106);
3762+ phy_write(phydev, 0x0c, 0x0000);
3763+
3764 /* max rx/tx clock delay, min rx/tx control delay */
3765 phy_write(phydev, 0x0b, 0x8104);
3766 phy_write(phydev, 0x0c, 0xf0f0);
3767@@ -465,17 +273,18 @@ static int mx6q_sabrelite_fec_phy_init(struct phy_device *phydev)
3768 }
3769
3770 static struct fec_platform_data fec_data __initdata = {
3771- .init = mx6q_sabrelite_fec_phy_init,
3772+ .init = mx6_sabrelite_fec_phy_init,
3773 .phy = PHY_INTERFACE_MODE_RGMII,
3774+ .phy_irq = gpio_to_irq(MX6_SABRELITE_ENET_PHY_INT)
3775 };
3776
3777-static int mx6q_sabrelite_spi_cs[] = {
3778- MX6Q_SABRELITE_ECSPI1_CS1,
3779+static int mx6_sabrelite_spi_cs[] = {
3780+ MX6_SABRELITE_ECSPI1_CS1,
3781 };
3782
3783-static const struct spi_imx_master mx6q_sabrelite_spi_data __initconst = {
3784- .chipselect = mx6q_sabrelite_spi_cs,
3785- .num_chipselect = ARRAY_SIZE(mx6q_sabrelite_spi_cs),
3786+static const struct spi_imx_master mx6_sabrelite_spi_data __initconst = {
3787+ .chipselect = mx6_sabrelite_spi_cs,
3788+ .num_chipselect = ARRAY_SIZE(mx6_sabrelite_spi_cs),
3789 };
3790
3791 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
3792@@ -483,10 +292,15 @@ static struct mtd_partition imx6_sabrelite_spi_nor_partitions[] = {
3793 {
3794 .name = "bootloader",
3795 .offset = 0,
3796- .size = 0x00100000,
3797+ .size = 768*1024,
3798+ },
3799+ {
3800+ .name = "ubparams",
3801+ .offset = MTDPART_OFS_APPEND,
3802+ .size = 8*1024,
3803 },
3804 {
3805- .name = "kernel",
3806+ .name = "unused",
3807 .offset = MTDPART_OFS_APPEND,
3808 .size = MTDPART_SIZ_FULL,
3809 },
3810@@ -565,7 +379,7 @@ static struct platform_device mx6_sabrelite_audio_device = {
3811 .name = "imx-sgtl5000",
3812 };
3813
3814-static struct imxi2c_platform_data mx6q_sabrelite_i2c_data = {
3815+static struct imxi2c_platform_data mx6_sabrelite_i2c_data = {
3816 .bitrate = 100000,
3817 };
3818
3819@@ -575,35 +389,58 @@ static struct i2c_board_info mxc_i2c0_board_info[] __initdata = {
3820 },
3821 };
3822
3823-static void mx6q_csi0_cam_powerdown(int powerdown)
3824+static void mx6_csi0_cam_powerdown(int powerdown)
3825 {
3826 if (powerdown)
3827- gpio_set_value(MX6Q_SABRELITE_CSI0_PWN, 1);
3828+ gpio_set_value(MX6_SABRELITE_CSI0_PWN, 1);
3829 else
3830- gpio_set_value(MX6Q_SABRELITE_CSI0_PWN, 0);
3831+ gpio_set_value(MX6_SABRELITE_CSI0_PWN, 0);
3832
3833 msleep(2);
3834 }
3835
3836-static void mx6q_csi0_io_init(void)
3837+static void camera_reset(int power_gp, int reset_gp, int reset_gp2)
3838 {
3839- mxc_iomux_v3_setup_multiple_pads(mx6q_sabrelite_csi0_sensor_pads,
3840- ARRAY_SIZE(mx6q_sabrelite_csi0_sensor_pads));
3841-
3842 /* Camera power down */
3843- gpio_request(MX6Q_SABRELITE_CSI0_PWN, "cam-pwdn");
3844- gpio_direction_output(MX6Q_SABRELITE_CSI0_PWN, 1);
3845+ gpio_request(power_gp, "cam-pwdn");
3846+ gpio_request(reset_gp, "cam-reset");
3847+ gpio_request(reset_gp2, "cam-reset2");
3848+ gpio_direction_output(power_gp, 1);
3849+ /* Camera reset */
3850+ gpio_direction_output(reset_gp, 0);
3851+ gpio_direction_output(reset_gp2, 0);
3852 msleep(1);
3853- gpio_set_value(MX6Q_SABRELITE_CSI0_PWN, 0);
3854+ gpio_set_value(power_gp, 0);
3855+ msleep(1);
3856+ gpio_set_value(reset_gp, 1);
3857+ gpio_set_value(reset_gp2, 1);
3858+}
3859
3860- /* Camera reset */
3861- gpio_request(MX6Q_SABRELITE_CSI0_RST, "cam-reset");
3862- gpio_direction_output(MX6Q_SABRELITE_CSI0_RST, 1);
3863+#if defined(CONFIG_MXC_CAMERA_OV5640_MIPI) || defined(CONFIG_MXC_CAMERA_OV5640_MIPI_MODULE)
3864+static void mx6_mipi_sensor_io_init(void)
3865+{
3866+ IOMUX_SETUP(sabrelite_mipi_pads);
3867
3868- gpio_set_value(MX6Q_SABRELITE_CSI0_RST, 0);
3869- msleep(1);
3870- gpio_set_value(MX6Q_SABRELITE_CSI0_RST, 1);
3871+ camera_reset(MX6_SABRELITE_CSI0_PWN, IMX_GPIO_NR(2, 5),
3872+ IMX_GPIO_NR(6, 11));
3873+/*for mx6dl, mipi virtual channel 1 connect to csi 1*/
3874+ if (cpu_is_mx6dl())
3875+ mxc_iomux_set_gpr_register(13, 3, 3, 1);
3876+}
3877+
3878+static struct fsl_mxc_camera_platform_data ov5640_mipi_data = {
3879+ .mclk = 24000000,
3880+ .csi = 0,
3881+ .io_init = mx6_mipi_sensor_io_init,
3882+ .pwdn = mx6_csi0_cam_powerdown,
3883+};
3884+#else
3885+static void mx6_csi0_io_init(void)
3886+{
3887+ IOMUX_SETUP(sabrelite_csi0_sensor_pads);
3888
3889+ camera_reset(MX6_SABRELITE_CSI0_PWN, MX6_SABRELITE_CSI0_RST,
3890+ IMX_GPIO_NR(6, 11));
3891 /* For MX6Q GPR1 bit19 and bit20 meaning:
3892 * Bit19: 0 - Enable mipi to IPU1 CSI0
3893 * virtual channel is fixed to 0
3894@@ -616,43 +453,72 @@ static void mx6q_csi0_io_init(void)
3895 * IPU2 CSI0 directly connect to mipi csi2,
3896 * virtual channel is fixed to 2
3897 */
3898- mxc_iomux_set_gpr_register(1, 19, 1, 1);
3899+ if (cpu_is_mx6q())
3900+ mxc_iomux_set_gpr_register(1, 19, 1, 1);
3901+ else
3902+ mxc_iomux_set_gpr_register(13, 0, 3, 4);
3903 }
3904
3905 static struct fsl_mxc_camera_platform_data camera_data = {
3906 .mclk = 24000000,
3907 .mclk_source = 0,
3908 .csi = 0,
3909- .io_init = mx6q_csi0_io_init,
3910- .pwdn = mx6q_csi0_cam_powerdown,
3911+ .io_init = mx6_csi0_io_init,
3912+ .pwdn = mx6_csi0_cam_powerdown,
3913 };
3914
3915+#endif
3916+
3917 static struct i2c_board_info mxc_i2c1_board_info[] __initdata = {
3918 {
3919 I2C_BOARD_INFO("mxc_hdmi_i2c", 0x50),
3920 },
3921+#if defined(CONFIG_MXC_CAMERA_OV5640_MIPI) || defined(CONFIG_MXC_CAMERA_OV5640_MIPI_MODULE)
3922+ {
3923+ I2C_BOARD_INFO("ov5640_mipi", 0x3c),
3924+ .platform_data = (void *)&ov5640_mipi_data,
3925+ },
3926+#else
3927 {
3928 I2C_BOARD_INFO("ov5642", 0x3c),
3929 .platform_data = (void *)&camera_data,
3930 },
3931+#endif
3932+};
3933+
3934+static struct tsc2007_platform_data tsc2007_info = {
3935+ .model = 2004,
3936+ .x_plate_ohms = 500,
3937 };
3938
3939 static struct i2c_board_info mxc_i2c2_board_info[] __initdata = {
3940 {
3941 I2C_BOARD_INFO("egalax_ts", 0x4),
3942- .irq = gpio_to_irq(MX6Q_SABRELITE_CAP_TCH_INT1),
3943+ .irq = gpio_to_irq(MX6_SABRELITE_CAP_TCH_INT1),
3944+ },
3945+ {
3946+ I2C_BOARD_INFO("tsc2004", 0x48),
3947+ .platform_data = &tsc2007_info,
3948+ .irq = gpio_to_irq(MX6_SABRELITE_DRGB_IRQGPIO),
3949 },
3950+#if defined(CONFIG_TOUCHSCREEN_FT5X06) \
3951+ || defined(CONFIG_TOUCHSCREEN_FT5X06_MODULE)
3952+ {
3953+ I2C_BOARD_INFO("ft5x06-ts", 0x38),
3954+ .irq = gpio_to_irq(MX6_SABRELITE_CAP_TCH_INT1),
3955+ },
3956+#endif
3957 };
3958
3959-static void imx6q_sabrelite_usbotg_vbus(bool on)
3960+static void imx6_sabrelite_usbotg_vbus(bool on)
3961 {
3962 if (on)
3963- gpio_set_value(MX6Q_SABRELITE_USB_OTG_PWR, 1);
3964+ gpio_set_value(MX6_SABRELITE_USB_OTG_PWR, 1);
3965 else
3966- gpio_set_value(MX6Q_SABRELITE_USB_OTG_PWR, 0);
3967+ gpio_set_value(MX6_SABRELITE_USB_OTG_PWR, 0);
3968 }
3969
3970-static void __init imx6q_sabrelite_init_usb(void)
3971+static void __init imx6_sabrelite_init_usb(void)
3972 {
3973 int ret = 0;
3974
3975@@ -660,20 +526,20 @@ static void __init imx6q_sabrelite_init_usb(void)
3976 /* disable external charger detect,
3977 * or it will affect signal quality at dp .
3978 */
3979- ret = gpio_request(MX6Q_SABRELITE_USB_OTG_PWR, "usb-pwr");
3980+ ret = gpio_request(MX6_SABRELITE_USB_OTG_PWR, "usb-pwr");
3981 if (ret) {
3982- pr_err("failed to get GPIO MX6Q_SABRELITE_USB_OTG_PWR: %d\n",
3983+ pr_err("failed to get GPIO MX6_SABRELITE_USB_OTG_PWR: %d\n",
3984 ret);
3985 return;
3986 }
3987- gpio_direction_output(MX6Q_SABRELITE_USB_OTG_PWR, 0);
3988+ gpio_direction_output(MX6_SABRELITE_USB_OTG_PWR, 0);
3989 mxc_iomux_set_gpr_register(1, 13, 1, 1);
3990
3991- mx6_set_otghost_vbus_func(imx6q_sabrelite_usbotg_vbus);
3992+ mx6_set_otghost_vbus_func(imx6_sabrelite_usbotg_vbus);
3993 }
3994
3995 /* HW Initialization, if return 0, initialization is successful. */
3996-static int mx6q_sabrelite_sata_init(struct device *dev, void __iomem *addr)
3997+static int mx6_sabrelite_sata_init(struct device *dev, void __iomem *addr)
3998 {
3999 u32 tmpdata;
4000 int ret = 0;
4001@@ -733,39 +599,45 @@ put_sata_clk:
4002 return ret;
4003 }
4004
4005-static void mx6q_sabrelite_sata_exit(struct device *dev)
4006+static void mx6_sabrelite_sata_exit(struct device *dev)
4007 {
4008 clk_disable(sata_clk);
4009 clk_put(sata_clk);
4010 }
4011
4012-static struct ahci_platform_data mx6q_sabrelite_sata_data = {
4013- .init = mx6q_sabrelite_sata_init,
4014- .exit = mx6q_sabrelite_sata_exit,
4015+static struct ahci_platform_data mx6_sabrelite_sata_data = {
4016+ .init = mx6_sabrelite_sata_init,
4017+ .exit = mx6_sabrelite_sata_exit,
4018 };
4019
4020-static struct gpio mx6q_sabrelite_flexcan_gpios[] = {
4021- { MX6Q_SABRELITE_CAN1_EN, GPIOF_OUT_INIT_LOW, "flexcan1-en" },
4022- { MX6Q_SABRELITE_CAN1_STBY, GPIOF_OUT_INIT_LOW, "flexcan1-stby" },
4023+static struct gpio mx6_sabrelite_flexcan_gpios[] = {
4024+ { MX6_SABRELITE_CAN1_ERR, GPIOF_DIR_IN, "flexcan1-err" },
4025+ { MX6_SABRELITE_CAN1_EN, GPIOF_OUT_INIT_LOW, "flexcan1-en" },
4026+ { MX6_SABRELITE_CAN1_STBY, GPIOF_OUT_INIT_LOW, "flexcan1-stby" },
4027 };
4028
4029-static void mx6q_sabrelite_flexcan0_switch(int enable)
4030+static void mx6_sabrelite_flexcan0_mc33902_switch(int enable)
4031 {
4032- if (enable) {
4033- gpio_set_value(MX6Q_SABRELITE_CAN1_EN, 1);
4034- gpio_set_value(MX6Q_SABRELITE_CAN1_STBY, 1);
4035- } else {
4036- gpio_set_value(MX6Q_SABRELITE_CAN1_EN, 0);
4037- gpio_set_value(MX6Q_SABRELITE_CAN1_STBY, 0);
4038- }
4039+ gpio_set_value(MX6_SABRELITE_CAN1_EN, enable);
4040+ gpio_set_value(MX6_SABRELITE_CAN1_STBY, enable);
4041+}
4042+
4043+static void mx6_sabrelite_flexcan0_tja1040_switch(int enable)
4044+{
4045+ gpio_set_value(MX6_SABRELITE_CAN1_STBY, enable ^ 1);
4046 }
4047
4048 static const struct flexcan_platform_data
4049- mx6q_sabrelite_flexcan0_pdata __initconst = {
4050- .transceiver_switch = mx6q_sabrelite_flexcan0_switch,
4051+ mx6_sabrelite_flexcan0_mc33902_pdata __initconst = {
4052+ .transceiver_switch = mx6_sabrelite_flexcan0_mc33902_switch,
4053+};
4054+
4055+static const struct flexcan_platform_data
4056+ mx6_sabrelite_flexcan0_tja1040_pdata __initconst = {
4057+ .transceiver_switch = mx6_sabrelite_flexcan0_tja1040_switch,
4058 };
4059
4060-static struct viv_gpu_platform_data imx6q_gpu_pdata __initdata = {
4061+static struct viv_gpu_platform_data imx6_gpu_pdata __initdata = {
4062 .reserved_mem_size = SZ_128M,
4063 };
4064
4065@@ -833,14 +705,12 @@ static void hdmi_init(int ipu_id, int disp_id)
4066
4067 static void hdmi_enable_ddc_pin(void)
4068 {
4069- mxc_iomux_v3_setup_multiple_pads(mx6q_sabrelite_hdmi_ddc_pads,
4070- ARRAY_SIZE(mx6q_sabrelite_hdmi_ddc_pads));
4071+ IOMUX_SETUP(sabrelite_hdmi_ddc_pads);
4072 }
4073
4074 static void hdmi_disable_ddc_pin(void)
4075 {
4076- mxc_iomux_v3_setup_multiple_pads(mx6q_sabrelite_i2c2_pads,
4077- ARRAY_SIZE(mx6q_sabrelite_i2c2_pads));
4078+ IOMUX_SETUP(sabrelite_i2c2_pads);
4079 }
4080
4081 static struct fsl_mxc_hdmi_platform_data hdmi_data = {
4082@@ -851,7 +721,7 @@ static struct fsl_mxc_hdmi_platform_data hdmi_data = {
4083
4084 static struct fsl_mxc_hdmi_core_platform_data hdmi_core_data = {
4085 .ipu_id = 0,
4086- .disp_id = 0,
4087+ .disp_id = 1,
4088 };
4089
4090 static struct fsl_mxc_lcd_platform_data lcdif_data = {
4091@@ -903,13 +773,12 @@ static void sabrelite_suspend_exit(void)
4092 {
4093 /* resume restore */
4094 }
4095-static const struct pm_platform_data mx6q_sabrelite_pm_data __initconst = {
4096+static const struct pm_platform_data mx6_sabrelite_pm_data __initconst = {
4097 .name = "imx_pm",
4098 .suspend_enter = sabrelite_suspend_enter,
4099 .suspend_exit = sabrelite_suspend_exit,
4100 };
4101
4102-#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
4103 #define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake) \
4104 { \
4105 .gpio = gpio_num, \
4106@@ -921,14 +790,15 @@ static const struct pm_platform_data mx6q_sabrelite_pm_data __initconst = {
4107 }
4108
4109 static struct gpio_keys_button sabrelite_buttons[] = {
4110- GPIO_BUTTON(MX6Q_SABRELITE_ONOFF_KEY, KEY_POWER, 1, "key-power", 1),
4111- GPIO_BUTTON(MX6Q_SABRELITE_MENU_KEY, KEY_MENU, 1, "key-memu", 0),
4112- GPIO_BUTTON(MX6Q_SABRELITE_HOME_KEY, KEY_HOME, 1, "key-home", 0),
4113- GPIO_BUTTON(MX6Q_SABRELITE_BACK_KEY, KEY_BACK, 1, "key-back", 0),
4114- GPIO_BUTTON(MX6Q_SABRELITE_VOL_UP_KEY, KEY_VOLUMEUP, 1, "volume-up", 0),
4115- GPIO_BUTTON(MX6Q_SABRELITE_VOL_DOWN_KEY, KEY_VOLUMEDOWN, 1, "volume-down", 0),
4116+ GPIO_BUTTON(MX6_SABRELITE_ONOFF_KEY, KEY_POWER, 1, "key-power", 1),
4117+ GPIO_BUTTON(MX6_SABRELITE_MENU_KEY, KEY_MENU, 1, "key-memu", 0),
4118+ GPIO_BUTTON(MX6_SABRELITE_HOME_KEY, KEY_HOME, 1, "key-home", 0),
4119+ GPIO_BUTTON(MX6_SABRELITE_BACK_KEY, KEY_BACK, 1, "key-back", 0),
4120+ GPIO_BUTTON(MX6_SABRELITE_VOL_UP_KEY, KEY_VOLUMEUP, 1, "volume-up", 0),
4121+ GPIO_BUTTON(MX6_SABRELITE_VOL_DOWN_KEY, KEY_VOLUMEDOWN, 1, "volume-down", 0),
4122 };
4123
4124+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
4125 static struct gpio_keys_platform_data sabrelite_button_data = {
4126 .buttons = sabrelite_buttons,
4127 .nbuttons = ARRAY_SIZE(sabrelite_buttons),
4128@@ -948,7 +818,63 @@ static void __init sabrelite_add_device_buttons(void)
4129 platform_device_register(&sabrelite_button_device);
4130 }
4131 #else
4132-static void __init sabrelite_add_device_buttons(void) {}
4133+static void __init sabrelite_add_device_buttons(void)
4134+{
4135+ int i;
4136+ for (i=0; i < ARRAY_SIZE(sabrelite_buttons);i++) {
4137+ int gpio = sabrelite_buttons[i].gpio;
4138+ pr_debug("%s: exporting gpio %d\n", __func__, gpio);
4139+ gpio_export(gpio,1);
4140+ }
4141+}
4142+#endif
4143+
4144+#ifdef CONFIG_WL12XX_PLATFORM_DATA
4145+static void wl1271_set_power(bool enable)
4146+{
4147+ if (0 == enable) {
4148+ gpio_set_value(N6_WL1271_WL_EN, 0); /* momentarily disable */
4149+ mdelay(2);
4150+ gpio_set_value(N6_WL1271_WL_EN, 1);
4151+ }
4152+}
4153+
4154+struct wl12xx_platform_data n6q_wlan_data __initdata = {
4155+ .irq = gpio_to_irq(N6_WL1271_WL_IRQ),
4156+ .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
4157+ .set_power = wl1271_set_power,
4158+};
4159+
4160+static struct regulator_consumer_supply n6q_vwl1271_consumers[] = {
4161+ REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.1"),
4162+};
4163+
4164+static struct regulator_init_data n6q_vwl1271_init = {
4165+ .constraints = {
4166+ .name = "VDD_1.8V",
4167+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
4168+ },
4169+ .num_consumer_supplies = ARRAY_SIZE(n6q_vwl1271_consumers),
4170+ .consumer_supplies = n6q_vwl1271_consumers,
4171+};
4172+
4173+static struct fixed_voltage_config n6q_vwl1271_reg_config = {
4174+ .supply_name = "vwl1271",
4175+ .microvolts = 1800000, /* 1.80V */
4176+ .gpio = N6_WL1271_WL_EN,
4177+ .startup_delay = 70000, /* 70ms */
4178+ .enable_high = 1,
4179+ .enabled_at_boot = 0,
4180+ .init_data = &n6q_vwl1271_init,
4181+};
4182+
4183+static struct platform_device n6q_vwl1271_reg_devices = {
4184+ .name = "reg-fixed-voltage",
4185+ .id = 4,
4186+ .dev = {
4187+ .platform_data = &n6q_vwl1271_reg_config,
4188+ },
4189+};
4190 #endif
4191
4192 static struct regulator_consumer_supply sabrelite_vmmc_consumers[] = {
4193@@ -1055,7 +981,7 @@ static struct platform_device sgtl5000_sabrelite_vddd_reg_devices = {
4194
4195 #endif /* CONFIG_SND_SOC_SGTL5000 */
4196
4197-static int imx6q_init_audio(void)
4198+static int imx6_init_audio(void)
4199 {
4200 mxc_register_device(&mx6_sabrelite_audio_device,
4201 &mx6_sabrelite_audio_data);
4202@@ -1068,6 +994,15 @@ static int imx6q_init_audio(void)
4203 return 0;
4204 }
4205
4206+/* PWM0_PWMO: backlight control on DRGB connector */
4207+static struct platform_pwm_backlight_data mx6_sabrelite_pwm0_backlight_data = {
4208+ .pwm_id = 0,
4209+ .max_brightness = 255,
4210+ .dft_brightness = 255,
4211+ .pwm_period_ns = 1000000000/32768,
4212+};
4213+
4214+/* PWM3_PWMO: backlight control on LDB connector */
4215 static struct platform_pwm_backlight_data mx6_sabrelite_pwm_backlight_data = {
4216 .pwm_id = 3,
4217 .max_brightness = 255,
4218@@ -1121,19 +1056,37 @@ static int __init caam_setup(char *__unused)
4219 }
4220 early_param("caam", caam_setup);
4221
4222+static const struct imx_pcie_platform_data pcie_data __initconst = {
4223+ .pcie_pwr_en = -EINVAL,
4224+ .pcie_rst = -EINVAL, //MX6_SABRELITE_CAP_TCH_INT1,
4225+ .pcie_wake_up = -EINVAL,
4226+ .pcie_dis = -EINVAL,
4227+};
4228+
4229 /*!
4230 * Board specific initialization.
4231 */
4232 static void __init mx6_sabrelite_board_init(void)
4233 {
4234- int i;
4235+ int i, j;
4236 int ret;
4237 struct clk *clko2;
4238 struct clk *new_parent;
4239 int rate;
4240+ int isn6 ;
4241
4242- mxc_iomux_v3_setup_multiple_pads(mx6q_sabrelite_pads,
4243- ARRAY_SIZE(mx6q_sabrelite_pads));
4244+ IOMUX_SETUP(common_pads);
4245+
4246+ isn6 = is_nitrogen6w();
4247+ if (isn6) {
4248+ mx6_sabrelite_audio_data.ext_port = 3;
4249+ mx6_sabrelite_sd3_data.wp_gpio = -1 ;
4250+ IOMUX_SETUP(nitrogen6x_pads);
4251+ } else {
4252+ IOMUX_SETUP(sabrelite_pads);
4253+ }
4254+ printk(KERN_ERR "------------ Board type %s\n",
4255+ isn6 ? "Nitrogen6X/W" : "Sabre Lite");
4256
4257 #ifdef CONFIG_FEC_1588
4258 /* Set GPIO_16 input for IEEE-1588 ts_clk and RMII reference clock
4259@@ -1147,13 +1100,26 @@ static void __init mx6_sabrelite_board_init(void)
4260 gp_reg_id = sabrelite_dvfscore_data.reg_id;
4261 soc_reg_id = sabrelite_dvfscore_data.soc_id;
4262 pu_reg_id = sabrelite_dvfscore_data.pu_id;
4263- mx6q_sabrelite_init_uart();
4264+
4265+ imx6q_add_imx_uart(0, NULL);
4266+ imx6q_add_imx_uart(1, NULL);
4267+ if (isn6)
4268+ imx6q_add_imx_uart(2, &mx6_arm2_uart2_data);
4269+
4270+ if (!cpu_is_mx6q()) {
4271+ ldb_data.ipu_id = 0;
4272+ ldb_data.sec_ipu_id = 0;
4273+ }
4274 imx6q_add_mxc_hdmi_core(&hdmi_core_data);
4275
4276 imx6q_add_ipuv3(0, &ipu_data[0]);
4277- imx6q_add_ipuv3(1, &ipu_data[1]);
4278-
4279- for (i = 0; i < ARRAY_SIZE(sabrelite_fb_data); i++)
4280+ if (cpu_is_mx6q()) {
4281+ imx6q_add_ipuv3(1, &ipu_data[1]);
4282+ j = ARRAY_SIZE(sabrelite_fb_data);
4283+ } else {
4284+ j = (ARRAY_SIZE(sabrelite_fb_data) + 1) / 2;
4285+ }
4286+ for (i = 0; i < j; i++)
4287 imx6q_add_ipuv3fb(i, &sabrelite_fb_data[i]);
4288
4289 imx6q_add_vdoa();
4290@@ -1168,9 +1134,9 @@ static void __init mx6_sabrelite_board_init(void)
4291 if (1 == caam_enabled)
4292 imx6q_add_imx_caam();
4293
4294- imx6q_add_imx_i2c(0, &mx6q_sabrelite_i2c_data);
4295- imx6q_add_imx_i2c(1, &mx6q_sabrelite_i2c_data);
4296- imx6q_add_imx_i2c(2, &mx6q_sabrelite_i2c_data);
4297+ imx6q_add_imx_i2c(0, &mx6_sabrelite_i2c_data);
4298+ imx6q_add_imx_i2c(1, &mx6_sabrelite_i2c_data);
4299+ imx6q_add_imx_i2c(2, &mx6_sabrelite_i2c_data);
4300 i2c_register_board_info(0, mxc_i2c0_board_info,
4301 ARRAY_SIZE(mxc_i2c0_board_info));
4302 i2c_register_board_info(1, mxc_i2c1_board_info,
4303@@ -1179,33 +1145,35 @@ static void __init mx6_sabrelite_board_init(void)
4304 ARRAY_SIZE(mxc_i2c2_board_info));
4305
4306 /* SPI */
4307- imx6q_add_ecspi(0, &mx6q_sabrelite_spi_data);
4308+ imx6q_add_ecspi(0, &mx6_sabrelite_spi_data);
4309 spi_device_init();
4310
4311 imx6q_add_mxc_hdmi(&hdmi_data);
4312
4313- imx6q_add_anatop_thermal_imx(1, &mx6q_sabrelite_anatop_thermal_data);
4314+ imx6q_add_anatop_thermal_imx(1, &mx6_sabrelite_anatop_thermal_data);
4315 imx6_init_fec(fec_data);
4316- imx6q_add_pm_imx(0, &mx6q_sabrelite_pm_data);
4317- imx6q_add_sdhci_usdhc_imx(3, &mx6q_sabrelite_sd4_data);
4318- imx6q_add_sdhci_usdhc_imx(2, &mx6q_sabrelite_sd3_data);
4319- imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata);
4320- imx6q_sabrelite_init_usb();
4321- imx6q_add_ahci(0, &mx6q_sabrelite_sata_data);
4322+ imx6q_add_pm_imx(0, &mx6_sabrelite_pm_data);
4323+ imx6q_add_sdhci_usdhc_imx(2, &mx6_sabrelite_sd3_data);
4324+ imx6q_add_sdhci_usdhc_imx(3, &mx6_sabrelite_sd4_data);
4325+ imx_add_viv_gpu(&imx6_gpu_data, &imx6_gpu_pdata);
4326+ imx6_sabrelite_init_usb();
4327+ if (cpu_is_mx6q())
4328+ imx6q_add_ahci(0, &mx6_sabrelite_sata_data);
4329 imx6q_add_vpu();
4330- imx6q_init_audio();
4331+ imx6_init_audio();
4332 platform_device_register(&sabrelite_vmmc_reg_devices);
4333 imx_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk");
4334 imx_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk");
4335 imx6q_add_asrc(&imx_asrc_data);
4336
4337 /* release USB Hub reset */
4338- gpio_set_value(MX6Q_SABRELITE_USB_HUB_RESET, 1);
4339+ gpio_set_value(MX6_SABRELITE_USB_HUB_RESET, 1);
4340
4341 imx6q_add_mxc_pwm(0);
4342 imx6q_add_mxc_pwm(1);
4343 imx6q_add_mxc_pwm(2);
4344 imx6q_add_mxc_pwm(3);
4345+ imx6q_add_mxc_pwm_backlight(0, &mx6_sabrelite_pwm0_backlight_data);
4346 imx6q_add_mxc_pwm_backlight(3, &mx6_sabrelite_pwm_backlight_data);
4347
4348 imx6q_add_otp();
4349@@ -1220,12 +1188,23 @@ static void __init mx6_sabrelite_board_init(void)
4350 imx6q_add_hdmi_soc();
4351 imx6q_add_hdmi_soc_dai();
4352
4353- ret = gpio_request_array(mx6q_sabrelite_flexcan_gpios,
4354- ARRAY_SIZE(mx6q_sabrelite_flexcan_gpios));
4355- if (ret)
4356+ ret = gpio_request_array(mx6_sabrelite_flexcan_gpios,
4357+ ARRAY_SIZE(mx6_sabrelite_flexcan_gpios));
4358+ if (ret) {
4359 pr_err("failed to request flexcan1-gpios: %d\n", ret);
4360- else
4361- imx6q_add_flexcan0(&mx6q_sabrelite_flexcan0_pdata);
4362+ } else {
4363+ int ret = gpio_get_value(MX6_SABRELITE_CAN1_ERR);
4364+ if (ret == 0) {
4365+ imx6q_add_flexcan0(&mx6_sabrelite_flexcan0_tja1040_pdata);
4366+ pr_info("Flexcan NXP tja1040\n");
4367+ } else if (ret == 1) {
4368+ IOMUX_SETUP(sabrelite_mc33902_flexcan_pads);
4369+ imx6q_add_flexcan0(&mx6_sabrelite_flexcan0_mc33902_pdata);
4370+ pr_info("Flexcan Freescale mc33902\n");
4371+ } else {
4372+ pr_info("Flexcan gpio_get_value CAN1_ERR failed\n");
4373+ }
4374+ }
4375
4376 clko2 = clk_get(NULL, "clko2_clk");
4377 if (IS_ERR(clko2))
4378@@ -1241,6 +1220,28 @@ static void __init mx6_sabrelite_board_init(void)
4379 clk_enable(clko2);
4380 imx6q_add_busfreq();
4381
4382+#ifdef CONFIG_WL12XX_PLATFORM_DATA
4383+ if (isn6) {
4384+ imx6q_add_sdhci_usdhc_imx(1, &mx6_sabrelite_sd2_data);
4385+ /* WL12xx WLAN Init */
4386+ if (wl12xx_set_platform_data(&n6q_wlan_data))
4387+ pr_err("error setting wl12xx data\n");
4388+ platform_device_register(&n6q_vwl1271_reg_devices);
4389+
4390+ gpio_set_value(N6_WL1271_WL_EN, 1); /* momentarily enable */
4391+ gpio_set_value(N6_WL1271_BT_EN, 1);
4392+ mdelay(2);
4393+ gpio_set_value(N6_WL1271_WL_EN, 0);
4394+ gpio_set_value(N6_WL1271_BT_EN, 0);
4395+
4396+ gpio_free(N6_WL1271_WL_EN);
4397+ gpio_free(N6_WL1271_BT_EN);
4398+ mdelay(1);
4399+ }
4400+#endif
4401+
4402+ imx6q_add_pcie(&pcie_data);
4403+
4404 imx6q_add_perfmon(0);
4405 imx6q_add_perfmon(1);
4406 imx6q_add_perfmon(2);
4407@@ -1264,16 +1265,16 @@ static struct sys_timer mx6_sabrelite_timer = {
4408 .init = mx6_sabrelite_timer_init,
4409 };
4410
4411-static void __init mx6q_sabrelite_reserve(void)
4412+static void __init mx6_sabrelite_reserve(void)
4413 {
4414 #if defined(CONFIG_MXC_GPU_VIV) || defined(CONFIG_MXC_GPU_VIV_MODULE)
4415 phys_addr_t phys;
4416
4417- if (imx6q_gpu_pdata.reserved_mem_size) {
4418- phys = memblock_alloc_base(imx6q_gpu_pdata.reserved_mem_size,
4419+ if (imx6_gpu_pdata.reserved_mem_size) {
4420+ phys = memblock_alloc_base(imx6_gpu_pdata.reserved_mem_size,
4421 SZ_4K, SZ_1G);
4422- memblock_remove(phys, imx6q_gpu_pdata.reserved_mem_size);
4423- imx6q_gpu_pdata.reserved_mem_base = phys;
4424+ memblock_remove(phys, imx6_gpu_pdata.reserved_mem_size);
4425+ imx6_gpu_pdata.reserved_mem_base = phys;
4426 }
4427 #endif
4428 }
4429@@ -1289,5 +1290,5 @@ MACHINE_START(MX6Q_SABRELITE, "Freescale i.MX 6Quad Sabre-Lite Board")
4430 .init_irq = mx6_init_irq,
4431 .init_machine = mx6_sabrelite_board_init,
4432 .timer = &mx6_sabrelite_timer,
4433- .reserve = mx6q_sabrelite_reserve,
4434+ .reserve = mx6_sabrelite_reserve,
4435 MACHINE_END
4436diff --git a/arch/arm/mach-mx6/cpu_op-mx6.c b/arch/arm/mach-mx6/cpu_op-mx6.c
4437index 5124c5e..750e57d 100644
4438--- a/arch/arm/mach-mx6/cpu_op-mx6.c
4439+++ b/arch/arm/mach-mx6/cpu_op-mx6.c
4440@@ -95,7 +95,7 @@ static struct cpu_op mx6q_cpu_op_1G[] = {
4441 .soc_voltage = 1250000,
4442 #else
4443 .pu_voltage = 1175000,
4444- .soc_voltage = 1175000,
4445+ .soc_voltage = 1250000,
4446 #endif
4447 .cpu_voltage = 1150000,},
4448 #ifdef CONFIG_MX6_VPU_352M
4449@@ -115,7 +115,7 @@ static struct cpu_op mx6q_cpu_op_1G[] = {
4450 .cpu_rate = 396000000,
4451 .cpu_podf = 0,
4452 .pu_voltage = 1175000,
4453- .soc_voltage = 1175000,
4454+ .soc_voltage = 1250000,
4455 .cpu_voltage = 950000,},
4456 #endif
4457 };
4458diff --git a/arch/arm/mach-mx6/cpu_regulator-mx6.c b/arch/arm/mach-mx6/cpu_regulator-mx6.c
4459index d905132..2af5d38 100644
4460--- a/arch/arm/mach-mx6/cpu_regulator-mx6.c
4461+++ b/arch/arm/mach-mx6/cpu_regulator-mx6.c
4462@@ -21,6 +21,7 @@
4463 #include <linux/cpufreq.h>
4464 #endif
4465 #include <linux/io.h>
4466+#include <linux/delay.h>
4467 #include <asm/cpu.h>
4468
4469 #include <mach/clock.h>
4470@@ -101,49 +102,16 @@ void mx6_cpu_regulator_init(void)
4471 regulator_set_voltage(cpu_regulator,
4472 cpu_op_tbl[0].cpu_voltage,
4473 cpu_op_tbl[0].cpu_voltage);
4474- if (enable_ldo_mode == LDO_MODE_BYPASSED) {
4475- /*digital bypass VDDPU/VDDSOC/VDDARM*/
4476- reg = __raw_readl(ANADIG_REG_CORE);
4477- reg &= ~BM_ANADIG_REG_CORE_REG0_TRG;
4478- reg |= BF_ANADIG_REG_CORE_REG0_TRG(0x1f);
4479- reg &= ~BM_ANADIG_REG_CORE_REG1_TRG;
4480- reg |= BF_ANADIG_REG_CORE_REG1_TRG(0x1f);
4481- reg &= ~BM_ANADIG_REG_CORE_REG2_TRG;
4482- reg |= BF_ANADIG_REG_CORE_REG2_TRG(0x1f);
4483- __raw_writel(reg, ANADIG_REG_CORE);
4484- /* Mask the ANATOP brown out interrupt in the GPC. */
4485- reg = __raw_readl(gpc_base + 0x14);
4486- reg |= 0x80000000;
4487- __raw_writel(reg, gpc_base + 0x14);
4488- }
4489- clk_set_rate(cpu_clk, cpu_op_tbl[0].cpu_rate);
4490-
4491- /*Fix loops-per-jiffy */
4492-#ifdef CONFIG_SMP
4493- for_each_online_cpu(cpu)
4494- per_cpu(cpu_data, cpu).loops_per_jiffy =
4495- mx6_cpu_jiffies(
4496- per_cpu(cpu_data, cpu).loops_per_jiffy,
4497- curr_cpu / 1000,
4498- clk_get_rate(cpu_clk) / 1000);
4499-#else
4500- old_loops_per_jiffy = loops_per_jiffy;
4501-
4502- loops_per_jiffy =
4503- mx6_cpu_jiffies(old_loops_per_jiffy,
4504- curr_cpu/1000,
4505- clk_get_rate(cpu_clk) / 1000);
4506-#endif
4507-#if defined(CONFIG_CPU_FREQ)
4508- /* Fix CPU frequency for CPUFREQ. */
4509- for (cpu = 0; cpu < num_online_cpus(); cpu++)
4510- cpufreq_get(cpu);
4511-#endif
4512 }
4513 }
4514 soc_regulator = regulator_get(NULL, soc_reg_id);
4515 if (IS_ERR(soc_regulator))
4516 printk(KERN_ERR "%s: failed to get soc regulator\n", __func__);
4517+ else if (cpu_op_tbl)
4518+ regulator_set_voltage(soc_regulator,
4519+ cpu_op_tbl[0].soc_voltage,
4520+ cpu_op_tbl[0].soc_voltage);
4521+
4522 pu_regulator = regulator_get(NULL, pu_reg_id);
4523 if (IS_ERR(pu_regulator))
4524 printk(KERN_ERR "%s: failed to get pu regulator\n", __func__);
4525@@ -161,7 +129,66 @@ void mx6_cpu_regulator_init(void)
4526 *VDDPU can be turned off by internal anatop anatop power gate.
4527 *
4528 */
4529- else if (!IS_ERR(pu_regulator) && strcmp(pu_reg_id, "cpu_vddgpu"))
4530- external_pureg = 1;
4531+ else {
4532+ printk (KERN_ERR "%s: have pu_regulator\n", __func__ );
4533+ if (strcmp(pu_reg_id, "cpu_vddgpu"))
4534+ external_pureg = 1;
4535+
4536+ if (cpu_op_tbl) {
4537+ printk (KERN_ERR "%s: setting pu_regulator to %uuV\n",
4538+ __func__,
4539+ cpu_op_tbl[0].pu_voltage);
4540+
4541+ regulator_set_voltage(pu_regulator,
4542+ cpu_op_tbl[0].pu_voltage,
4543+ cpu_op_tbl[0].pu_voltage);
4544+ }
4545+ }
4546+
4547+ if (cpu_op_tbl
4548+ && !IS_ERR(cpu_regulator)
4549+ && !IS_ERR(soc_regulator)
4550+ && !IS_ERR(pu_regulator)) {
4551+ udelay(500);
4552+
4553+ if (enable_ldo_mode == LDO_MODE_BYPASSED) {
4554+ /*digital bypass VDDPU/VDDSOC/VDDARM*/
4555+ reg = __raw_readl(ANADIG_REG_CORE);
4556+ reg &= ~BM_ANADIG_REG_CORE_REG0_TRG;
4557+ reg |= BF_ANADIG_REG_CORE_REG0_TRG(0x1f);
4558+ reg &= ~BM_ANADIG_REG_CORE_REG1_TRG;
4559+ reg |= BF_ANADIG_REG_CORE_REG1_TRG(0x1f);
4560+ reg &= ~BM_ANADIG_REG_CORE_REG2_TRG;
4561+ reg |= BF_ANADIG_REG_CORE_REG2_TRG(0x1f);
4562+ __raw_writel(reg, ANADIG_REG_CORE);
4563+ /* Mask the ANATOP brown out interrupt in the GPC. */
4564+ reg = __raw_readl(gpc_base + 0x14);
4565+ reg |= 0x80000000;
4566+ __raw_writel(reg, gpc_base + 0x14);
4567+ }
4568+ clk_set_rate(cpu_clk, cpu_op_tbl[0].cpu_rate);
4569+
4570+ /*Fix loops-per-jiffy */
4571+#ifdef CONFIG_SMP
4572+ for_each_online_cpu(cpu)
4573+ per_cpu(cpu_data, cpu).loops_per_jiffy =
4574+ mx6_cpu_jiffies(
4575+ per_cpu(cpu_data, cpu).loops_per_jiffy,
4576+ curr_cpu / 1000,
4577+ clk_get_rate(cpu_clk) / 1000);
4578+#else
4579+ old_loops_per_jiffy = loops_per_jiffy;
4580+
4581+ loops_per_jiffy =
4582+ mx6_cpu_jiffies(old_loops_per_jiffy,
4583+ curr_cpu/1000,
4584+ clk_get_rate(cpu_clk) / 1000);
4585+#endif
4586+#if defined(CONFIG_CPU_FREQ)
4587+ /* Fix CPU frequency for CPUFREQ. */
4588+ for (cpu = 0; cpu < num_online_cpus(); cpu++)
4589+ cpufreq_get(cpu);
4590+#endif
4591+ }
4592 }
4593
4594diff --git a/arch/arm/mach-mx6/pads-mx6_sabrelite.h b/arch/arm/mach-mx6/pads-mx6_sabrelite.h
4595new file mode 100644
4596index 0000000..63a556f
4597--- /dev/null
4598+++ b/arch/arm/mach-mx6/pads-mx6_sabrelite.h
4599@@ -0,0 +1,348 @@
4600+#undef MX6PAD
4601+#undef MX6NAME
4602+
4603+#ifdef FOR_DL_SOLO
4604+#define MX6PAD(a) MX6DL_PAD_##a
4605+#define MX6NAME(a) mx6dl_solo_##a
4606+#else
4607+#define MX6PAD(a) MX6Q_PAD_##a
4608+#define MX6NAME(a) mx6q_##a
4609+#endif
4610+
4611+#define MX6Q_USDHC_PAD_CTRL_50MHZ MX6Q_USDHC_PAD_CTRL
4612+#define MX6Q_PAD_SD3_CLK__USDHC3_CLK MX6Q_PAD_SD3_CLK__USDHC3_CLK_50MHZ
4613+#define MX6Q_PAD_SD3_CMD__USDHC3_CMD MX6Q_PAD_SD3_CMD__USDHC3_CMD_50MHZ
4614+#define MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 MX6Q_PAD_SD3_DAT0__USDHC3_DAT0_50MHZ
4615+#define MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 MX6Q_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ
4616+#define MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 MX6Q_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ
4617+#define MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 MX6Q_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ
4618+#define MX6Q_PAD_SD4_CLK__USDHC4_CLK MX6Q_PAD_SD3_CLK__USDHC3_CLK_50MHZ
4619+#define MX6Q_PAD_SD4_CMD__USDHC4_CMD MX6Q_PAD_SD3_CMD__USDHC3_CMD_50MHZ
4620+#define MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 MX6Q_PAD_SD3_DAT0__USDHC3_DAT0_50MHZ
4621+#define MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 MX6Q_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ
4622+#define MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 MX6Q_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ
4623+#define MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 MX6Q_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ
4624+
4625+#define MX6DL_PAD_SD3_CLK__USDHC3_CLK MX6DL_PAD_SD3_CLK__USDHC3_CLK_50MHZ
4626+#define MX6DL_PAD_SD3_CMD__USDHC3_CMD MX6DL_PAD_SD3_CMD__USDHC3_CMD_50MHZ
4627+#define MX6DL_PAD_SD3_DAT0__USDHC3_DAT0 MX6DL_PAD_SD3_DAT0__USDHC3_DAT0_50MHZ
4628+#define MX6DL_PAD_SD3_DAT1__USDHC3_DAT1 MX6DL_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ
4629+#define MX6DL_PAD_SD3_DAT2__USDHC3_DAT2 MX6DL_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ
4630+#define MX6DL_PAD_SD3_DAT3__USDHC3_DAT3 MX6DL_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ
4631+#define MX6DL_PAD_SD4_CLK__USDHC4_CLK MX6DL_PAD_SD3_CLK__USDHC3_CLK_50MHZ
4632+#define MX6DL_PAD_SD4_CMD__USDHC4_CMD MX6DL_PAD_SD3_CMD__USDHC3_CMD_50MHZ
4633+#define MX6DL_PAD_SD4_DAT0__USDHC4_DAT0 MX6DL_PAD_SD3_DAT0__USDHC3_DAT0_50MHZ
4634+#define MX6DL_PAD_SD4_DAT1__USDHC4_DAT1 MX6DL_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ
4635+#define MX6DL_PAD_SD4_DAT2__USDHC4_DAT2 MX6DL_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ
4636+#define MX6DL_PAD_SD4_DAT3__USDHC4_DAT3 MX6DL_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ
4637+
4638+#define NP(id, speed, pin) \
4639+ NEW_PAD_CTRL(MX6PAD(SD##id##_##pin##__USDHC##id##_##pin), \
4640+ MX6Q_USDHC_PAD_CTRL_##speed##MHZ)
4641+
4642+#define SD_PINS(id, speed) \
4643+ NP(id, speed, CLK), \
4644+ NP(id, speed, CMD), \
4645+ NP(id, speed, DAT0), \
4646+ NP(id, speed, DAT1), \
4647+ NP(id, speed, DAT2), \
4648+ NP(id, speed, DAT3)
4649+
4650+static iomux_v3_cfg_t MX6NAME(nitrogen6x_pads)[] = {
4651+ /* AUDMUX */
4652+ MX6PAD(CSI0_DAT7__AUDMUX_AUD3_RXD),
4653+ MX6PAD(CSI0_DAT4__AUDMUX_AUD3_TXC),
4654+ MX6PAD(CSI0_DAT5__AUDMUX_AUD3_TXD),
4655+ MX6PAD(CSI0_DAT6__AUDMUX_AUD3_TXFS),
4656+
4657+ NEW_PAD_CTRL(MX6PAD(NANDF_CS1__GPIO_6_14), N6_IRQ_PADCFG), /* wl1271 wl_irq */
4658+
4659+ /* USDHC2 */
4660+ SD_PINS(2, 50),
4661+ MX6PAD(SD1_CLK__OSC32K_32K_OUT), /* wl1271 clock */
4662+
4663+ /* UART3 for wl1271 */
4664+ MX6PAD(EIM_D24__UART3_TXD),
4665+ MX6PAD(EIM_D25__UART3_RXD),
4666+ MX6PAD(EIM_D23__UART3_CTS),
4667+ MX6PAD(EIM_D31__UART3_RTS),
4668+ 0
4669+};
4670+
4671+static iomux_v3_cfg_t MX6NAME(sabrelite_pads)[] = {
4672+ /* AUDMUX */
4673+ MX6PAD(SD2_DAT0__AUDMUX_AUD4_RXD),
4674+ MX6PAD(SD2_DAT3__AUDMUX_AUD4_TXC),
4675+ MX6PAD(SD2_DAT2__AUDMUX_AUD4_TXD),
4676+ MX6PAD(SD2_DAT1__AUDMUX_AUD4_TXFS),
4677+ 0
4678+};
4679+
4680+static iomux_v3_cfg_t MX6NAME(common_pads)[] = {
4681+ /* CAN1 */
4682+ MX6PAD(KEY_ROW2__CAN1_RXCAN),
4683+ MX6PAD(KEY_COL2__CAN1_TXCAN),
4684+ MX6PAD(GPIO_2__GPIO_1_2), /* STNDBY */
4685+ MX6PAD(GPIO_7__GPIO_1_7), /* NERR */
4686+ NEW_PAD_CTRL(MX6PAD(GPIO_7__GPIO_1_7), MX6_SABRELITE_CAN1_ERR_TEST_PADCFG),
4687+ MX6PAD(GPIO_4__GPIO_1_4), /* Enable */
4688+
4689+ /* CCM */
4690+ MX6PAD(GPIO_0__CCM_CLKO), /* SGTL500 sys_mclk */
4691+ MX6PAD(GPIO_3__CCM_CLKO2), /* J5 - Camera MCLK */
4692+
4693+ /* ECSPI1 */
4694+ MX6PAD(EIM_D17__ECSPI1_MISO),
4695+ MX6PAD(EIM_D18__ECSPI1_MOSI),
4696+ MX6PAD(EIM_D16__ECSPI1_SCLK),
4697+ MX6PAD(EIM_D19__GPIO_3_19), /*SS1*/
4698+
4699+ /* ENET */
4700+ MX6PAD(ENET_MDIO__ENET_MDIO),
4701+ MX6PAD(ENET_MDC__ENET_MDC),
4702+ MX6PAD(RGMII_TXC__ENET_RGMII_TXC),
4703+ MX6PAD(RGMII_TD0__ENET_RGMII_TD0),
4704+ MX6PAD(RGMII_TD1__ENET_RGMII_TD1),
4705+ MX6PAD(RGMII_TD2__ENET_RGMII_TD2),
4706+ MX6PAD(RGMII_TD3__ENET_RGMII_TD3),
4707+ MX6PAD(RGMII_TX_CTL__ENET_RGMII_TX_CTL),
4708+ MX6PAD(ENET_REF_CLK__ENET_TX_CLK),
4709+ MX6PAD(RGMII_RXC__ENET_RGMII_RXC),
4710+ MX6PAD(RGMII_RD0__ENET_RGMII_RD0),
4711+ MX6PAD(RGMII_RD1__ENET_RGMII_RD1),
4712+ MX6PAD(RGMII_RD2__ENET_RGMII_RD2),
4713+ MX6PAD(RGMII_RD3__ENET_RGMII_RD3),
4714+ MX6PAD(RGMII_RX_CTL__ENET_RGMII_RX_CTL),
4715+ MX6PAD(ENET_TX_EN__GPIO_1_28), /* Micrel RGMII Phy Interrupt */
4716+
4717+ /* GPIO1 */
4718+ MX6PAD(ENET_RX_ER__GPIO_1_24), /* J9 - Microphone Detect */
4719+
4720+ /* GPIO2 */
4721+ MX6PAD(NANDF_D1__GPIO_2_1), /* J14 - Menu Button */
4722+ MX6PAD(NANDF_D2__GPIO_2_2), /* J14 - Back Button */
4723+ MX6PAD(NANDF_D3__GPIO_2_3), /* J14 - Search Button */
4724+ MX6PAD(NANDF_D4__GPIO_2_4), /* J14 - Home Button */
4725+ MX6PAD(EIM_A22__GPIO_2_16), /* J12 - Boot Mode Select */
4726+ MX6PAD(EIM_A21__GPIO_2_17), /* J12 - Boot Mode Select */
4727+ MX6PAD(EIM_A20__GPIO_2_18), /* J12 - Boot Mode Select */
4728+ MX6PAD(EIM_A19__GPIO_2_19), /* J12 - Boot Mode Select */
4729+ MX6PAD(EIM_A18__GPIO_2_20), /* J12 - Boot Mode Select */
4730+ MX6PAD(EIM_A17__GPIO_2_21), /* J12 - Boot Mode Select */
4731+ MX6PAD(EIM_A16__GPIO_2_22), /* J12 - Boot Mode Select */
4732+ MX6PAD(EIM_RW__GPIO_2_26), /* J12 - Boot Mode Select */
4733+ MX6PAD(EIM_LBA__GPIO_2_27), /* J12 - Boot Mode Select */
4734+ MX6PAD(EIM_EB0__GPIO_2_28), /* J12 - Boot Mode Select */
4735+ MX6PAD(EIM_EB1__GPIO_2_29), /* J12 - Boot Mode Select */
4736+ MX6PAD(EIM_EB3__GPIO_2_31), /* J12 - Boot Mode Select */
4737+
4738+ /* GPIO3 */
4739+ MX6PAD(EIM_DA0__GPIO_3_0), /* J12 - Boot Mode Select */
4740+ MX6PAD(EIM_DA1__GPIO_3_1), /* J12 - Boot Mode Select */
4741+ MX6PAD(EIM_DA2__GPIO_3_2), /* J12 - Boot Mode Select */
4742+ MX6PAD(EIM_DA3__GPIO_3_3), /* J12 - Boot Mode Select */
4743+ MX6PAD(EIM_DA4__GPIO_3_4), /* J12 - Boot Mode Select */
4744+ MX6PAD(EIM_DA5__GPIO_3_5), /* J12 - Boot Mode Select */
4745+ MX6PAD(EIM_DA6__GPIO_3_6), /* J12 - Boot Mode Select */
4746+ MX6PAD(EIM_DA7__GPIO_3_7), /* J12 - Boot Mode Select */
4747+ MX6PAD(EIM_DA8__GPIO_3_8), /* J12 - Boot Mode Select */
4748+ MX6PAD(EIM_DA9__GPIO_3_9), /* J12 - Boot Mode Select */
4749+ MX6PAD(EIM_DA10__GPIO_3_10), /* J12 - Boot Mode Select */
4750+ MX6PAD(EIM_DA11__GPIO_3_11), /* J12 - Boot Mode Select */
4751+ MX6PAD(EIM_DA12__GPIO_3_12), /* J12 - Boot Mode Select */
4752+ MX6PAD(EIM_DA13__GPIO_3_13), /* J12 - Boot Mode Select */
4753+ MX6PAD(EIM_DA14__GPIO_3_14), /* J12 - Boot Mode Select */
4754+ MX6PAD(EIM_DA15__GPIO_3_15), /* J12 - Boot Mode Select */
4755+
4756+ /* GPIO4 */
4757+ MX6PAD(GPIO_19__GPIO_4_5), /* J14 - Volume Down */
4758+
4759+ /* GPIO5 */
4760+ MX6PAD(EIM_WAIT__GPIO_5_0), /* J12 - Boot Mode Select */
4761+ MX6PAD(EIM_A24__GPIO_5_4), /* J12 - Boot Mode Select */
4762+
4763+ /* GPIO6 */
4764+ MX6PAD(EIM_A23__GPIO_6_6), /* J12 - Boot Mode Select */
4765+
4766+ /* NANDF_CS1/2/3 are unused for sabrelite */
4767+ NEW_PAD_CTRL(MX6PAD(NANDF_CS1__GPIO_6_14), N6_IRQ_TEST_PADCFG), /* wl1271 wl_irq */
4768+ NEW_PAD_CTRL(MX6PAD(NANDF_CS2__GPIO_6_15), N6_EN_PADCFG), /* wl1271 wl_en */
4769+ NEW_PAD_CTRL(MX6PAD(NANDF_CS3__GPIO_6_16), N6_EN_PADCFG), /* wl1271 bt_en */
4770+
4771+ /* GPIO7 */
4772+ MX6PAD(GPIO_17__GPIO_7_12), /* USB Hub Reset */
4773+ MX6PAD(GPIO_18__GPIO_7_13), /* J14 - Volume Up */
4774+
4775+ /* I2C1, SGTL5000 */
4776+ MX6PAD(EIM_D21__I2C1_SCL), /* GPIO3[21] */
4777+ MX6PAD(EIM_D28__I2C1_SDA), /* GPIO3[28] */
4778+
4779+ /* I2C2 Camera, MIPI */
4780+ MX6PAD(KEY_COL3__I2C2_SCL), /* GPIO4[12] */
4781+ MX6PAD(KEY_ROW3__I2C2_SDA), /* GPIO4[13] */
4782+
4783+ /* I2C3 */
4784+ MX6PAD(GPIO_5__I2C3_SCL), /* GPIO1[5] - J7 - Display card */
4785+#ifdef CONFIG_FEC_1588
4786+ MX6PAD(GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT),
4787+#else
4788+ MX6PAD(GPIO_16__I2C3_SDA), /* GPIO7[11] - J15 - RGB connector */
4789+#endif
4790+
4791+ /* DISPLAY */
4792+ MX6PAD(DI0_DISP_CLK__IPU1_DI0_DISP_CLK),
4793+ MX6PAD(DI0_PIN15__IPU1_DI0_PIN15), /* DE */
4794+ MX6PAD(DI0_PIN2__IPU1_DI0_PIN2), /* HSync */
4795+ MX6PAD(DI0_PIN3__IPU1_DI0_PIN3), /* VSync */
4796+ NEW_PAD_CTRL(MX6PAD(DI0_PIN4__GPIO_4_20),
4797+ WEAK_PULLUP), /* I2C Touch IRQ */
4798+ MX6PAD(DISP0_DAT0__IPU1_DISP0_DAT_0),
4799+ MX6PAD(DISP0_DAT1__IPU1_DISP0_DAT_1),
4800+ MX6PAD(DISP0_DAT2__IPU1_DISP0_DAT_2),
4801+ MX6PAD(DISP0_DAT3__IPU1_DISP0_DAT_3),
4802+ MX6PAD(DISP0_DAT4__IPU1_DISP0_DAT_4),
4803+ MX6PAD(DISP0_DAT5__IPU1_DISP0_DAT_5),
4804+ MX6PAD(DISP0_DAT6__IPU1_DISP0_DAT_6),
4805+ MX6PAD(DISP0_DAT7__IPU1_DISP0_DAT_7),
4806+ MX6PAD(DISP0_DAT8__IPU1_DISP0_DAT_8),
4807+ MX6PAD(DISP0_DAT9__IPU1_DISP0_DAT_9),
4808+ MX6PAD(DISP0_DAT10__IPU1_DISP0_DAT_10),
4809+ MX6PAD(DISP0_DAT11__IPU1_DISP0_DAT_11),
4810+ MX6PAD(DISP0_DAT12__IPU1_DISP0_DAT_12),
4811+ MX6PAD(DISP0_DAT13__IPU1_DISP0_DAT_13),
4812+ MX6PAD(DISP0_DAT14__IPU1_DISP0_DAT_14),
4813+ MX6PAD(DISP0_DAT15__IPU1_DISP0_DAT_15),
4814+ MX6PAD(DISP0_DAT16__IPU1_DISP0_DAT_16),
4815+ MX6PAD(DISP0_DAT17__IPU1_DISP0_DAT_17),
4816+ MX6PAD(DISP0_DAT18__IPU1_DISP0_DAT_18),
4817+ MX6PAD(DISP0_DAT19__IPU1_DISP0_DAT_19),
4818+ MX6PAD(DISP0_DAT20__IPU1_DISP0_DAT_20),
4819+ MX6PAD(DISP0_DAT21__IPU1_DISP0_DAT_21),
4820+ MX6PAD(DISP0_DAT22__IPU1_DISP0_DAT_22),
4821+ MX6PAD(DISP0_DAT23__IPU1_DISP0_DAT_23),
4822+ MX6PAD(GPIO_7__GPIO_1_7), /* J7 - Display Connector GP */
4823+ MX6PAD(GPIO_9__GPIO_1_9), /* J7 - Display Connector GP */
4824+ MX6PAD(NANDF_D0__GPIO_2_0), /* J6 - LVDS Display contrast */
4825+
4826+
4827+ /* PWM1 */
4828+ MX6PAD(SD1_DAT3__PWM1_PWMO), /* GPIO1[21] */
4829+
4830+ /* PWM2 */
4831+ MX6PAD(SD1_DAT2__PWM2_PWMO), /* GPIO1[19] */
4832+
4833+ /* PWM3 */
4834+ MX6PAD(SD1_DAT1__PWM3_PWMO), /* GPIO1[17] */
4835+
4836+ /* PWM4 */
4837+ MX6PAD(SD1_CMD__PWM4_PWMO), /* GPIO1[18] */
4838+
4839+ /* UART1 */
4840+ MX6PAD(SD3_DAT7__UART1_TXD),
4841+ MX6PAD(SD3_DAT6__UART1_RXD),
4842+
4843+ /* UART2 for debug */
4844+ MX6PAD(EIM_D26__UART2_TXD),
4845+ MX6PAD(EIM_D27__UART2_RXD),
4846+
4847+ /* USBOTG ID pin */
4848+ MX6PAD(GPIO_1__USBOTG_ID),
4849+
4850+ /* USB OC pin */
4851+ MX6PAD(KEY_COL4__USBOH3_USBOTG_OC),
4852+ MX6PAD(EIM_D30__USBOH3_USBH1_OC),
4853+
4854+ /* USDHC3 */
4855+ SD_PINS(3, 50),
4856+ MX6PAD(SD3_DAT5__GPIO_7_0), /* J18 - SD3_CD */
4857+ NEW_PAD_CTRL(MX6PAD(SD3_DAT4__GPIO_7_1), MX6_SABRELITE_SD3_WP_PADCFG),
4858+
4859+ /* USDHC4 */
4860+ SD_PINS(4, 50),
4861+ MX6PAD(NANDF_D6__GPIO_2_6), /* J20 - SD4_CD */
4862+ MX6PAD(NANDF_D7__GPIO_2_7), /* SD4_WP */
4863+ 0
4864+};
4865+
4866+#if defined(CONFIG_MXC_CAMERA_OV5640_MIPI) || defined(CONFIG_MXC_CAMERA_OV5640_MIPI_MODULE)
4867+static iomux_v3_cfg_t MX6NAME(sabrelite_mipi_pads)[] = {
4868+ MX6PAD(NANDF_D5__GPIO_2_5), /* Camera Reset, Nitrogen6x */
4869+ MX6PAD(NANDF_CS0__GPIO_6_11), /* Camera Reset, SOM jumpered */
4870+ MX6PAD(GPIO_6__GPIO_1_6), /* Camera GP */
4871+ 0
4872+};
4873+#else
4874+static iomux_v3_cfg_t MX6NAME(sabrelite_csi0_sensor_pads)[] = {
4875+ /* IPU1 Camera */
4876+ MX6PAD(CSI0_DAT8__IPU1_CSI0_D_8),
4877+ MX6PAD(CSI0_DAT9__IPU1_CSI0_D_9),
4878+ MX6PAD(CSI0_DAT10__IPU1_CSI0_D_10),
4879+ MX6PAD(CSI0_DAT11__IPU1_CSI0_D_11),
4880+ MX6PAD(CSI0_DAT12__IPU1_CSI0_D_12),
4881+ MX6PAD(CSI0_DAT13__IPU1_CSI0_D_13),
4882+ MX6PAD(CSI0_DAT14__IPU1_CSI0_D_14),
4883+ MX6PAD(CSI0_DAT15__IPU1_CSI0_D_15),
4884+ MX6PAD(CSI0_DAT16__IPU1_CSI0_D_16),
4885+ MX6PAD(CSI0_DAT17__IPU1_CSI0_D_17),
4886+ MX6PAD(CSI0_DAT18__IPU1_CSI0_D_18),
4887+ MX6PAD(CSI0_DAT19__IPU1_CSI0_D_19),
4888+ MX6PAD(CSI0_DATA_EN__IPU1_CSI0_DATA_EN),
4889+ MX6PAD(CSI0_MCLK__IPU1_CSI0_HSYNC),
4890+ MX6PAD(CSI0_PIXCLK__IPU1_CSI0_PIXCLK),
4891+ MX6PAD(CSI0_VSYNC__IPU1_CSI0_VSYNC),
4892+ MX6PAD(GPIO_6__GPIO_1_6), /* J5 - Camera GP */
4893+ MX6PAD(GPIO_8__GPIO_1_8), /* J5 - Camera Reset */
4894+ MX6PAD(NANDF_CS0__GPIO_6_11), /* J5 - Camera Reset */
4895+ MX6PAD(SD1_DAT0__GPIO_1_16), /* J5 - Camera GP */
4896+ MX6PAD(NANDF_D5__GPIO_2_5), /* J16 - MIPI GP */
4897+ MX6PAD(NANDF_WP_B__GPIO_6_9), /* J16 - MIPI GP */
4898+ 0
4899+};
4900+#endif
4901+
4902+static iomux_v3_cfg_t MX6NAME(sabrelite_hdmi_ddc_pads)[] = {
4903+ MX6PAD(KEY_COL3__HDMI_TX_DDC_SCL), /* HDMI DDC SCL */
4904+ MX6PAD(KEY_ROW3__HDMI_TX_DDC_SDA), /* HDMI DDC SDA */
4905+ 0
4906+};
4907+
4908+static iomux_v3_cfg_t MX6NAME(sabrelite_i2c2_pads)[] = {
4909+ MX6PAD(KEY_COL3__I2C2_SCL), /* I2C2 SCL */
4910+ MX6PAD(KEY_ROW3__I2C2_SDA), /* I2C2 SDA */
4911+ 0
4912+};
4913+
4914+static iomux_v3_cfg_t MX6NAME(sabrelite_mc33902_flexcan_pads)[] = {
4915+ NEW_PAD_CTRL(MX6PAD(GPIO_7__GPIO_1_7), MX6_SABRELITE_CAN1_ERR_PADCFG),
4916+ 0
4917+};
4918+
4919+#define MX6_USDHC_PAD_SETTING(id, speed) \
4920+ MX6NAME(sd##id##_##speed##mhz)[] = { SD_PINS(id, speed), 0 }
4921+
4922+static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(2, 50);
4923+static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(2, 100);
4924+static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(2, 200);
4925+static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(3, 50);
4926+static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(3, 100);
4927+static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(3, 200);
4928+static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(4, 50);
4929+static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(4, 100);
4930+static iomux_v3_cfg_t MX6_USDHC_PAD_SETTING(4, 200);
4931+
4932+#define _50MHZ 0
4933+#define _100MHZ 1
4934+#define _200MHZ 2
4935+#define SD_SPEED_CNT 3
4936+static iomux_v3_cfg_t * MX6NAME(sd_pads)[] =
4937+{
4938+ MX6NAME(sd2_50mhz),
4939+ MX6NAME(sd2_100mhz),
4940+ MX6NAME(sd2_200mhz),
4941+ MX6NAME(sd3_50mhz),
4942+ MX6NAME(sd3_100mhz),
4943+ MX6NAME(sd3_200mhz),
4944+ MX6NAME(sd4_50mhz),
4945+ MX6NAME(sd4_100mhz),
4946+ MX6NAME(sd4_200mhz),
4947+};
4948diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
4949old mode 100755
4950new mode 100644
4951diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
4952old mode 100755
4953new mode 100644
4954diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c
4955old mode 100755
4956new mode 100644
4957diff --git a/arch/arm/plat-mxc/cpu.c b/arch/arm/plat-mxc/cpu.c
4958old mode 100755
4959new mode 100644
4960diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c
4961old mode 100755
4962new mode 100644
4963index 4cdc837..95c7b54
4964--- a/arch/arm/plat-mxc/cpufreq.c
4965+++ b/arch/arm/plat-mxc/cpufreq.c
4966@@ -112,7 +112,7 @@ int set_cpu_freq(int freq)
4967 printk(KERN_ERR "COULD NOT SET GP VOLTAGE!!!!\n");
4968 goto err3;
4969 }
4970- udelay(50);
4971+ udelay(260);
4972 }
4973 ret = clk_set_rate(cpu_clk, freq);
4974 if (ret != 0) {
4975diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig
4976old mode 100755
4977new mode 100644
4978diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile
4979old mode 100755
4980new mode 100644
4981diff --git a/arch/arm/plat-mxc/devices/platform-ahci-imx.c b/arch/arm/plat-mxc/devices/platform-ahci-imx.c
4982old mode 100755
4983new mode 100644
4984diff --git a/arch/arm/plat-mxc/devices/platform-imx-dcp.c b/arch/arm/plat-mxc/devices/platform-imx-dcp.c
4985old mode 100755
4986new mode 100644
4987diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c
4988old mode 100755
4989new mode 100644
4990diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/plat-mxc/devices/platform-imx-i2c.c
4991old mode 100755
4992new mode 100644
4993diff --git a/arch/arm/plat-mxc/devices/platform-imx-iim.c b/arch/arm/plat-mxc/devices/platform-imx-iim.c
4994old mode 100755
4995new mode 100644
4996diff --git a/arch/arm/plat-mxc/devices/platform-imx-ocotp.c b/arch/arm/plat-mxc/devices/platform-imx-ocotp.c
4997old mode 100755
4998new mode 100644
4999diff --git a/arch/arm/plat-mxc/devices/platform-imx-rngb.c b/arch/arm/plat-mxc/devices/platform-imx-rngb.c
5000old mode 100755
5001new mode 100644
5002diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/plat-mxc/devices/platform-imx-ssi.c
5003old mode 100755
5004new mode 100644
5005diff --git a/arch/arm/plat-mxc/devices/platform-imx_dvfs.c b/arch/arm/plat-mxc/devices/platform-imx_dvfs.c
5006old mode 100755
5007new mode 100644
5008diff --git a/arch/arm/plat-mxc/devices/platform-imx_ipuv3.c b/arch/arm/plat-mxc/devices/platform-imx_ipuv3.c
5009old mode 100755
5010new mode 100644
5011diff --git a/arch/arm/plat-mxc/devices/platform-imx_srtc.c b/arch/arm/plat-mxc/devices/platform-imx_srtc.c
5012old mode 100755
5013new mode 100644
5014diff --git a/arch/arm/plat-mxc/devices/platform-imx_tve.c b/arch/arm/plat-mxc/devices/platform-imx_tve.c
5015old mode 100755
5016new mode 100644
5017diff --git a/arch/arm/plat-mxc/devices/platform-imx_vpu.c b/arch/arm/plat-mxc/devices/platform-imx_vpu.c
5018old mode 100755
5019new mode 100644
5020diff --git a/arch/arm/plat-mxc/devices/platform-mxc_gpu.c b/arch/arm/plat-mxc/devices/platform-mxc_gpu.c
5021old mode 100755
5022new mode 100644
5023diff --git a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
5024old mode 100755
5025new mode 100644
5026diff --git a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c b/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
5027old mode 100755
5028new mode 100644
5029diff --git a/arch/arm/plat-mxc/dvfs_core.c b/arch/arm/plat-mxc/dvfs_core.c
5030old mode 100755
5031new mode 100644
5032diff --git a/arch/arm/plat-mxc/dvfs_per.c b/arch/arm/plat-mxc/dvfs_per.c
5033old mode 100755
5034new mode 100644
5035diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
5036old mode 100755
5037new mode 100644
5038diff --git a/arch/arm/plat-mxc/include/mach/ahci_sata.h b/arch/arm/plat-mxc/include/mach/ahci_sata.h
5039old mode 100755
5040new mode 100644
5041diff --git a/arch/arm/plat-mxc/include/mach/arc_otg.h b/arch/arm/plat-mxc/include/mach/arc_otg.h
5042old mode 100755
5043new mode 100644
5044diff --git a/arch/arm/plat-mxc/include/mach/clock.h b/arch/arm/plat-mxc/include/mach/clock.h
5045old mode 100755
5046new mode 100644
5047diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
5048old mode 100755
5049new mode 100644
5050diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h
5051old mode 100755
5052new mode 100644
5053diff --git a/arch/arm/plat-mxc/include/mach/dvfs_dptc_struct.h b/arch/arm/plat-mxc/include/mach/dvfs_dptc_struct.h
5054old mode 100755
5055new mode 100644
5056diff --git a/arch/arm/plat-mxc/include/mach/esdhc.h b/arch/arm/plat-mxc/include/mach/esdhc.h
5057index bb15db1..294e4cd 100644
5058--- a/arch/arm/plat-mxc/include/mach/esdhc.h
5059+++ b/arch/arm/plat-mxc/include/mach/esdhc.h
5060@@ -34,6 +34,7 @@ struct esdhc_platform_data {
5061 unsigned int support_18v;
5062 unsigned int support_8bit;
5063 unsigned int keep_power_at_suspend;
5064+ unsigned int caps;
5065 unsigned int delay_line;
5066 int (*platform_pad_change)(unsigned int index, int clock);
5067 };
5068diff --git a/arch/arm/plat-mxc/include/mach/fsl_usb.h b/arch/arm/plat-mxc/include/mach/fsl_usb.h
5069old mode 100755
5070new mode 100644
5071diff --git a/arch/arm/plat-mxc/include/mach/fsl_usb_gadget.h b/arch/arm/plat-mxc/include/mach/fsl_usb_gadget.h
5072old mode 100755
5073new mode 100644
5074diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
5075old mode 100755
5076new mode 100644
5077diff --git a/arch/arm/plat-mxc/include/mach/imx_rfkill.h b/arch/arm/plat-mxc/include/mach/imx_rfkill.h
5078old mode 100755
5079new mode 100644
5080diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h b/arch/arm/plat-mxc/include/mach/iomux-mx53.h
5081old mode 100755
5082new mode 100644
5083diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx6q.h b/arch/arm/plat-mxc/include/mach/iomux-mx6q.h
5084index cdff320..4519d23 100644
5085--- a/arch/arm/plat-mxc/include/mach/iomux-mx6q.h
5086+++ b/arch/arm/plat-mxc/include/mach/iomux-mx6q.h
5087@@ -2913,6 +2913,24 @@
5088 #define _MX6Q_PAD_TEST_MODE__TCU_TEST_MODE \
5089 IOMUX_PAD(NO_PAD_I, NO_MUX_I, 0, 0x0000, 0, 0)
5090
5091+#define _MX6Q_PAD_SD2_CMD__USDHC3_CMD \
5092+ IOMUX_PAD(0x06A0, 0x02B8, 0 | IOMUX_CONFIG_SION, 0x0000, 0, 0)
5093+
5094+#define _MX6Q_PAD_SD2_CLK__USDHC3_CLK \
5095+ IOMUX_PAD(0x06A4, 0x02BC, 0, 0x0000, 0, 0)
5096+
5097+#define _MX6Q_PAD_SD2_DAT0__USDHC3_DAT0 \
5098+ IOMUX_PAD(0x06A8, 0x02C0, 0, 0x0000, 0, 0)
5099+
5100+#define _MX6Q_PAD_SD2_DAT1__USDHC3_DAT1 \
5101+ IOMUX_PAD(0x06AC, 0x02C4, 0, 0x0000, 0, 0)
5102+
5103+#define _MX6Q_PAD_SD2_DAT2__USDHC3_DAT2 \
5104+ IOMUX_PAD(0x06B0, 0x02C8, 0, 0x0000, 0, 0)
5105+
5106+#define _MX6Q_PAD_SD2_DAT3__USDHC3_DAT3 \
5107+ IOMUX_PAD(0x06B4, 0x02CC, 0, 0x0000, 0, 0)
5108+
5109 #define _MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 \
5110 IOMUX_PAD(0x0690, 0x02A8, 0, 0x0000, 0, 0)
5111 #define _MX6Q_PAD_SD3_DAT7__UART1_TXD \
5112@@ -6521,6 +6539,48 @@
5113 #define MX6Q_PAD_TEST_MODE__TCU_TEST_MODE \
5114 (_MX6Q_PAD_TEST_MODE__TCU_TEST_MODE | MUX_PAD_CTRL(NO_PAD_CTRL))
5115
5116+#define MX6Q_PAD_SD2_CMD__USDHC2_CMD_50MHZ \
5117+ (_MX6Q_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL))
5118+#define MX6Q_PAD_SD2_CMD__USDHC2_CMD_100MHZ \
5119+ (_MX6Q_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_100MHZ))
5120+#define MX6Q_PAD_SD2_CMD__USDHC2_CMD_200MHZ \
5121+ (_MX6Q_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_200MHZ))
5122+
5123+#define MX6Q_PAD_SD2_CLK__USDHC2_CLK_50MHZ \
5124+ (_MX6Q_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL))
5125+#define MX6Q_PAD_SD2_CLK__USDHC2_CLK_100MHZ \
5126+ (_MX6Q_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_100MHZ))
5127+#define MX6Q_PAD_SD2_CLK__USDHC2_CLK_200MHZ \
5128+ (_MX6Q_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_200MHZ))
5129+
5130+#define MX6Q_PAD_SD2_DAT0__USDHC2_DAT0_50MHZ \
5131+ (_MX6Q_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL))
5132+#define MX6Q_PAD_SD2_DAT0__USDHC2_DAT0_100MHZ \
5133+ (_MX6Q_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_100MHZ))
5134+#define MX6Q_PAD_SD2_DAT0__USDHC2_DAT0_200MHZ \
5135+ (_MX6Q_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_200MHZ))
5136+
5137+#define MX6Q_PAD_SD2_DAT1__USDHC2_DAT1_50MHZ \
5138+ (_MX6Q_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL))
5139+#define MX6Q_PAD_SD2_DAT1__USDHC2_DAT1_100MHZ \
5140+ (_MX6Q_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_100MHZ))
5141+#define MX6Q_PAD_SD2_DAT1__USDHC2_DAT1_200MHZ \
5142+ (_MX6Q_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_200MHZ))
5143+
5144+#define MX6Q_PAD_SD2_DAT2__USDHC2_DAT2_50MHZ \
5145+ (_MX6Q_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL))
5146+#define MX6Q_PAD_SD2_DAT2__USDHC2_DAT2_100MHZ \
5147+ (_MX6Q_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_100MHZ))
5148+#define MX6Q_PAD_SD2_DAT2__USDHC2_DAT2_200MHZ \
5149+ (_MX6Q_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_200MHZ))
5150+
5151+#define MX6Q_PAD_SD2_DAT3__USDHC2_DAT3_50MHZ \
5152+ (_MX6Q_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL))
5153+#define MX6Q_PAD_SD2_DAT3__USDHC2_DAT3_100MHZ \
5154+ (_MX6Q_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_100MHZ))
5155+#define MX6Q_PAD_SD2_DAT3__USDHC2_DAT3_200MHZ \
5156+ (_MX6Q_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL_200MHZ))
5157+
5158 #define MX6Q_PAD_SD3_DAT7__USDHC3_DAT7_50MHZ \
5159 (_MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 | MUX_PAD_CTRL(MX6Q_USDHC_PAD_CTRL))
5160 #define MX6Q_PAD_SD3_DAT7__USDHC3_DAT7_100MHZ \
5161diff --git a/arch/arm/plat-mxc/include/mach/ipu-v3.h b/arch/arm/plat-mxc/include/mach/ipu-v3.h
5162old mode 100755
5163new mode 100644
5164diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h
5165old mode 100755
5166new mode 100644
5167diff --git a/arch/arm/plat-mxc/include/mach/mx50.h b/arch/arm/plat-mxc/include/mach/mx50.h
5168old mode 100755
5169new mode 100644
5170diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h
5171old mode 100755
5172new mode 100644
5173diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h
5174old mode 100755
5175new mode 100644
5176diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
5177old mode 100755
5178new mode 100644
5179diff --git a/arch/arm/plat-mxc/include/mach/mxc91231.h b/arch/arm/plat-mxc/include/mach/mxc91231.h
5180old mode 100755
5181new mode 100644
5182diff --git a/arch/arm/plat-mxc/include/mach/mxc_dvfs.h b/arch/arm/plat-mxc/include/mach/mxc_dvfs.h
5183old mode 100755
5184new mode 100644
5185diff --git a/arch/arm/plat-mxc/include/mach/mxc_edid.h b/arch/arm/plat-mxc/include/mach/mxc_edid.h
5186old mode 100755
5187new mode 100644
5188diff --git a/arch/arm/plat-mxc/include/mach/mxc_vpu.h b/arch/arm/plat-mxc/include/mach/mxc_vpu.h
5189old mode 100755
5190new mode 100644
5191diff --git a/arch/arm/plat-mxc/include/mach/sdram_autogating.h b/arch/arm/plat-mxc/include/mach/sdram_autogating.h
5192old mode 100755
5193new mode 100644
5194diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
5195old mode 100755
5196new mode 100644
5197diff --git a/arch/arm/plat-mxc/isp1504xc.c b/arch/arm/plat-mxc/isp1504xc.c
5198old mode 100755
5199new mode 100644
5200diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
5201old mode 100755
5202new mode 100644
5203diff --git a/arch/arm/plat-mxc/serialxc.c b/arch/arm/plat-mxc/serialxc.c
5204old mode 100755
5205new mode 100644
5206diff --git a/arch/arm/plat-mxc/usb_common.c b/arch/arm/plat-mxc/usb_common.c
5207old mode 100755
5208new mode 100644
5209diff --git a/arch/arm/plat-mxc/usb_wakeup.c b/arch/arm/plat-mxc/usb_wakeup.c
5210old mode 100755
5211new mode 100644
5212diff --git a/arch/arm/plat-mxc/utmixc.c b/arch/arm/plat-mxc/utmixc.c
5213old mode 100755
5214new mode 100644
5215diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
5216old mode 100755
5217new mode 100644
5218diff --git a/drivers/char/fsl_otp.c b/drivers/char/fsl_otp.c
5219old mode 100755
5220new mode 100644
5221diff --git a/drivers/char/fsl_otp.h b/drivers/char/fsl_otp.h
5222old mode 100755
5223new mode 100644
5224diff --git a/drivers/char/regs-ocotp-v2.h b/drivers/char/regs-ocotp-v2.h
5225old mode 100755
5226new mode 100644
5227diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
5228old mode 100755
5229new mode 100644
5230diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
5231old mode 100755
5232new mode 100644
5233diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
5234old mode 100755
5235new mode 100644
5236diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
5237old mode 100755
5238new mode 100644
5239diff --git a/drivers/hwmon/da9052-adc.c b/drivers/hwmon/da9052-adc.c
5240old mode 100755
5241new mode 100644
5242diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
5243old mode 100755
5244new mode 100644
5245diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile
5246old mode 100755
5247new mode 100644
5248diff --git a/drivers/input/misc/isl29023.c b/drivers/input/misc/isl29023.c
5249old mode 100755
5250new mode 100644
5251diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
5252old mode 100755
5253new mode 100644
5254index 3420cdb..311bd4d
5255--- a/drivers/input/touchscreen/Kconfig
5256+++ b/drivers/input/touchscreen/Kconfig
5257@@ -292,6 +292,22 @@ config TOUCHSCREEN_MAX11801
5258 To compile this driver as a module, choose M here: the
5259 module will be called max11801_ts.
5260
5261+config TOUCHSCREEN_FT5X06
5262+ tristate "Focaltech FT5X06 5 point touchscreen"
5263+ select I2C
5264+ help
5265+ If you say yes here you get touchscreen support through
5266+ FocalTech's FT5X06 controller.
5267+
5268+config TOUCHSCREEN_FT5X06_SINGLE_TOUCH
5269+ bool "FT5X06 touchscreen as single-touch"
5270+ default N
5271+ depends on TOUCHSCREEN_FT5X06
5272+ help
5273+ If you say yes here you get single-touch touchscreen support
5274+ on the FT5X06 I2C controller.
5275+ If you say "no", you'll get the normal 5-finger goodness.
5276+
5277 config TOUCHSCREEN_MCS5000
5278 tristate "MELFAS MCS-5000 touchscreen"
5279 depends on I2C
5280@@ -718,6 +734,17 @@ config TOUCHSCREEN_TSC2007
5281 To compile this driver as a module, choose M here: the
5282 module will be called tsc2007.
5283
5284+config TOUCHSCREEN_TSC2004
5285+ tristate "TSC2004 based touchscreens"
5286+ depends on I2C
5287+ help
5288+ Say Y here if you have a TSC2004 based touchscreen.
5289+
5290+ If unsure, say N.
5291+
5292+ To compile this driver as a module, choose M here: the
5293+ module will be called tsc2004.
5294+
5295 config TOUCHSCREEN_W90X900
5296 tristate "W90P910 touchscreen driver"
5297 depends on HAVE_CLK
5298diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
5299old mode 100755
5300new mode 100644
5301index 94a71c1..e8104ce
5302--- a/drivers/input/touchscreen/Makefile
5303+++ b/drivers/input/touchscreen/Makefile
5304@@ -49,6 +49,7 @@ obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT) += touchright.o
5305 obj-$(CONFIG_TOUCHSCREEN_TOUCHWIN) += touchwin.o
5306 obj-$(CONFIG_TOUCHSCREEN_TSC2005) += tsc2005.o
5307 obj-$(CONFIG_TOUCHSCREEN_TSC2007) += tsc2007.o
5308+obj-$(CONFIG_TOUCHSCREEN_TSC2004) += tsc2004.o
5309 obj-$(CONFIG_TOUCHSCREEN_UCB1400) += ucb1400_ts.o
5310 obj-$(CONFIG_TOUCHSCREEN_WACOM_W8001) += wacom_w8001.o
5311 obj-$(CONFIG_TOUCHSCREEN_WM831X) += wm831x-ts.o
5312@@ -65,4 +66,5 @@ obj-$(CONFIG_TOUCHSCREEN_TPS6507X) += tps6507x-ts.o
5313 obj-$(CONFIG_TOUCHSCREEN_MAX11801) += max11801_ts.o
5314 obj-$(CONFIG_TOUCHSCREEN_NOVATEK) += novatek_ts.o
5315 obj-$(CONFIG_TOUCHSCREEN_EGALAX) += egalax_ts.o
5316+obj-$(CONFIG_TOUCHSCREEN_FT5X06) += ft5x06_ts.o
5317 obj-$(CONFIG_TOUCHSCREEN_ELAN) += elan_ts.o
5318diff --git a/drivers/input/touchscreen/da9052_tsi_filter.c b/drivers/input/touchscreen/da9052_tsi_filter.c
5319old mode 100755
5320new mode 100644
5321diff --git a/drivers/input/touchscreen/ft5x06_ts.c b/drivers/input/touchscreen/ft5x06_ts.c
5322new file mode 100644
5323index 0000000..89b5726
5324--- /dev/null
5325+++ b/drivers/input/touchscreen/ft5x06_ts.c
5326@@ -0,0 +1,572 @@
5327+/*
5328+ * Boundary Devices FTx06 touch screen controller.
5329+ *
5330+ * Copyright (c) by Boundary Devices <info@boundarydevices.com>
5331+ *
5332+ * This program is free software; you can redistribute it and/or modify
5333+ * it under the terms of the GNU General Public License as published by
5334+ * the Free Software Foundation; either version 2 of the License, or
5335+ * (at your option) any later version.
5336+ *
5337+ * This program is distributed in the hope that it will be useful,
5338+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
5339+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5340+ * GNU General Public License for more details.
5341+ *
5342+ * You should have received a copy of the GNU General Public License
5343+ * along with this program; if not, write to the Free Software
5344+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
5345+ *
5346+ */
5347+#include <linux/module.h>
5348+#include <linux/init.h>
5349+#include <linux/i2c.h>
5350+#include <linux/slab.h>
5351+#include <linux/interrupt.h>
5352+#include <linux/wait.h>
5353+#include <linux/io.h>
5354+#include <mach/hardware.h>
5355+#include <mach/gpio.h>
5356+#include <linux/proc_fs.h>
5357+#include <linux/delay.h>
5358+#include <linux/input.h>
5359+
5360+#ifdef CONFIG_TOUCHSCREEN_FT5X06_SINGLE_TOUCH
5361+#else
5362+#define USE_ABS_MT
5363+#endif
5364+
5365+struct point {
5366+ int x;
5367+ int y;
5368+};
5369+
5370+struct ft5x06_ts {
5371+ struct i2c_client *client;
5372+ struct input_dev *idev;
5373+ wait_queue_head_t sample_waitq;
5374+ struct semaphore sem;
5375+ struct completion init_exit;
5376+ struct task_struct *rtask;
5377+ int use_count;
5378+ int bReady;
5379+ int irq;
5380+ unsigned gp;
5381+ struct proc_dir_entry *procentry;
5382+};
5383+static const char *client_name = "ft5x06";
5384+
5385+struct ft5x06_ts *gts;
5386+
5387+static char const procentryname[] = {
5388+ "ft5x06"
5389+};
5390+
5391+static int ts_startup(struct ft5x06_ts *ts);
5392+static void ts_shutdown(struct ft5x06_ts *ts);
5393+
5394+static int ft5x06_proc_read
5395+ (char *page,
5396+ char **start,
5397+ off_t off,
5398+ int count,
5399+ int *eof,
5400+ void *data)
5401+{
5402+ printk(KERN_ERR "%s\n", __func__);
5403+ return 0 ;
5404+}
5405+
5406+static int
5407+ft5x06_proc_write
5408+ (struct file *file,
5409+ const char __user *buffer,
5410+ unsigned long count,
5411+ void *data)
5412+{
5413+ printk(KERN_ERR "%s\n", __func__);
5414+ return count ;
5415+}
5416+
5417+/*-----------------------------------------------------------------------*/
5418+static inline void ts_evt_add(struct ft5x06_ts *ts,
5419+ unsigned buttons, struct point *p)
5420+{
5421+ struct input_dev *idev = ts->idev;
5422+ int i;
5423+ if (!buttons) {
5424+ /* send release to user space. */
5425+#ifdef USE_ABS_MT
5426+ input_event(idev, EV_ABS, ABS_MT_TOUCH_MAJOR, 0);
5427+ input_event(idev, EV_KEY, BTN_TOUCH, 0);
5428+ input_mt_sync(idev);
5429+#else
5430+ input_report_abs(idev, ABS_PRESSURE, 0);
5431+ input_report_key(idev, BTN_TOUCH, 0);
5432+ input_sync(idev);
5433+#endif
5434+ } else {
5435+ for (i = 0; i < buttons; i++) {
5436+#ifdef USE_ABS_MT
5437+ input_event(idev, EV_ABS, ABS_MT_POSITION_X, p[i].x);
5438+ input_event(idev, EV_ABS, ABS_MT_POSITION_Y, p[i].y);
5439+ input_event(idev, EV_ABS, ABS_MT_TOUCH_MAJOR, 1);
5440+ input_mt_sync(idev);
5441+#else
5442+ input_report_abs(idev, ABS_X, p[i].x);
5443+ input_report_abs(idev, ABS_Y, p[i].y);
5444+ input_report_abs(idev, ABS_PRESSURE, 1);
5445+ input_report_key(idev, BTN_TOUCH, 1);
5446+ input_sync(idev);
5447+#endif
5448+ }
5449+ input_event(idev, EV_KEY, BTN_TOUCH, 1);
5450+ }
5451+#ifdef USE_ABS_MT
5452+ input_sync(idev);
5453+#endif
5454+}
5455+
5456+static int ts_open(struct input_dev *idev)
5457+{
5458+ struct ft5x06_ts *ts = input_get_drvdata(idev);
5459+ return ts_startup(ts);
5460+}
5461+
5462+static void ts_close(struct input_dev *idev)
5463+{
5464+ struct ft5x06_ts *ts = input_get_drvdata(idev);
5465+ ts_shutdown(ts);
5466+}
5467+
5468+static inline int ts_register(struct ft5x06_ts *ts)
5469+{
5470+ struct input_dev *idev;
5471+ idev = input_allocate_device();
5472+ if (idev == NULL)
5473+ return -ENOMEM;
5474+
5475+ ts->idev = idev;
5476+ idev->name = procentryname ;
5477+ idev->id.product = ts->client->addr;
5478+ idev->open = ts_open;
5479+ idev->close = ts_close;
5480+
5481+ __set_bit(EV_ABS, idev->evbit);
5482+ __set_bit(EV_KEY, idev->evbit);
5483+ __set_bit(BTN_TOUCH, idev->keybit);
5484+
5485+#ifdef USE_ABS_MT
5486+ input_set_abs_params(idev, ABS_MT_POSITION_X, 0, 1023, 0, 0);
5487+ input_set_abs_params(idev, ABS_MT_POSITION_Y, 0, 0x255, 0, 0);
5488+ input_set_abs_params(idev, ABS_MT_TOUCH_MAJOR, 0, 1, 0, 0);
5489+#else
5490+ __set_bit(EV_SYN, idev->evbit);
5491+ input_set_abs_params(idev, ABS_X, 0, 1023, 0, 0);
5492+ input_set_abs_params(idev, ABS_Y, 0, 0x255, 0, 0);
5493+ input_set_abs_params(idev, ABS_PRESSURE, 0, 1, 0, 0);
5494+#endif
5495+
5496+ input_set_drvdata(idev, ts);
5497+ return input_register_device(idev);
5498+}
5499+
5500+static inline void ts_deregister(struct ft5x06_ts *ts)
5501+{
5502+ if (ts->idev) {
5503+ input_unregister_device(ts->idev);
5504+ input_free_device(ts->idev);
5505+ ts->idev = NULL;
5506+ }
5507+}
5508+
5509+#ifdef DEBUG
5510+static void printHex(u8 const *buf, unsigned len)
5511+{
5512+ char hex[512];
5513+ char *next = hex ;
5514+ char *end = hex+sizeof(hex);
5515+
5516+ while (len--) {
5517+ next += snprintf(next, end-next, "%02x", *buf++);
5518+ if (next >= end) {
5519+ hex[sizeof(hex)-1] = '\0' ;
5520+ break;
5521+ }
5522+ }
5523+ printk(KERN_ERR "%s\n", hex);
5524+}
5525+#endif
5526+
5527+static void write_reg(struct ft5x06_ts *ts, int regnum, int value)
5528+{
5529+ u8 regnval[] = {
5530+ regnum,
5531+ value
5532+ };
5533+ struct i2c_msg pkt = {
5534+ ts->client->addr, 0, sizeof(regnval), regnval
5535+ };
5536+ int ret = i2c_transfer(ts->client->adapter, &pkt, 1);
5537+ if (ret != 1)
5538+ printk(KERN_WARNING "%s: i2c_transfer failed\n", __func__);
5539+ else
5540+ printk(KERN_DEBUG "%s: set register 0x%02x to 0x%02x\n",
5541+ __func__, regnum, value);
5542+}
5543+
5544+static void set_mode(struct ft5x06_ts *ts, int mode)
5545+{
5546+ write_reg(ts, 0, (mode&7)<<4);
5547+ printk(KERN_DEBUG "%s: changed mode to 0x%02x\n", __func__, mode);
5548+}
5549+
5550+#define WORK_MODE 0
5551+#define FACTORY_MODE 4
5552+
5553+/*-----------------------------------------------------------------------*/
5554+
5555+/*
5556+ * This is a RT kernel thread that handles the I2c accesses
5557+ * The I2c access functions are expected to be able to sleep.
5558+ */
5559+static int ts_thread(void *_ts)
5560+{
5561+ int ret;
5562+ struct point points[5];
5563+ unsigned char buf[33];
5564+ struct ft5x06_ts *ts = _ts;
5565+ unsigned char startch[1] = { 0 };
5566+ struct i2c_msg readpkt[2] = {
5567+ {ts->client->addr, 0, 1, startch},
5568+ {ts->client->addr, I2C_M_RD, sizeof(buf), buf}
5569+ };
5570+
5571+ struct task_struct *tsk = current;
5572+
5573+ ts->rtask = tsk;
5574+
5575+ daemonize("ft5x06tsd");
5576+ /* only want to receive SIGKILL */
5577+ allow_signal(SIGKILL);
5578+
5579+ complete(&ts->init_exit);
5580+
5581+ do {
5582+ int buttons = 0 ;
5583+ ts->bReady = 0;
5584+ ret = i2c_transfer(ts->client->adapter, readpkt,
5585+ ARRAY_SIZE(readpkt));
5586+ if (ret != ARRAY_SIZE(readpkt)) {
5587+ printk(KERN_WARNING "%s: i2c_transfer failed\n",
5588+ client_name);
5589+ msleep(1000);
5590+ } else {
5591+ int i;
5592+ unsigned char *p = buf+3;
5593+#ifdef DEBUG
5594+ printHex(buf, sizeof(buf));
5595+#endif
5596+ buttons = buf[2];
5597+ if (buttons > 5) {
5598+ printk(KERN_ERR
5599+ "%s: invalid button count %02x\n",
5600+ __func__, buttons);
5601+ buttons = 0 ;
5602+ } else {
5603+ for (i = 0; i < buttons; i++) {
5604+ points[i].x = ((p[0] << 8)
5605+ | p[1]) & 0x7ff;
5606+ points[i].y = ((p[2] << 8)
5607+ | p[3]) & 0x7ff;
5608+ p += 6;
5609+ }
5610+ }
5611+ }
5612+
5613+ if (signal_pending(tsk))
5614+ break;
5615+#ifdef DEBUG
5616+ printk(KERN_ERR "%s: buttons = %d, "
5617+ "points[0].x = %d, "
5618+ "points[0].y = %d\n",
5619+ client_name, buttons, points[0].x, points[0].y);
5620+#endif
5621+ ts_evt_add(ts, buttons, points);
5622+ if (0 < buttons)
5623+ wait_event_interruptible_timeout(ts->sample_waitq,
5624+ ts->bReady, HZ/20);
5625+ else
5626+ wait_event_interruptible(ts->sample_waitq, ts->bReady);
5627+ if (gpio_get_value(ts->gp)) {
5628+ if (buttons) {
5629+ buttons = 0;
5630+ ts_evt_add(ts, buttons, points);
5631+ }
5632+ if (signal_pending(tsk))
5633+ break;
5634+ }
5635+ } while (1);
5636+
5637+ ts->rtask = NULL;
5638+ complete_and_exit(&ts->init_exit, 0);
5639+}
5640+
5641+/*
5642+ * We only detect samples ready with this interrupt
5643+ * handler, and even then we just schedule our task.
5644+ */
5645+static irqreturn_t ts_interrupt(int irq, void *id)
5646+{
5647+ struct ft5x06_ts *ts = id;
5648+ int bit = gpio_get_value(ts->gp);
5649+ if (bit == 0) {
5650+ ts->bReady = 1;
5651+ wmb(); /* flush bReady */
5652+ wake_up(&ts->sample_waitq);
5653+ }
5654+ return IRQ_HANDLED;
5655+}
5656+
5657+#define ID_G_THGROUP 0x80
5658+#define ID_G_PERIODMONITOR 0x89
5659+#define FT5X0X_REG_HEIGHT_B 0x8a
5660+#define FT5X0X_REG_MAX_FRAME 0x8b
5661+#define FT5X0X_REG_FEG_FRAME 0x8e
5662+#define FT5X0X_REG_LEFT_RIGHT_OFFSET 0x92
5663+#define FT5X0X_REG_UP_DOWN_OFFSET 0x93
5664+#define FT5X0X_REG_DISTANCE_LEFT_RIGHT 0x94
5665+#define FT5X0X_REG_DISTANCE_UP_DOWN 0x95
5666+#define FT5X0X_REG_MAX_X_HIGH 0x98
5667+#define FT5X0X_REG_MAX_X_LOW 0x99
5668+#define FT5X0X_REG_MAX_Y_HIGH 0x9a
5669+#define FT5X0X_REG_MAX_Y_LOW 0x9b
5670+#define FT5X0X_REG_K_X_HIGH 0x9c
5671+#define FT5X0X_REG_K_X_LOW 0x9d
5672+#define FT5X0X_REG_K_Y_HIGH 0x9e
5673+#define FT5X0X_REG_K_Y_LOW 0x9f
5674+
5675+#define ID_G_AUTO_CLB 0xa0
5676+#define ID_G_B_AREA_TH 0xae
5677+
5678+#ifdef DEBUG
5679+static void dumpRegs(struct ft5x06_ts *ts, unsigned start, unsigned end)
5680+{
5681+ u8 regbuf[512];
5682+ unsigned char startch[1] = { start };
5683+ int ret ;
5684+ struct i2c_msg readpkt[2] = {
5685+ {ts->client->addr, 0, 1, startch},
5686+ {ts->client->addr, I2C_M_RD, end-start+1, regbuf}
5687+ };
5688+ ret = i2c_transfer(ts->client->adapter, readpkt, ARRAY_SIZE(readpkt));
5689+ if (ret != ARRAY_SIZE(readpkt)) {
5690+ printk(KERN_WARNING "%s: i2c_transfer failed\n", client_name);
5691+ } else {
5692+ printk(KERN_ERR "registers %02x..%02x\n", start, end);
5693+ printHex(regbuf, end-start+1);
5694+ }
5695+}
5696+#endif
5697+
5698+static int ts_startup(struct ft5x06_ts *ts)
5699+{
5700+ int ret = 0;
5701+ if (ts == NULL)
5702+ return -EIO;
5703+
5704+ if (down_interruptible(&ts->sem))
5705+ return -EINTR;
5706+
5707+ if (ts->use_count++ != 0)
5708+ goto out;
5709+
5710+ if (ts->rtask)
5711+ panic("ft5x06tsd: rtask running?");
5712+
5713+ ret = request_irq(ts->irq, &ts_interrupt, IRQF_TRIGGER_FALLING,
5714+ client_name, ts);
5715+ if (ret) {
5716+ printk(KERN_ERR "%s: request_irq failed, irq:%i\n",
5717+ client_name, ts->irq);
5718+ goto out;
5719+ }
5720+
5721+#ifdef DEBUG
5722+ set_mode(ts, FACTORY_MODE);
5723+ dumpRegs(ts, 0x4c, 0x4C);
5724+ write_reg(ts, 0x4C, 0x05);
5725+ dumpRegs(ts, 0, 0x4C);
5726+#endif
5727+ set_mode(ts, WORK_MODE);
5728+#ifdef DEBUG
5729+ dumpRegs(ts, 0x3b, 0x3b);
5730+ dumpRegs(ts, 0x6a, 0x6a);
5731+ dumpRegs(ts, ID_G_THGROUP, ID_G_PERIODMONITOR);
5732+ dumpRegs(ts, FT5X0X_REG_HEIGHT_B, FT5X0X_REG_K_Y_LOW);
5733+ dumpRegs(ts, ID_G_AUTO_CLB, ID_G_B_AREA_TH);
5734+#endif
5735+ set_mode(ts, WORK_MODE);
5736+
5737+ init_completion(&ts->init_exit);
5738+ ret = kernel_thread(ts_thread, ts, CLONE_KERNEL);
5739+ if (ret >= 0) {
5740+ wait_for_completion(&ts->init_exit);
5741+ ret = 0;
5742+ } else {
5743+ free_irq(ts->irq, ts);
5744+ }
5745+
5746+ out:
5747+ if (ret)
5748+ ts->use_count--;
5749+ up(&ts->sem);
5750+ return ret;
5751+}
5752+
5753+/*
5754+ * Release touchscreen resources. Disable IRQs.
5755+ */
5756+static void ts_shutdown(struct ft5x06_ts *ts)
5757+{
5758+ if (ts) {
5759+ down(&ts->sem);
5760+ if (--ts->use_count == 0) {
5761+ if (ts->rtask) {
5762+ send_sig(SIGKILL, ts->rtask, 1);
5763+ wait_for_completion(&ts->init_exit);
5764+ }
5765+ free_irq(ts->irq, ts);
5766+ }
5767+ up(&ts->sem);
5768+ }
5769+}
5770+/*-----------------------------------------------------------------------*/
5771+
5772+/* Return 0 if detection is successful, -ENODEV otherwise */
5773+static int detect_ft5x06(struct i2c_client *client)
5774+{
5775+ struct i2c_adapter *adapter = client->adapter;
5776+ char buffer;
5777+ struct i2c_msg pkt = {
5778+ client->addr,
5779+ I2C_M_RD,
5780+ sizeof(buffer),
5781+ &buffer
5782+ };
5783+ if (!i2c_check_functionality(adapter, I2C_FUNC_I2C))
5784+ return -ENODEV;
5785+ if (i2c_transfer(adapter, &pkt, 1) != 1)
5786+ return -ENODEV;
5787+ return 0;
5788+}
5789+
5790+/* Return 0 if detection is successful, -ENODEV otherwise */
5791+static int ts_detect(struct i2c_client *client,
5792+ struct i2c_board_info *info)
5793+{
5794+ int err = detect_ft5x06(client);
5795+ if (!err)
5796+ strlcpy(info->type, "ft5x06-ts", I2C_NAME_SIZE);
5797+ return err;
5798+}
5799+
5800+static int ts_probe(struct i2c_client *client, const struct i2c_device_id *id)
5801+{
5802+ int err = 0;
5803+ struct ft5x06_ts *ts;
5804+ struct device *dev = &client->dev;
5805+ if (gts) {
5806+ printk(KERN_ERR "%s: Error gts is already allocated\n",
5807+ client_name);
5808+ return -ENOMEM;
5809+ }
5810+ if (detect_ft5x06(client) != 0) {
5811+ dev_err(dev, "%s: Could not detect touch screen.\n",
5812+ client_name);
5813+ return -ENODEV;
5814+ }
5815+ ts = kzalloc(sizeof(struct ft5x06_ts), GFP_KERNEL);
5816+ if (!ts) {
5817+ dev_err(dev, "Couldn't allocate memory for %s\n", client_name);
5818+ return -ENOMEM;
5819+ }
5820+ init_waitqueue_head(&ts->sample_waitq);
5821+ sema_init(&ts->sem, 1);
5822+ ts->client = client;
5823+ ts->irq = client->irq ;
5824+ ts->gp = irq_to_gpio(client->irq);
5825+ printk(KERN_INFO "%s: %s touchscreen irq=%i, gp=%i\n", __func__,
5826+ client_name, ts->irq, ts->gp);
5827+ i2c_set_clientdata(client, ts);
5828+ err = ts_register(ts);
5829+ if (err == 0) {
5830+ gts = ts;
5831+ ts->procentry = create_proc_entry(procentryname, 0, NULL);
5832+ if (ts->procentry) {
5833+ ts->procentry->read_proc = ft5x06_proc_read ;
5834+ ts->procentry->write_proc = ft5x06_proc_write ;
5835+ }
5836+ } else {
5837+ printk(KERN_WARNING "%s: ts_register failed\n", client_name);
5838+ ts_deregister(ts);
5839+ kfree(ts);
5840+ }
5841+ return err;
5842+}
5843+
5844+static int ts_remove(struct i2c_client *client)
5845+{
5846+ struct ft5x06_ts *ts = i2c_get_clientdata(client);
5847+ remove_proc_entry(procentryname, 0);
5848+ if (ts == gts) {
5849+ gts = NULL;
5850+ ts_deregister(ts);
5851+ } else {
5852+ printk(KERN_ERR "%s: Error ts!=gts\n", client_name);
5853+ }
5854+ kfree(ts);
5855+ return 0;
5856+}
5857+
5858+
5859+/*-----------------------------------------------------------------------*/
5860+
5861+static const struct i2c_device_id ts_idtable[] = {
5862+ { "ft5x06-ts", 0 },
5863+ { }
5864+};
5865+
5866+static struct i2c_driver ts_driver = {
5867+ .driver = {
5868+ .owner = THIS_MODULE,
5869+ .name = "ft5x06-ts",
5870+ },
5871+ .id_table = ts_idtable,
5872+ .probe = ts_probe,
5873+ .remove = __devexit_p(ts_remove),
5874+ .detect = ts_detect,
5875+};
5876+
5877+static int __init ts_init(void)
5878+{
5879+ int res = i2c_add_driver(&ts_driver);
5880+ if (res) {
5881+ printk(KERN_WARNING "%s: i2c_add_driver failed\n", client_name);
5882+ return res;
5883+ }
5884+ printk(KERN_INFO "%s: " __DATE__ "\n", client_name);
5885+ return 0;
5886+}
5887+
5888+static void __exit ts_exit(void)
5889+{
5890+ i2c_del_driver(&ts_driver);
5891+}
5892+
5893+MODULE_AUTHOR("Boundary Devices <info@boundarydevices.com>");
5894+MODULE_DESCRIPTION("I2C interface for FocalTech ft5x06 touch screen controller.");
5895+MODULE_LICENSE("GPL");
5896+
5897+module_init(ts_init)
5898+module_exit(ts_exit)
5899diff --git a/drivers/input/touchscreen/max11801_ts.c b/drivers/input/touchscreen/max11801_ts.c
5900old mode 100755
5901new mode 100644
5902diff --git a/drivers/input/touchscreen/tsc2004.c b/drivers/input/touchscreen/tsc2004.c
5903new file mode 100644
5904index 0000000..37af845
5905--- /dev/null
5906+++ b/drivers/input/touchscreen/tsc2004.c
5907@@ -0,0 +1,561 @@
5908+/*
5909+ * drivers/input/touchscreen/tsc2004.c
5910+ *
5911+ * Copyright (C) 2009 Texas Instruments Inc
5912+ * Author: Vaibhav Hiremath <hvaibhav@ti.com>
5913+ *
5914+ * Using code from:
5915+ * - tsc2007.c
5916+ *
5917+ * This package is free software; you can redistribute it and/or modify
5918+ * it under the terms of the GNU General Public License version 2 as
5919+ * published by the Free Software Foundation.
5920+ *
5921+ * This program is distributed in the hope that it will be useful,
5922+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
5923+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5924+ * GNU General Public License for more details.
5925+ *
5926+ * You should have received a copy of the GNU General Public License
5927+ * along with this program; if not, write to the Free Software
5928+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
5929+ *
5930+ */
5931+
5932+#include <linux/module.h>
5933+#include <linux/slab.h>
5934+#include <linux/input.h>
5935+#include <linux/interrupt.h>
5936+#include <linux/i2c.h>
5937+#include <linux/i2c/tsc2007.h>
5938+
5939+static int calibration[7];
5940+module_param_array(calibration, int, NULL, S_IRUGO | S_IWUSR);
5941+
5942+static void translate(u16 *px, u16 *py)
5943+{
5944+ int x, y, x1, y1;
5945+ if (calibration[6]) {
5946+ x1 = *px;
5947+ y1 = *py;
5948+
5949+ x = calibration[0] * x1 +
5950+ calibration[1] * y1 +
5951+ calibration[2];
5952+ x /= calibration[6];
5953+ if (x < 0)
5954+ x = 0;
5955+ y = calibration[3] * x1 +
5956+ calibration[4] * y1 +
5957+ calibration[5];
5958+ y /= calibration[6];
5959+ if (y < 0)
5960+ y = 0;
5961+ *px = x ;
5962+ *py = y ;
5963+ }
5964+}
5965+
5966+#define TS_POLL_DELAY 1 /* ms delay between samples */
5967+#define TS_POLL_PERIOD 1 /* ms delay between samples */
5968+
5969+/* Control byte 0 */
5970+#define TSC2004_CMD0(addr, pnd, rw) ((addr<<3)|(pnd<<1)|rw)
5971+/* Control byte 1 */
5972+#define TSC2004_CMD1(cmd, mode, rst) ((1<<7)|(cmd<<4)|(mode<<2)|(rst<<1))
5973+
5974+/* Command Bits */
5975+#define READ_REG 1
5976+#define WRITE_REG 0
5977+#define SWRST_TRUE 1
5978+#define SWRST_FALSE 0
5979+#define PND0_TRUE 1
5980+#define PND0_FALSE 0
5981+
5982+/* Converter function mapping */
5983+enum convertor_function {
5984+ MEAS_X_Y_Z1_Z2, /* Measure X,Y,z1 and Z2: 0x0 */
5985+ MEAS_X_Y, /* Measure X and Y only: 0x1 */
5986+ MEAS_X, /* Measure X only: 0x2 */
5987+ MEAS_Y, /* Measure Y only: 0x3 */
5988+ MEAS_Z1_Z2, /* Measure Z1 and Z2 only: 0x4 */
5989+ MEAS_AUX, /* Measure Auxillary input: 0x5 */
5990+ MEAS_TEMP1, /* Measure Temparature1: 0x6 */
5991+ MEAS_TEMP2, /* Measure Temparature2: 0x7 */
5992+ MEAS_AUX_CONT, /* Continuously measure Auxillary input: 0x8 */
5993+ X_DRV_TEST, /* X-Axis drivers tested 0x9 */
5994+ Y_DRV_TEST, /* Y-Axis drivers tested 0xA */
5995+ /*Command Reserved*/
5996+ SHORT_CKT_TST = 0xC, /* Short circuit test: 0xC */
5997+ XP_XN_DRV_STAT, /* X+,Y- drivers status: 0xD */
5998+ YP_YN_DRV_STAT, /* X+,Y- drivers status: 0xE */
5999+ YP_XN_DRV_STAT /* Y+,X- drivers status: 0xF */
6000+};
6001+
6002+/* Register address mapping */
6003+enum register_address {
6004+ X_REG, /* X register: 0x0 */
6005+ Y_REG, /* Y register: 0x1 */
6006+ Z1_REG, /* Z1 register: 0x2 */
6007+ Z2_REG, /* Z2 register: 0x3 */
6008+ AUX_REG, /* AUX register: 0x4 */
6009+ TEMP1_REG, /* Temp1 register: 0x5 */
6010+ TEMP2_REG, /* Temp2 register: 0x6 */
6011+ STAT_REG, /* Status Register: 0x7 */
6012+ AUX_HGH_TH_REG, /* AUX high threshold register: 0x8 */
6013+ AUX_LOW_TH_REG, /* AUX low threshold register: 0x9 */
6014+ TMP_HGH_TH_REG, /* Temp high threshold register:0xA */
6015+ TMP_LOW_TH_REG, /* Temp low threshold register: 0xB */
6016+ CFR0_REG, /* Configuration register 0: 0xC */
6017+ CFR1_REG, /* Configuration register 1: 0xD */
6018+ CFR2_REG, /* Configuration register 2: 0xE */
6019+ CONV_FN_SEL_STAT /* Convertor function select register: 0xF */
6020+};
6021+
6022+/* Supported Resolution modes */
6023+enum resolution_mode {
6024+ MODE_10BIT, /* 10 bit resolution */
6025+ MODE_12BIT /* 12 bit resolution */
6026+};
6027+
6028+/* Configuraton register bit fields */
6029+/* CFR0 */
6030+#define PEN_STS_CTRL_MODE (1<<15)
6031+#define ADC_STS (1<<14)
6032+#define RES_CTRL (1<<13)
6033+#define ADC_CLK_4MHZ (0<<11)
6034+#define ADC_CLK_2MHZ (1<<11)
6035+#define ADC_CLK_1MHZ (2<<11)
6036+#define PANEL_VLTG_STB_TIME_0US (0<<8)
6037+#define PANEL_VLTG_STB_TIME_100US (1<<8)
6038+#define PANEL_VLTG_STB_TIME_500US (2<<8)
6039+#define PANEL_VLTG_STB_TIME_1MS (3<<8)
6040+#define PANEL_VLTG_STB_TIME_5MS (4<<8)
6041+#define PANEL_VLTG_STB_TIME_10MS (5<<8)
6042+#define PANEL_VLTG_STB_TIME_50MS (6<<8)
6043+#define PANEL_VLTG_STB_TIME_100MS (7<<8)
6044+
6045+/* CFR2 */
6046+#define PINTS1 (1<<15)
6047+#define PINTS0 (1<<14)
6048+#define MEDIAN_VAL_FLTR_SIZE_1 (0<<12)
6049+#define MEDIAN_VAL_FLTR_SIZE_3 (1<<12)
6050+#define MEDIAN_VAL_FLTR_SIZE_7 (2<<12)
6051+#define MEDIAN_VAL_FLTR_SIZE_15 (3<<12)
6052+#define AVRG_VAL_FLTR_SIZE_1 (0<<10)
6053+#define AVRG_VAL_FLTR_SIZE_3_4 (1<<10)
6054+#define AVRG_VAL_FLTR_SIZE_7_8 (2<<10)
6055+#define AVRG_VAL_FLTR_SIZE_16 (3<<10)
6056+#define MAV_FLTR_EN_X (1<<4)
6057+#define MAV_FLTR_EN_Y (1<<3)
6058+#define MAV_FLTR_EN_Z (1<<2)
6059+
6060+#define MAX_12BIT ((1 << 12) - 1)
6061+#define MEAS_MASK 0xFFF
6062+
6063+struct ts_event {
6064+ u16 x;
6065+ u16 y;
6066+ u16 z1, z2;
6067+};
6068+
6069+struct tsc2004 {
6070+ struct input_dev *input;
6071+ char phys[32];
6072+ struct delayed_work work;
6073+
6074+ struct i2c_client *client;
6075+
6076+ u16 model;
6077+ u16 x_plate_ohms;
6078+
6079+ bool pendown;
6080+ int irq;
6081+
6082+ int (*get_pendown_state)(void);
6083+ void (*clear_penirq)(void);
6084+};
6085+
6086+static inline int tsc2004_read_xyz_data(struct tsc2004 *tsc, u8 cmd)
6087+{
6088+ s32 data;
6089+ u16 val;
6090+
6091+ data = i2c_smbus_read_word_data(tsc->client, cmd);
6092+ if (data < 0) {
6093+ dev_err(&tsc->client->dev, "i2c io (read) error: %d\n", data);
6094+ return data;
6095+ }
6096+
6097+ /*
6098+ * We need to swap byte order for little-endian cpus.
6099+ * 12 bit precision, high 4 bits should be zero
6100+ */
6101+ val = be16_to_cpu(data) & 0xfff;
6102+
6103+ dev_dbg(&tsc->client->dev, "data: 0x%x, val: 0x%x\n", data, val);
6104+
6105+ return val;
6106+}
6107+
6108+static inline int tsc2004_write_word_data(struct tsc2004 *tsc, u8 cmd, u16 data)
6109+{
6110+ u16 val;
6111+
6112+ val = cpu_to_be16(data);
6113+ return i2c_smbus_write_word_data(tsc->client, cmd, val);
6114+}
6115+
6116+static inline int tsc2004_write_cmd(struct tsc2004 *tsc, u8 value)
6117+{
6118+ return i2c_smbus_write_byte(tsc->client, value);
6119+}
6120+
6121+static int tsc2004_prepare_for_reading(struct tsc2004 *ts)
6122+{
6123+ int err;
6124+ int cmd, data;
6125+ int retries ;
6126+
6127+ /* Reset the TSC, configure for 12 bit */
6128+ retries = 0 ;
6129+ do {
6130+ /* Reset the TSC, configure for 12 bit */
6131+ cmd = TSC2004_CMD1(MEAS_X_Y_Z1_Z2, MODE_12BIT, SWRST_TRUE);
6132+ err = tsc2004_write_cmd(ts, cmd);
6133+ if (err < 0)
6134+ printk (KERN_ERR "%s: write_cmd %d\n", __func__, err );
6135+ } while ( (err < 0) && (3 < retries++) );
6136+
6137+ if (err < 0)
6138+ return err ;
6139+
6140+ /* Enable interrupt for PENIRQ and DAV */
6141+ cmd = TSC2004_CMD0(CFR2_REG, PND0_FALSE, WRITE_REG);
6142+ data = PINTS1 | PINTS0 | MEDIAN_VAL_FLTR_SIZE_15 |
6143+ AVRG_VAL_FLTR_SIZE_7_8 | MAV_FLTR_EN_X | MAV_FLTR_EN_Y |
6144+ MAV_FLTR_EN_Z;
6145+ err = tsc2004_write_word_data(ts, cmd, data);
6146+ if (err < 0)
6147+ return err;
6148+
6149+ /* Configure the TSC in TSMode 1 */
6150+ cmd = TSC2004_CMD0(CFR0_REG, PND0_FALSE, WRITE_REG);
6151+ data = PEN_STS_CTRL_MODE | ADC_CLK_2MHZ | PANEL_VLTG_STB_TIME_1MS;
6152+ err = tsc2004_write_word_data(ts, cmd, data);
6153+ if (err < 0)
6154+ return err;
6155+
6156+ /* Enable x, y, z1 and z2 conversion functions */
6157+ cmd = TSC2004_CMD1(MEAS_X_Y_Z1_Z2, MODE_12BIT, SWRST_FALSE);
6158+ err = tsc2004_write_cmd(ts, cmd);
6159+ if (err < 0)
6160+ return err;
6161+
6162+ return 0;
6163+}
6164+
6165+static void tsc2004_read_values(struct tsc2004 *tsc, struct ts_event *tc)
6166+{
6167+ int cmd;
6168+
6169+ /* Read X Measurement */
6170+ cmd = TSC2004_CMD0(X_REG, PND0_FALSE, READ_REG);
6171+ tc->x = tsc2004_read_xyz_data(tsc, cmd);
6172+
6173+ /* Read Y Measurement */
6174+ cmd = TSC2004_CMD0(Y_REG, PND0_FALSE, READ_REG);
6175+ tc->y = tsc2004_read_xyz_data(tsc, cmd);
6176+
6177+ /* Read Z1 Measurement */
6178+ cmd = TSC2004_CMD0(Z1_REG, PND0_FALSE, READ_REG);
6179+ tc->z1 = tsc2004_read_xyz_data(tsc, cmd);
6180+
6181+ /* Read Z2 Measurement */
6182+ cmd = TSC2004_CMD0(Z2_REG, PND0_FALSE, READ_REG);
6183+ tc->z2 = tsc2004_read_xyz_data(tsc, cmd);
6184+
6185+
6186+ tc->x &= MEAS_MASK;
6187+ tc->y &= MEAS_MASK;
6188+ tc->z1 &= MEAS_MASK;
6189+ tc->z2 &= MEAS_MASK;
6190+
6191+ /* Prepare for touch readings */
6192+ if (tsc2004_prepare_for_reading(tsc) < 0)
6193+ dev_dbg(&tsc->client->dev, "Failed to prepare TSC for next"
6194+ "reading\n");
6195+}
6196+
6197+static u32 tsc2004_calculate_pressure(struct tsc2004 *tsc, struct ts_event *tc)
6198+{
6199+ u32 rt = 0;
6200+
6201+ /* range filtering */
6202+ if (tc->x == MAX_12BIT)
6203+ tc->x = 0;
6204+
6205+ if (likely(tc->x && tc->z1)) {
6206+ /* compute touch pressure resistance using equation #1 */
6207+ rt = tc->z2 - tc->z1;
6208+ rt *= tc->x;
6209+ rt *= tsc->x_plate_ohms;
6210+ rt /= tc->z1;
6211+ rt = (rt + 2047) >> 12;
6212+ }
6213+
6214+ return rt;
6215+}
6216+
6217+static void tsc2004_send_up_event(struct tsc2004 *tsc)
6218+{
6219+ struct input_dev *input = tsc->input;
6220+
6221+ dev_dbg(&tsc->client->dev, "UP\n");
6222+
6223+ input_report_key(input, BTN_TOUCH, 0);
6224+ input_report_abs(input, ABS_PRESSURE, 0);
6225+ input_sync(input);
6226+}
6227+
6228+static void tsc2004_work(struct work_struct *work)
6229+{
6230+ struct tsc2004 *ts =
6231+ container_of(to_delayed_work(work), struct tsc2004, work);
6232+ struct ts_event tc;
6233+ u32 rt;
6234+
6235+ /*
6236+ * NOTE: We can't rely on the pressure to determine the pen down
6237+ * state, even though this controller has a pressure sensor.
6238+ * The pressure value can fluctuate for quite a while after
6239+ * lifting the pen and in some cases may not even settle at the
6240+ * expected value.
6241+ *
6242+ * The only safe way to check for the pen up condition is in the
6243+ * work function by reading the pen signal state (it's a GPIO
6244+ * and IRQ). Unfortunately such callback is not always available,
6245+ * in that case we have rely on the pressure anyway.
6246+ */
6247+ if (ts->get_pendown_state) {
6248+ if (unlikely(!ts->get_pendown_state())) {
6249+ tsc2004_send_up_event(ts);
6250+ ts->pendown = false;
6251+ goto out;
6252+ }
6253+
6254+ dev_dbg(&ts->client->dev, "pen is still down\n");
6255+ }
6256+
6257+ tsc2004_read_values(ts, &tc);
6258+
6259+ rt = tsc2004_calculate_pressure(ts, &tc);
6260+ if (rt > MAX_12BIT) {
6261+ /*
6262+ * Sample found inconsistent by debouncing or pressure is
6263+ * beyond the maximum. Don't report it to user space,
6264+ * repeat at least once more the measurement.
6265+ */
6266+ dev_dbg(&ts->client->dev, "ignored pressure %d\n", rt);
6267+ goto out;
6268+
6269+ }
6270+
6271+ if (rt) {
6272+ struct input_dev *input = ts->input;
6273+
6274+ translate(&tc.x, &tc.y);
6275+
6276+ if (!ts->pendown) {
6277+ dev_dbg(&ts->client->dev, "DOWN\n");
6278+
6279+ input_report_key(input, BTN_TOUCH, 1);
6280+ ts->pendown = true;
6281+ }
6282+
6283+ input_report_abs(input, ABS_X, tc.x);
6284+ input_report_abs(input, ABS_Y, tc.y);
6285+ input_report_abs(input, ABS_PRESSURE, rt);
6286+
6287+ input_sync(input);
6288+
6289+ dev_dbg(&ts->client->dev, "point(%4d,%4d), pressure (%4u)\n",
6290+ tc.x, tc.y, rt);
6291+
6292+ } else if (!ts->get_pendown_state && ts->pendown) {
6293+ /*
6294+ * We don't have callback to check pendown state, so we
6295+ * have to assume that since pressure reported is 0 the
6296+ * pen was lifted up.
6297+ */
6298+ tsc2004_send_up_event(ts);
6299+ ts->pendown = false;
6300+ }
6301+
6302+ out:
6303+ if (ts->pendown)
6304+ schedule_delayed_work(&ts->work,
6305+ msecs_to_jiffies(TS_POLL_PERIOD));
6306+ else
6307+ enable_irq(ts->irq);
6308+}
6309+
6310+static irqreturn_t tsc2004_irq(int irq, void *handle)
6311+{
6312+ struct tsc2004 *ts = handle;
6313+
6314+ if (!ts->get_pendown_state || likely(ts->get_pendown_state())) {
6315+ disable_irq_nosync(ts->irq);
6316+ schedule_delayed_work(&ts->work,
6317+ msecs_to_jiffies(TS_POLL_DELAY));
6318+ }
6319+
6320+ if (ts->clear_penirq)
6321+ ts->clear_penirq();
6322+
6323+ return IRQ_HANDLED;
6324+}
6325+
6326+static void tsc2004_free_irq(struct tsc2004 *ts)
6327+{
6328+ free_irq(ts->irq, ts);
6329+ if (cancel_delayed_work_sync(&ts->work)) {
6330+ /*
6331+ * Work was pending, therefore we need to enable
6332+ * IRQ here to balance the disable_irq() done in the
6333+ * interrupt handler.
6334+ */
6335+ enable_irq(ts->irq);
6336+ }
6337+}
6338+
6339+static int __devinit tsc2004_probe(struct i2c_client *client,
6340+ const struct i2c_device_id *id)
6341+{
6342+ struct tsc2004 *ts;
6343+ struct tsc2007_platform_data *pdata = pdata = client->dev.platform_data;
6344+ struct input_dev *input_dev;
6345+ int err;
6346+
6347+ if (!pdata) {
6348+ dev_err(&client->dev, "platform data is required!\n");
6349+ return -EINVAL;
6350+ }
6351+
6352+ if (!i2c_check_functionality(client->adapter,
6353+ I2C_FUNC_SMBUS_READ_WORD_DATA))
6354+ return -EIO;
6355+
6356+ ts = kzalloc(sizeof(struct tsc2004), GFP_KERNEL);
6357+ input_dev = input_allocate_device();
6358+ if (!ts || !input_dev) {
6359+ err = -ENOMEM;
6360+ goto err_free_mem;
6361+ }
6362+
6363+ ts->client = client;
6364+ ts->irq = client->irq;
6365+ ts->input = input_dev;
6366+ INIT_DELAYED_WORK(&ts->work, tsc2004_work);
6367+
6368+ ts->model = pdata->model;
6369+ ts->x_plate_ohms = pdata->x_plate_ohms;
6370+ ts->get_pendown_state = pdata->get_pendown_state;
6371+ ts->clear_penirq = pdata->clear_penirq;
6372+
6373+ snprintf(ts->phys, sizeof(ts->phys),
6374+ "%s/input0", dev_name(&client->dev));
6375+
6376+ input_dev->name = "tsc2004";
6377+ input_dev->phys = ts->phys;
6378+ input_dev->id.bustype = BUS_I2C;
6379+
6380+ input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
6381+ input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
6382+
6383+ input_set_abs_params(input_dev, ABS_X, 0, MAX_12BIT, 0, 0);
6384+ input_set_abs_params(input_dev, ABS_Y, 0, MAX_12BIT, 0, 0);
6385+ input_set_abs_params(input_dev, ABS_PRESSURE, 0, MAX_12BIT, 0, 0);
6386+
6387+ if (pdata->init_platform_hw)
6388+ pdata->init_platform_hw();
6389+
6390+ err = request_irq(ts->irq, tsc2004_irq, IRQF_TRIGGER_FALLING,
6391+ client->dev.driver->name, ts);
6392+ if (err < 0) {
6393+ dev_err(&client->dev, "irq %d busy?\n", ts->irq);
6394+ goto err_free_mem;
6395+ }
6396+
6397+ /* Prepare for touch readings */
6398+ err = tsc2004_prepare_for_reading(ts);
6399+ if (err < 0)
6400+ goto err_free_irq;
6401+
6402+ err = input_register_device(input_dev);
6403+ if (err)
6404+ goto err_free_irq;
6405+
6406+ i2c_set_clientdata(client, ts);
6407+
6408+ return 0;
6409+
6410+ err_free_irq:
6411+ tsc2004_free_irq(ts);
6412+ if (pdata->exit_platform_hw)
6413+ pdata->exit_platform_hw();
6414+ err_free_mem:
6415+ input_free_device(input_dev);
6416+ kfree(ts);
6417+ return err;
6418+}
6419+
6420+static int __devexit tsc2004_remove(struct i2c_client *client)
6421+{
6422+ struct tsc2004 *ts = i2c_get_clientdata(client);
6423+ struct tsc2007_platform_data *pdata = client->dev.platform_data;
6424+
6425+ tsc2004_free_irq(ts);
6426+
6427+ if (pdata->exit_platform_hw)
6428+ pdata->exit_platform_hw();
6429+
6430+ input_unregister_device(ts->input);
6431+ kfree(ts);
6432+
6433+ return 0;
6434+}
6435+
6436+static struct i2c_device_id tsc2004_idtable[] = {
6437+ { "tsc2004", 0 },
6438+ { }
6439+};
6440+
6441+MODULE_DEVICE_TABLE(i2c, tsc2004_idtable);
6442+
6443+static struct i2c_driver tsc2004_driver = {
6444+ .driver = {
6445+ .owner = THIS_MODULE,
6446+ .name = "tsc2004"
6447+ },
6448+ .id_table = tsc2004_idtable,
6449+ .probe = tsc2004_probe,
6450+ .remove = __devexit_p(tsc2004_remove),
6451+};
6452+
6453+static int __init tsc2004_init(void)
6454+{
6455+ return i2c_add_driver(&tsc2004_driver);
6456+}
6457+
6458+static void __exit tsc2004_exit(void)
6459+{
6460+ i2c_del_driver(&tsc2004_driver);
6461+}
6462+
6463+module_init(tsc2004_init);
6464+module_exit(tsc2004_exit);
6465+
6466+MODULE_AUTHOR("Vaibhav Hiremath <hvaibhav@ti.com>");
6467+MODULE_DESCRIPTION("TSC2004 TouchScreen Driver");
6468+MODULE_LICENSE("GPL");
6469diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
6470old mode 100755
6471new mode 100644
6472diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
6473old mode 100755
6474new mode 100644
6475diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
6476old mode 100755
6477new mode 100644
6478diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
6479old mode 100755
6480new mode 100644
6481diff --git a/drivers/mfd/da9052-core.c b/drivers/mfd/da9052-core.c
6482old mode 100755
6483new mode 100644
6484diff --git a/drivers/mfd/da9052-i2c.c b/drivers/mfd/da9052-i2c.c
6485old mode 100755
6486new mode 100644
6487diff --git a/drivers/mmc/core/sdio_cis.c b/drivers/mmc/core/sdio_cis.c
6488index 541bdb8..3b0ca83 100644
6489--- a/drivers/mmc/core/sdio_cis.c
6490+++ b/drivers/mmc/core/sdio_cis.c
6491@@ -230,6 +230,7 @@ static int sdio_read_cis(struct mmc_card *card, struct sdio_func *func)
6492 int ret;
6493 struct sdio_func_tuple *this, **prev;
6494 unsigned i, ptr = 0;
6495+ unsigned ptr_null_end;
6496
6497 /*
6498 * Note that this works for the common CIS (function number 0) as
6499@@ -258,6 +259,7 @@ static int sdio_read_cis(struct mmc_card *card, struct sdio_func *func)
6500
6501 BUG_ON(*prev);
6502
6503+ ptr_null_end = (ptr | 0xff) + 1;
6504 do {
6505 unsigned char tpl_code, tpl_link;
6506
6507@@ -269,6 +271,9 @@ static int sdio_read_cis(struct mmc_card *card, struct sdio_func *func)
6508 if (tpl_code == 0xff)
6509 break;
6510
6511+ if ((tpl_code == 0x00) && (ptr == ptr_null_end))
6512+ break; /* patch for misbehaving rtl8712 card */
6513+
6514 /* null entries have no link field or data */
6515 if (tpl_code == 0x00)
6516 continue;
6517@@ -282,9 +287,10 @@ static int sdio_read_cis(struct mmc_card *card, struct sdio_func *func)
6518 break;
6519
6520 this = kmalloc(sizeof(*this) + tpl_link, GFP_KERNEL);
6521- if (!this)
6522- return -ENOMEM;
6523-
6524+ if (!this) {
6525+ ret = -ENOMEM;
6526+ break;
6527+ }
6528 for (i = 0; i < tpl_link; i++) {
6529 ret = mmc_io_rw_direct(card, 0, 0,
6530 ptr + i, 0, &this->data[i]);
6531@@ -328,6 +334,12 @@ static int sdio_read_cis(struct mmc_card *card, struct sdio_func *func)
6532 * not going to be queued for a driver.
6533 */
6534 kfree(this);
6535+ if (ret) {
6536+ printk(KERN_WARNING "%s: dropping invalid"
6537+ " CIS tuple 0x%02x (%u bytes)\n",
6538+ mmc_hostname(card->host),
6539+ tpl_code, tpl_link);
6540+ }
6541 }
6542
6543 ptr += tpl_link;
6544diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
6545index 35fd825..7b08196 100644
6546--- a/drivers/mmc/host/sdhci-esdhc-imx.c
6547+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
6548@@ -855,6 +855,7 @@ static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pd
6549
6550 if (boarddata->support_8bit)
6551 host->mmc->caps |= MMC_CAP_8_BIT_DATA;
6552+ host->mmc->caps |= boarddata->caps;
6553 if (boarddata->keep_power_at_suspend)
6554 host->mmc->pm_caps |= (MMC_PM_KEEP_POWER | \
6555 MMC_PM_WAKE_SDIO_IRQ);
6556diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
6557old mode 100755
6558new mode 100644
6559diff --git a/drivers/mxc/mlb/mxc_mlb150.c b/drivers/mxc/mlb/mxc_mlb150.c
6560old mode 100755
6561new mode 100644
6562diff --git a/drivers/mxc/thermal/thermal.c b/drivers/mxc/thermal/thermal.c
6563index 0982a7b..cb52033 100644
6564--- a/drivers/mxc/thermal/thermal.c
6565+++ b/drivers/mxc/thermal/thermal.c
6566@@ -131,17 +131,22 @@
6567 #define MEASURE_FREQ 3276 /* 3276 RTC clocks delay, 100ms */
6568 #define KELVIN_TO_CEL(t, off) (((t) - (off)))
6569 #define CEL_TO_KELVIN(t, off) (((t) + (off)))
6570-#define DEFAULT_RATIO 145
6571-#define DEFAULT_N40C 1563
6572-#define REG_VALUE_TO_CEL(ratio, raw) ((raw_n40c - raw) * 100 / ratio - 40)
6573+
6574+#define DEFAULT_RAW_25C 1469
6575+#define DEFAULT_RAW_HOT 1375
6576+#define DEFAULT_TEMP_HOT 90
6577+
6578 #define ANATOP_DEBUG false
6579 #define THERMAL_FUSE_NAME "/sys/fsl_otp/HW_OCOTP_ANA1"
6580
6581 /* variables */
6582 unsigned long anatop_base;
6583-unsigned int ratio;
6584-unsigned int raw_25c, raw_hot, hot_temp, raw_n40c, raw_125c, raw_critical;
6585+unsigned int raw_critical;
6586 static struct clk *pll3_clk;
6587+unsigned raw_25c;
6588+unsigned long long cvt_to_celsius;
6589+unsigned long long cvt_to_raw;
6590+
6591 static bool full_run = true;
6592 static bool suspend_flag;
6593 static unsigned int thermal_irq;
6594@@ -255,6 +260,7 @@ static int anatop_dump_temperature_register(void)
6595 __raw_readl(anatop_base + HW_ANADIG_ANA_MISC1));
6596 return 0;
6597 }
6598+
6599 static void anatop_update_alarm(unsigned int alarm_value)
6600 {
6601 if (cooling_device_disable || suspend_flag)
6602@@ -267,6 +273,21 @@ static void anatop_update_alarm(unsigned int alarm_value)
6603
6604 return;
6605 }
6606+
6607+int cvt_raw_to_celius(unsigned raw)
6608+{
6609+ int change = (raw_25c - raw);
6610+ change = (int)((change * cvt_to_celsius) >> 32);
6611+ return 25 + change;
6612+}
6613+
6614+int cvt_celius_to_raw(int celius)
6615+{
6616+ int change = (celius - 25);
6617+ change = (int)((change * cvt_to_raw) >> 32);
6618+ return raw_25c - change;
6619+}
6620+
6621 static int anatop_thermal_get_temp(struct thermal_zone_device *thermal,
6622 long *temp)
6623 {
6624@@ -277,7 +298,7 @@ static int anatop_thermal_get_temp(struct thermal_zone_device *thermal,
6625 if (!tz)
6626 return -EINVAL;
6627
6628- if (!ratio || suspend_flag) {
6629+ if (!raw_25c || suspend_flag) {
6630 *temp = KELVIN_TO_CEL(TEMP_ACTIVE, KELVIN_OFFSET);
6631 return 0;
6632 }
6633@@ -322,10 +343,10 @@ static int anatop_thermal_get_temp(struct thermal_zone_device *thermal,
6634 anatop_dump_temperature_register();
6635 /* only the temp between -40C and 125C is valid, this
6636 is for save */
6637- if (tmp <= raw_n40c && tmp >= raw_125c)
6638- tz->temperature = REG_VALUE_TO_CEL(ratio, tmp);
6639- else {
6640- printk(KERN_WARNING "Invalid temperature, force it to 25C\n");
6641+ tz->temperature = cvt_raw_to_celius(tmp);
6642+ if ((tz->temperature < -25) || (tz->temperature > 125)) {
6643+ pr_warn("Invalid temperature %ld C, force it to 25C\n",
6644+ tz->temperature);
6645 tz->temperature = 25;
6646 }
6647
6648@@ -482,7 +503,7 @@ static int anatop_thermal_set_trip_temp(struct thermal_zone_device *thermal,
6649 if (tz->trips.critical.flags.valid) {
6650 tz->trips.critical.temperature = CEL_TO_KELVIN(
6651 *temp, tz->kelvin_offset);
6652- raw_critical = raw_25c - ratio * (*temp - 25) / 100;
6653+ raw_critical = cvt_celius_to_raw(*temp);
6654 anatop_update_alarm(raw_critical);
6655 }
6656 break;
6657@@ -826,31 +847,48 @@ __setup("no_cooling_device", anatop_thermal_cooling_device_disable);
6658
6659 static int anatop_thermal_counting_ratio(unsigned int fuse_data)
6660 {
6661+ unsigned raw25c, raw_hot, hot_temp;
6662 int ret = -EINVAL;
6663
6664 pr_info("Thermal calibration data is 0x%x\n", fuse_data);
6665- if (fuse_data == 0 || fuse_data == 0xffffffff || (fuse_data & 0xff) == 0) {
6666- pr_info("%s: invalid calibration data, disable cooling!!!\n", __func__);
6667- cooling_device_disable = true;
6668- ratio = DEFAULT_RATIO;
6669- disable_irq(thermal_irq);
6670- return ret;
6671- }
6672
6673 ret = 0;
6674 /* Fuse data layout:
6675 * [31:20] sensor value @ 25C
6676 * [19:8] sensor value of hot
6677 * [7:0] hot temperature value */
6678- raw_25c = fuse_data >> 20;
6679+ raw25c = fuse_data >> 20;
6680 raw_hot = (fuse_data & 0xfff00) >> 8;
6681 hot_temp = fuse_data & 0xff;
6682
6683- ratio = ((raw_25c - raw_hot) * 100) / (hot_temp - 25);
6684- raw_n40c = raw_25c + (13 * ratio) / 20;
6685- raw_125c = raw_25c - ratio;
6686+ if ((raw25c <= raw_hot) || (hot_temp <= 25)) {
6687+ pr_info("%s: invalid calibration data, disable cooling!!! raw25c=%x raw_hot=%x hot_temp=%x\n",
6688+ __func__, raw25c, raw_hot, hot_temp);
6689+ cooling_device_disable = true;
6690+ raw_25c = DEFAULT_RAW_25C;
6691+ disable_irq(thermal_irq);
6692+ cvt_to_celsius = (DEFAULT_TEMP_HOT - 25);
6693+ cvt_to_celsius <<= 32;
6694+ cvt_to_celsius /= DEFAULT_RAW_25C - DEFAULT_RAW_HOT;
6695+
6696+ cvt_to_raw = DEFAULT_RAW_25C - DEFAULT_RAW_HOT;
6697+ cvt_to_raw <<= 32;
6698+ cvt_to_raw /= (DEFAULT_TEMP_HOT - 25);
6699+ return ret;
6700+ }
6701+ ret = 0;
6702+ raw_25c = raw25c;
6703+ cvt_to_celsius = hot_temp - 25; /* hot_temp > 25 */
6704+ cvt_to_celsius <<= 32;
6705+ do_div(cvt_to_celsius, raw25c - raw_hot); /* raw25c > raw_hot */
6706+
6707+ cvt_to_raw = raw25c - raw_hot;
6708+ cvt_to_raw <<= 32;
6709+ do_div(cvt_to_raw, hot_temp - 25);
6710+ pr_info("%s: raw25c=%d raw_hot=%d hot_temp=%d\n", __func__, raw25c, raw_hot, hot_temp);
6711+
6712 /* Init default critical temp to set alarm */
6713- raw_critical = raw_25c - ratio * (KELVIN_TO_CEL(TEMP_CRITICAL, KELVIN_OFFSET) - 25) / 100;
6714+ raw_critical = cvt_celius_to_raw(KELVIN_TO_CEL(TEMP_CRITICAL, KELVIN_OFFSET));
6715 clk_enable(pll3_clk);
6716 anatop_update_alarm(raw_critical);
6717
6718@@ -877,6 +915,7 @@ static int anatop_thermal_probe(struct platform_device *pdev)
6719 struct resource *res_io, *res_irq, *res_calibration;
6720 void __iomem *base, *calibration_addr;
6721 struct anatop_device *device;
6722+ unsigned fuse_data;
6723
6724 device = kzalloc(sizeof(*device), GFP_KERNEL);
6725 if (!device) {
6726@@ -919,9 +958,13 @@ static int anatop_thermal_probe(struct platform_device *pdev)
6727 goto anatop_failed;
6728 }
6729
6730- raw_n40c = DEFAULT_N40C;
6731 /* use calibration data to get ratio */
6732- anatop_thermal_counting_ratio(__raw_readl(calibration_addr));
6733+ fuse_data = __raw_readl(calibration_addr);
6734+#if 1
6735+ if (!fuse_data)
6736+ fuse_data = (0x552 << 8) | 58 | (0x58e << 20);
6737+#endif
6738+ anatop_thermal_counting_ratio(fuse_data);
6739
6740 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
6741 if (res_irq == NULL) {
6742diff --git a/drivers/net/fec.c b/drivers/net/fec.c
6743old mode 100755
6744new mode 100644
6745index 4b5818e..9717fc6
6746--- a/drivers/net/fec.c
6747+++ b/drivers/net/fec.c
6748@@ -159,7 +159,9 @@ MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");
6749 /* Pause frame feild and FIFO threshold */
6750 #define FEC_ENET_FCE (1 << 5)
6751 #define FEC_ENET_RSEM_V 0x84
6752+#define FEC_ENET_RSEM_V_TO1 0x10
6753 #define FEC_ENET_RSFL_V 16
6754+#define FEC_ENET_RSFL_V_TO1 0x20
6755 #define FEC_ENET_RAEM_V 0x8
6756 #define FEC_ENET_RAFL_V 0x8
6757 #define FEC_ENET_OPD_V 0xFFF0
6758@@ -562,28 +564,33 @@ static int fec_rx_poll(struct napi_struct *napi, int budget)
6759 goto rx_processing_done;
6760
6761 /* Check for errors. */
6762+ status ^= BD_ENET_RX_LAST;
6763 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO |
6764- BD_ENET_RX_CR | BD_ENET_RX_OV)) {
6765+ BD_ENET_RX_CR | BD_ENET_RX_OV | BD_ENET_RX_LAST |
6766+ BD_ENET_RX_CL)) {
6767 ndev->stats.rx_errors++;
6768- if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) {
6769- /* Frame too long or too short. */
6770- ndev->stats.rx_length_errors++;
6771- }
6772- if (status & BD_ENET_RX_NO) /* Frame alignment */
6773- ndev->stats.rx_frame_errors++;
6774- if (status & BD_ENET_RX_CR) /* CRC Error */
6775- ndev->stats.rx_crc_errors++;
6776- if (status & BD_ENET_RX_OV) /* FIFO overrun */
6777- ndev->stats.rx_fifo_errors++;
6778- }
6779
6780- /* Report late collisions as a frame error.
6781- * On this error, the BD is closed, but we don't know what we
6782- * have in the buffer. So, just drop this frame on the floor.
6783- */
6784- if (status & BD_ENET_RX_CL) {
6785- ndev->stats.rx_errors++;
6786- ndev->stats.rx_frame_errors++;
6787+ if (status & BD_ENET_RX_OV) {
6788+ /* FIFO overrun */
6789+ ndev->stats.rx_fifo_errors++;
6790+ } else {
6791+ if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH
6792+ | BD_ENET_RX_LAST)) {
6793+ /* Frame too long or too short. */
6794+ ndev->stats.rx_length_errors++;
6795+ if (status & BD_ENET_RX_LAST)
6796+ dev_err(&ndev->dev,
6797+ "rcv is not +last, "
6798+ "0x%x\n", status);
6799+ }
6800+ if (status & BD_ENET_RX_CR) /* CRC Error */
6801+ ndev->stats.rx_crc_errors++;
6802+ /*
6803+ * Report late collisions as a frame error.
6804+ */
6805+ if (status & (BD_ENET_RX_NO | BD_ENET_RX_CL))
6806+ ndev->stats.rx_frame_errors++;
6807+ }
6808 goto rx_processing_done;
6809 }
6810
6811@@ -1040,9 +1047,10 @@ static int fec_enet_mii_probe(struct net_device *ndev)
6812 }
6813
6814 /* mask with MAC supported features */
6815- if (cpu_is_mx6q() || cpu_is_mx6dl())
6816- phy_dev->supported &= PHY_GBIT_FEATURES;
6817- else
6818+ if (cpu_is_mx6q() || cpu_is_mx6dl()) {
6819+ /* SUPPORTED_Asym_Pause prevents my switch from linking up */
6820+ phy_dev->supported &= PHY_GBIT_FEATURES | SUPPORTED_Pause;
6821+ } else
6822 phy_dev->supported &= PHY_BASIC_FEATURES;
6823
6824 /* enable phy pause frame for any platform */
6825@@ -1062,7 +1070,7 @@ static int fec_enet_mii_probe(struct net_device *ndev)
6826 return 0;
6827 }
6828
6829-static int fec_enet_mii_init(struct platform_device *pdev)
6830+static int fec_enet_mii_init(struct platform_device *pdev, int phy_irq)
6831 {
6832 static struct mii_bus *fec0_mii_bus;
6833 struct net_device *ndev = platform_get_drvdata(pdev);
6834@@ -1128,7 +1136,7 @@ static int fec_enet_mii_init(struct platform_device *pdev)
6835 }
6836
6837 for (i = 0; i < PHY_MAX_ADDR; i++)
6838- fep->mii_bus->irq[i] = PHY_POLL;
6839+ fep->mii_bus->irq[i] = phy_irq;
6840
6841 if (mdiobus_register(fep->mii_bus))
6842 goto err_out_free_mdio_irq;
6843@@ -1627,6 +1635,9 @@ fec_restart(struct net_device *dev, int duplex)
6844 writel(OPT_FRAME_SIZE | 0x06, fep->hwp + FEC_R_CNTRL);
6845 writel(0x0, fep->hwp + FEC_X_CNTRL);
6846 }
6847+#ifdef FEC_FTRL
6848+ writel(PKT_MAXBUF_SIZE, fep->hwp + FEC_FTRL);
6849+#endif
6850 fep->full_duplex = duplex;
6851
6852 /* Set MII speed */
6853@@ -1657,12 +1668,9 @@ fec_restart(struct net_device *dev, int duplex)
6854 * ENET pause frame has two issues as ticket TKT116501
6855 * The issues have been fixed on Rigel TO1.1 and Arik TO1.2
6856 */
6857- if ((cpu_is_mx6q() &&
6858- (mx6q_revision() >= IMX_CHIP_REVISION_1_2)) ||
6859- (cpu_is_mx6dl() &&
6860- (mx6dl_revision() >= IMX_CHIP_REVISION_1_1)))
6861+ if (cpu_is_mx6q() || (cpu_is_mx6dl()
6862+ && (mx6dl_revision() >= IMX_CHIP_REVISION_1_1)))
6863 val |= FEC_ENET_FCE;
6864-
6865 writel(val, fep->hwp + FEC_R_CNTRL);
6866 }
6867
6868@@ -1716,24 +1724,31 @@ fec_restart(struct net_device *dev, int duplex)
6869 fep->phy_dev->speed == SPEED_1000)
6870 val |= (0x1 << 5);
6871
6872- /* RX FIFO threshold setting for ENET pause frame feature
6873- * Only set the parameters after ticket TKT116501 fixed.
6874- * The issue has been fixed on Rigel TO1.1 and Arik TO1.2
6875- */
6876- if ((cpu_is_mx6q() &&
6877- (mx6q_revision() >= IMX_CHIP_REVISION_1_2)) ||
6878- (cpu_is_mx6dl() &&
6879- (mx6dl_revision() >= IMX_CHIP_REVISION_1_1))) {
6880- writel(FEC_ENET_RSEM_V, fep->hwp + FEC_R_FIFO_RSEM);
6881- writel(FEC_ENET_RSFL_V, fep->hwp + FEC_R_FIFO_RSFL);
6882+ if (cpu_is_mx6q() || cpu_is_mx6dl()) {
6883+ u32 rsem_val = 0;
6884+ /* RX FIFO threshold setting for ENET pause frame feature
6885+ * Only set the parameters after ticket TKT116501 fixed.
6886+ * The issue has been fixed on Rigel TO1.1 and Arik TO1.2
6887+ */
6888+ if (cpu_is_mx6q() || (cpu_is_mx6dl()
6889+ && (mx6dl_revision() >= IMX_CHIP_REVISION_1_1))) {
6890+ if (cpu_is_mx6q() && (mx6q_revision() < IMX_CHIP_REVISION_1_1)) {
6891+ rsem_val = FEC_ENET_RSEM_V_TO1;
6892+ } else
6893+ rsem_val = FEC_ENET_RSEM_V;
6894+ }
6895+
6896+ writel(rsem_val, fep->hwp + FEC_R_FIFO_RSEM);
6897+ if (cpu_is_mx6q() && (mx6q_revision() < IMX_CHIP_REVISION_1_1))
6898+ writel(FEC_ENET_RSFL_V_TO1, fep->hwp + FEC_R_FIFO_RSFL);
6899+ else
6900+ writel(FEC_ENET_RSFL_V, fep->hwp + FEC_R_FIFO_RSFL);
6901 writel(FEC_ENET_RAEM_V, fep->hwp + FEC_R_FIFO_RAEM);
6902 writel(FEC_ENET_RAFL_V, fep->hwp + FEC_R_FIFO_RAFL);
6903
6904 /* OPD */
6905 writel(FEC_ENET_OPD_V, fep->hwp + FEC_OPD);
6906- }
6907
6908- if (cpu_is_mx6q() || cpu_is_mx6dl()) {
6909 /* enable endian swap */
6910 val |= (0x1 << 8);
6911 /* enable ENET store and forward mode */
6912@@ -1791,6 +1806,7 @@ fec_probe(struct platform_device *pdev)
6913 struct net_device *ndev;
6914 int i, irq, ret = 0;
6915 struct resource *r;
6916+ int phy_irq = PHY_POLL;
6917
6918 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
6919 if (!r)
6920@@ -1823,8 +1839,11 @@ fec_probe(struct platform_device *pdev)
6921 platform_set_drvdata(pdev, ndev);
6922
6923 pdata = pdev->dev.platform_data;
6924- if (pdata)
6925+ if (pdata) {
6926 fep->phy_interface = pdata->phy;
6927+ if (pdata->phy_irq)
6928+ phy_irq = pdata->phy_irq;
6929+ }
6930
6931 /* This device has up to three irqs on some platforms */
6932 for (i = 0; i < 3; i++) {
6933@@ -1852,7 +1871,7 @@ fec_probe(struct platform_device *pdev)
6934 if (ret)
6935 goto failed_init;
6936
6937- ret = fec_enet_mii_init(pdev);
6938+ ret = fec_enet_mii_init(pdev, phy_irq);
6939 if (ret)
6940 goto failed_mii_init;
6941
6942diff --git a/drivers/net/fec.h b/drivers/net/fec.h
6943index 0c26c6c..49eb060 100644
6944--- a/drivers/net/fec.h
6945+++ b/drivers/net/fec.h
6946@@ -49,6 +49,7 @@
6947 #define FEC_R_FIFO_RSEM 0x194 /* Receive FIFO section empty threshold */
6948 #define FEC_R_FIFO_RAEM 0x198 /* Receive FIFO almost empty threshold */
6949 #define FEC_R_FIFO_RAFL 0x19c /* Receive FIFO almost full threshold */
6950+#define FEC_FTRL 0x1b0 /* Frame truncation receive length*/
6951 #define FEC_MIIGSK_CFGR 0x300 /* MIIGSK Configuration reg */
6952 #define FEC_MIIGSK_ENR 0x308 /* MIIGSK Enable reg */
6953
6954diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
6955index 80747d2..6eafb5c 100644
6956--- a/drivers/net/phy/micrel.c
6957+++ b/drivers/net/phy/micrel.c
6958@@ -16,6 +16,7 @@
6959 * ks8001, ks8737, ks8721, ks8041, ks8051 100/10 phy
6960 */
6961
6962+#include <linux/delay.h>
6963 #include <linux/kernel.h>
6964 #include <linux/module.h>
6965 #include <linux/phy.h>
6966@@ -48,16 +49,34 @@ static int kszphy_ack_interrupt(struct phy_device *phydev)
6967 int rc;
6968
6969 rc = phy_read(phydev, MII_KSZPHY_INTCS);
6970-
6971 return (rc < 0) ? rc : 0;
6972 }
6973
6974 static int kszphy_set_interrupt(struct phy_device *phydev)
6975 {
6976- int temp;
6977- temp = (PHY_INTERRUPT_ENABLED == phydev->interrupts) ?
6978- KSZPHY_INTCS_ALL : 0;
6979- return phy_write(phydev, MII_KSZPHY_INTCS, temp);
6980+ int bmcr, new_bmcr;
6981+ bmcr = phy_read(phydev, MII_BMCR);
6982+ if (PHY_INTERRUPT_ENABLED == phydev->interrupts) {
6983+ new_bmcr = bmcr & ~BMCR_PDOWN;
6984+ if (bmcr != new_bmcr) {
6985+ unsigned intcs, temp;
6986+ phy_write(phydev, MII_BMCR, new_bmcr);
6987+ udelay(100); /* power up needs delay after */
6988+ /* force master mode */
6989+ phy_write(phydev, 0x9, 0x1f00);
6990+ }
6991+ return phy_write(phydev, MII_KSZPHY_INTCS, KSZPHY_INTCS_ALL);
6992+ } else {
6993+ phy_write(phydev, MII_KSZPHY_INTCS, 0);
6994+ new_bmcr = bmcr | BMCR_PDOWN;
6995+ if ((PHY_HALTED == phydev->state) && (bmcr != new_bmcr)) {
6996+ phy_write(phydev, MII_BMCR, bmcr | BMCR_ANRESTART);
6997+ /* let phy note link is down before poweroff */
6998+ udelay(10);
6999+ phy_write(phydev, MII_BMCR, new_bmcr);
7000+ }
7001+ return 0;
7002+ }
7003 }
7004
7005 static int kszphy_config_intr(struct phy_device *phydev)
7006@@ -66,8 +85,10 @@ static int kszphy_config_intr(struct phy_device *phydev)
7007
7008 /* set the interrupt pin active low */
7009 temp = phy_read(phydev, MII_KSZPHY_CTRL);
7010- temp &= ~KSZPHY_CTRL_INT_ACTIVE_HIGH;
7011- phy_write(phydev, MII_KSZPHY_CTRL, temp);
7012+ if (temp & KSZPHY_CTRL_INT_ACTIVE_HIGH) {
7013+ temp &= ~KSZPHY_CTRL_INT_ACTIVE_HIGH;
7014+ phy_write(phydev, MII_KSZPHY_CTRL, temp);
7015+ }
7016 rc = kszphy_set_interrupt(phydev);
7017 return rc < 0 ? rc : 0;
7018 }
7019@@ -76,10 +97,12 @@ static int ksz9021_config_intr(struct phy_device *phydev)
7020 {
7021 int temp, rc;
7022
7023- /* set the interrupt pin active low */
7024 temp = phy_read(phydev, MII_KSZPHY_CTRL);
7025- temp &= ~KSZ9021_CTRL_INT_ACTIVE_HIGH;
7026- phy_write(phydev, MII_KSZPHY_CTRL, temp);
7027+ if (temp & KSZ9021_CTRL_INT_ACTIVE_HIGH) {
7028+ /* set the interrupt pin active low */
7029+ temp &= ~KSZ9021_CTRL_INT_ACTIVE_HIGH;
7030+ phy_write(phydev, MII_KSZPHY_CTRL, temp);
7031+ }
7032 rc = kszphy_set_interrupt(phydev);
7033 return rc < 0 ? rc : 0;
7034 }
7035diff --git a/drivers/net/wireless/wl12xx/Kconfig b/drivers/net/wireless/wl12xx/Kconfig
7036index 35ce7b0..1dc6a47 100644
7037--- a/drivers/net/wireless/wl12xx/Kconfig
7038+++ b/drivers/net/wireless/wl12xx/Kconfig
7039@@ -1,6 +1,7 @@
7040 menuconfig WL12XX_MENU
7041 tristate "TI wl12xx driver support"
7042 depends on MAC80211 && EXPERIMENTAL
7043+ select WEXT_PRIV
7044 ---help---
7045 This will enable TI wl12xx driver support for the following chips:
7046 wl1271, wl1273, wl1281 and wl1283.
7047@@ -12,6 +13,7 @@ config WL12XX
7048 depends on INET
7049 select FW_LOADER
7050 select CRC7
7051+ select WIRELESS_EXT
7052 ---help---
7053 This module adds support for wireless adapters based on TI wl1271 and
7054 TI wl1273 chipsets. This module does *not* include support for wl1251.
7055diff --git a/drivers/net/wireless/wl12xx/main.c b/drivers/net/wireless/wl12xx/main.c
7056index e6497dc..f1ffec0 100644
7057--- a/drivers/net/wireless/wl12xx/main.c
7058+++ b/drivers/net/wireless/wl12xx/main.c
7059@@ -1767,6 +1767,8 @@ static void wl1271_op_remove_interface(struct ieee80211_hw *hw,
7060
7061 mutex_unlock(&wl->mutex);
7062 cancel_work_sync(&wl->recovery_work);
7063+ if (wl->set_power)
7064+ wl->set_power(0);
7065 }
7066
7067 void wl1271_configure_filters(struct wl1271 *wl, unsigned int filters)
7068@@ -3781,9 +3783,39 @@ static ssize_t wl1271_sysfs_show_hw_pg_ver(struct device *dev,
7069 static DEVICE_ATTR(hw_pg_ver, S_IRUGO | S_IWUSR,
7070 wl1271_sysfs_show_hw_pg_ver, NULL);
7071
7072+
7073+static int parse_mac(unsigned char *mac, unsigned char const *str_mac)
7074+{
7075+ int i = 0;
7076+ char *end;
7077+ int ret = -EINVAL;
7078+
7079+ for (;;) {
7080+ mac[i++] = simple_strtoul(str_mac, &end, 16);
7081+ if (i == 6) {
7082+ if (!*end || (*end == ' '))
7083+ ret = 0;
7084+ break;
7085+ }
7086+ str_mac = end + 1;
7087+ if ((*end != '-') && (*end != ':'))
7088+ break;
7089+ }
7090+ return ret;
7091+}
7092+
7093+static char *mac;
7094+module_param(mac, charp, S_IRUGO);
7095+MODULE_PARM_DESC(mac, "mac address override");
7096+
7097 int wl1271_register_hw(struct wl1271 *wl)
7098 {
7099 int ret;
7100+ u8 override_mac[ETH_ALEN];
7101+ memset(override_mac, 0, ETH_ALEN);
7102+ if (mac)
7103+ if (parse_mac(override_mac, mac))
7104+ memset(override_mac, 0, ETH_ALEN);
7105
7106 if (wl->mac80211_registered)
7107 return 0;
7108@@ -3804,6 +3836,9 @@ int wl1271_register_hw(struct wl1271 *wl)
7109 wl->mac_addr[5] = nvs_ptr[3];
7110 }
7111
7112+ if (is_valid_ether_addr(override_mac))
7113+ memcpy(wl->mac_addr, override_mac, sizeof(wl->mac_addr));
7114+
7115 SET_IEEE80211_PERM_ADDR(wl->hw, wl->mac_addr);
7116
7117 ret = ieee80211_register_hw(wl->hw);
7118diff --git a/drivers/net/wireless/wl12xx/sdio.c b/drivers/net/wireless/wl12xx/sdio.c
7119index 536e506..5bd82f2 100644
7120--- a/drivers/net/wireless/wl12xx/sdio.c
7121+++ b/drivers/net/wireless/wl12xx/sdio.c
7122@@ -303,6 +303,7 @@ static int __devinit wl1271_probe(struct sdio_func *func,
7123 /* Tell PM core that we don't need the card to be powered now */
7124 pm_runtime_put_noidle(&func->dev);
7125
7126+ wl->set_power = wlan_data->set_power;
7127 wl1271_notice("initialized");
7128
7129 return 0;
7130diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
7131old mode 100755
7132new mode 100644
7133diff --git a/drivers/power/Makefile b/drivers/power/Makefile
7134old mode 100755
7135new mode 100644
7136diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
7137old mode 100755
7138new mode 100644
7139diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
7140old mode 100755
7141new mode 100644
7142diff --git a/drivers/regulator/da9052-regulator.c b/drivers/regulator/da9052-regulator.c
7143old mode 100755
7144new mode 100644
7145diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
7146old mode 100755
7147new mode 100644
7148diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
7149old mode 100755
7150new mode 100644
7151diff --git a/drivers/rtc/rtc-da9052.c b/drivers/rtc/rtc-da9052.c
7152old mode 100755
7153new mode 100644
7154diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
7155index a512a76..00d3675 100644
7156--- a/drivers/tty/serial/imx.c
7157+++ b/drivers/tty/serial/imx.c
7158@@ -1215,9 +1215,12 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios,
7159 {
7160 struct imx_port *sport = (struct imx_port *)port;
7161 unsigned long flags;
7162- unsigned int ucr2, old_ucr1, old_txrxen, baud, quot;
7163+ unsigned new_ucr2, old_ucr2;
7164+ unsigned new_ufcr, old_ufcr;
7165+ unsigned old_ubir, old_ubmr;
7166+ unsigned int baud, quot;
7167 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
7168- unsigned int div, ufcr;
7169+ unsigned int div;
7170 unsigned long num, denom;
7171 uint64_t tdiv64;
7172
7173@@ -1240,26 +1243,25 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios,
7174 old_csize = CS8;
7175 }
7176
7177+ new_ucr2 = UCR2_SRST | UCR2_IRTS;
7178 if ((termios->c_cflag & CSIZE) == CS8)
7179- ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS;
7180- else
7181- ucr2 = UCR2_SRST | UCR2_IRTS;
7182+ new_ucr2 |= UCR2_WS;
7183
7184 if (termios->c_cflag & CRTSCTS) {
7185 if( sport->have_rtscts ) {
7186- ucr2 &= ~UCR2_IRTS;
7187- ucr2 |= UCR2_CTSC;
7188+ new_ucr2 &= ~UCR2_IRTS;
7189+ new_ucr2 |= UCR2_CTSC;
7190 } else {
7191 termios->c_cflag &= ~CRTSCTS;
7192 }
7193 }
7194
7195 if (termios->c_cflag & CSTOPB)
7196- ucr2 |= UCR2_STPB;
7197+ new_ucr2 |= UCR2_STPB;
7198 if (termios->c_cflag & PARENB) {
7199- ucr2 |= UCR2_PREN;
7200+ new_ucr2 |= UCR2_PREN;
7201 if (termios->c_cflag & PARODD)
7202- ucr2 |= UCR2_PROE;
7203+ new_ucr2 |= UCR2_PROE;
7204 }
7205
7206 /*
7207@@ -1272,7 +1274,7 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios,
7208
7209 spin_lock_irqsave(&sport->port.lock, flags);
7210
7211- sport->port.read_status_mask = 0;
7212+ sport->port.read_status_mask = 0xff;
7213 if (termios->c_iflag & INPCK)
7214 sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR);
7215 if (termios->c_iflag & (BRKINT | PARMRK))
7216@@ -1299,22 +1301,6 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios,
7217 */
7218 uart_update_timeout(port, termios->c_cflag, baud);
7219
7220- /*
7221- * disable interrupts and drain transmitter
7222- */
7223- old_ucr1 = readl(sport->port.membase + UCR1);
7224- writel(old_ucr1 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN),
7225- sport->port.membase + UCR1);
7226-
7227- while ( !(readl(sport->port.membase + USR2) & USR2_TXDC))
7228- barrier();
7229-
7230- /* then, disable everything */
7231- old_txrxen = readl(sport->port.membase + UCR2);
7232- writel(old_txrxen & ~( UCR2_TXEN | UCR2_RXEN),
7233- sport->port.membase + UCR2);
7234- old_txrxen &= (UCR2_TXEN | UCR2_RXEN);
7235-
7236 if (USE_IRDA(sport)) {
7237 /*
7238 * use maximum available submodule frequency to
7239@@ -1341,31 +1327,47 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios,
7240 num -= 1;
7241 denom -= 1;
7242
7243- ufcr = readl(sport->port.membase + UFCR);
7244- ufcr = (ufcr & (~UFCR_RFDIV)) | UFCR_RFDIV_REG(div);
7245+ old_ufcr = readl(sport->port.membase + UFCR);
7246+ new_ufcr = (old_ufcr & (~UFCR_RFDIV)) | UFCR_RFDIV_REG(div);
7247
7248- if (sport->use_dcedte)
7249- ufcr |= UFCR_DCEDTE;
7250-
7251- writel(ufcr, sport->port.membase + UFCR);
7252+ old_ubir = readl(sport->port.membase + UBIR);
7253+ old_ubmr = readl(sport->port.membase + UBMR);
7254+ old_ucr2 = readl(sport->port.membase + UCR2) & ~UCR2_CTS;
7255+ new_ucr2 |= old_ucr2 & (UCR2_TXEN | UCR2_RXEN);
7256
7257- writel(num, sport->port.membase + UBIR);
7258- writel(denom, sport->port.membase + UBMR);
7259+ if (sport->use_dcedte)
7260+ new_ufcr |= UFCR_DCEDTE;
7261+ if ((old_ufcr != new_ufcr) || (old_ucr2 != new_ucr2) ||
7262+ (old_ubir != num) || (old_ubmr != denom)) {
7263+ int i;
7264+ /* software reset */
7265+ writel(readl(sport->port.membase + UCR2) &
7266+ ~(UCR2_TXEN | UCR2_RXEN | UCR2_SRST | UCR2_CTS),
7267+ sport->port.membase + UCR2);
7268+ for (i = 0; i < 2000; i++) {
7269+ unsigned uts = readl(sport->port.membase + UTS);
7270+ if (!(uts & UTS_SOFTRST))
7271+ break;
7272+ }
7273+ writel(new_ufcr, sport->port.membase + UFCR);
7274+ writel(num, sport->port.membase + UBIR);
7275+ writel(denom, sport->port.membase + UBMR);
7276
7277- if (!cpu_is_mx1())
7278- writel(sport->port.uartclk / div / 1000,
7279+ if (!cpu_is_mx1())
7280+ writel(sport->port.uartclk / div / 1000,
7281 sport->port.membase + MX2_ONEMS);
7282
7283- writel(old_ucr1, sport->port.membase + UCR1);
7284+ /* set the parity, stop bits and data size */
7285+ writel(new_ucr2, sport->port.membase + UCR2);
7286
7287- /* set the parity, stop bits and data size */
7288- writel(ucr2 | old_txrxen, sport->port.membase + UCR2);
7289+ if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
7290+ imx_enable_ms(&sport->port);
7291
7292+ pr_info("old_ufcr=%x new_ufcr=%x, old_ucr2=%x new_ucr2=%x, old_ubir=%x num=%lx, old_ubmr=%x denom=%lx\n",
7293+ old_ufcr, new_ufcr, old_ucr2, new_ucr2, old_ubir, num, old_ubmr, denom);
7294+ pr_info("clk=%i div=%i num=%li denom=%li baud=%i\n", sport->port.uartclk, div, num+1, denom+1, baud);
7295+ }
7296 spin_unlock_irqrestore(&sport->port.lock, flags);
7297-
7298- if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
7299- imx_enable_ms(&sport->port);
7300-
7301 }
7302
7303 static const char *imx_type(struct uart_port *port)
7304diff --git a/drivers/tty/serial/mxc_uart_early.c b/drivers/tty/serial/mxc_uart_early.c
7305index ffa3660..443dff5 100644
7306--- a/drivers/tty/serial/mxc_uart_early.c
7307+++ b/drivers/tty/serial/mxc_uart_early.c
7308@@ -183,7 +183,7 @@ int __init mxc_early_uart_console_disable(void)
7309 if (mxc_early_uart_console.index >= 0) {
7310 unregister_console(&mxc_early_uart_console);
7311 iounmap(port->membase);
7312- clk_disable(device->clk);
7313+// clk_disable(device->clk);
7314 clk_put(device->clk);
7315 }
7316 return 0;
7317diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
7318old mode 100755
7319new mode 100644
7320diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
7321old mode 100755
7322new mode 100644
7323diff --git a/drivers/usb/gadget/arcotg_udc.c b/drivers/usb/gadget/arcotg_udc.c
7324old mode 100755
7325new mode 100644
7326diff --git a/drivers/usb/gadget/arcotg_udc.h b/drivers/usb/gadget/arcotg_udc.h
7327old mode 100755
7328new mode 100644
7329diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
7330old mode 100755
7331new mode 100644
7332diff --git a/drivers/usb/host/ehci-arc.c b/drivers/usb/host/ehci-arc.c
7333old mode 100755
7334new mode 100644
7335diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
7336old mode 100755
7337new mode 100644
7338diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig
7339old mode 100755
7340new mode 100644
7341diff --git a/drivers/usb/otg/Makefile b/drivers/usb/otg/Makefile
7342old mode 100755
7343new mode 100644
7344diff --git a/drivers/usb/otg/fsl_otg.c b/drivers/usb/otg/fsl_otg.c
7345old mode 100755
7346new mode 100644
7347diff --git a/drivers/usb/otg/fsl_otg.h b/drivers/usb/otg/fsl_otg.h
7348old mode 100755
7349new mode 100644
7350diff --git a/drivers/usb/otg/otg_fsm.c b/drivers/usb/otg/otg_fsm.c
7351old mode 100755
7352new mode 100644
7353diff --git a/drivers/usb/otg/otg_fsm.h b/drivers/usb/otg/otg_fsm.h
7354old mode 100755
7355new mode 100644
7356diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
7357old mode 100755
7358new mode 100644
7359diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
7360old mode 100755
7361new mode 100644
7362diff --git a/drivers/video/mxc/mxc_ipuv3_fb.c b/drivers/video/mxc/mxc_ipuv3_fb.c
7363index 8038f3d..66ea47d 100644
7364--- a/drivers/video/mxc/mxc_ipuv3_fb.c
7365+++ b/drivers/video/mxc/mxc_ipuv3_fb.c
7366@@ -869,6 +869,8 @@ static int mxcfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
7367 vtotal = var->yres + var->lower_margin + var->vsync_len +
7368 var->upper_margin;
7369 var->pixclock = (vtotal * htotal * 6UL) / 100UL;
7370+ if (!var->pixclock)
7371+ var->pixclock = 1000;
7372 var->pixclock = KHZ2PICOS(var->pixclock);
7373 dev_dbg(info->device,
7374 "pixclock set for 60Hz refresh = %u ps\n",
7375@@ -2310,7 +2312,7 @@ static int mxcfb_probe(struct platform_device *pdev)
7376 mxcfbi->ipu_ch_nf_irq = IPU_IRQ_DC_SYNC_NFACK;
7377 mxcfbi->ipu_alp_ch_irq = -1;
7378 mxcfbi->ipu_ch = MEM_DC_SYNC;
7379- mxcfbi->cur_blank = mxcfbi->next_blank = FB_BLANK_POWERDOWN;
7380+ mxcfbi->cur_blank = mxcfbi->next_blank = FB_BLANK_UNBLANK;
7381
7382 ret = mxcfb_register(fbi);
7383 if (ret < 0)
7384diff --git a/drivers/video/mxc/mxcfb.c b/drivers/video/mxc/mxcfb.c
7385index 4dffee5..a3f6476 100644
7386--- a/drivers/video/mxc/mxcfb.c
7387+++ b/drivers/video/mxc/mxcfb.c
7388@@ -346,6 +346,8 @@ static int mxcfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
7389 vtotal = var->yres + var->lower_margin + var->vsync_len +
7390 var->upper_margin;
7391 var->pixclock = (vtotal * htotal * 6UL) / 100UL;
7392+ if (!var->pixclock)
7393+ var->pixclock = 1000;
7394 var->pixclock = KHZ2PICOS(var->pixclock);
7395 dev_dbg(info->device,
7396 "pixclock set for 60Hz refresh = %u ps\n",
7397diff --git a/drivers/video/mxc/mxcfb_claa_wvga.c b/drivers/video/mxc/mxcfb_claa_wvga.c
7398index 3dbad0d..4f15ba4 100644
7399--- a/drivers/video/mxc/mxcfb_claa_wvga.c
7400+++ b/drivers/video/mxc/mxcfb_claa_wvga.c
7401@@ -117,7 +117,7 @@ static struct notifier_block nb = {
7402 static int __devinit lcd_probe(struct platform_device *pdev)
7403 {
7404 int i;
7405- struct mxc_lcd_platform_data *plat = pdev->dev.platform_data;
7406+ struct fsl_mxc_lcd_platform_data *plat = pdev->dev.platform_data;
7407
7408 if (plat) {
7409 if (plat->reset)
7410diff --git a/drivers/video/mxc_hdmi.c b/drivers/video/mxc_hdmi.c
7411index 92822f8..91fc773 100644
7412--- a/drivers/video/mxc_hdmi.c
7413+++ b/drivers/video/mxc_hdmi.c
7414@@ -1538,10 +1538,10 @@ static void mxc_hdmi_edid_rebuild_modelist(struct mxc_hdmi *hdmi)
7415 */
7416 mode = &hdmi->fbi->monspecs.modedb[i];
7417
7418- if (!(mode->vmode & FB_VMODE_INTERLACED) &&
7419- (mxc_edid_mode_to_vic(mode) != 0)) {
7420+ if (!(mode->vmode & FB_VMODE_INTERLACED)) {
7421+ int vic = mxc_edid_mode_to_vic(mode);
7422
7423- dev_dbg(&hdmi->pdev->dev, "Added mode %d:", i);
7424+ dev_info(&hdmi->pdev->dev, "%s: Added mode %d(VIC %u):", __func__, i, vic);
7425 dev_dbg(&hdmi->pdev->dev,
7426 "xres = %d, yres = %d, freq = %d, vmode = %d, flag = %d\n",
7427 hdmi->fbi->monspecs.modedb[i].xres,
7428diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
7429old mode 100755
7430new mode 100644
7431diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
7432old mode 100755
7433new mode 100644
7434diff --git a/include/linux/fec.h b/include/linux/fec.h
7435index 8f69cb5..7a08261 100644
7436--- a/include/linux/fec.h
7437+++ b/include/linux/fec.h
7438@@ -21,6 +21,7 @@ struct fec_platform_data {
7439 int (*power_hibernate) (struct phy_device *);
7440 phy_interface_t phy;
7441 unsigned char mac[ETH_ALEN];
7442+ int phy_irq;
7443 };
7444
7445 #endif
7446diff --git a/include/linux/mfd/da9052/da9052.h b/include/linux/mfd/da9052/da9052.h
7447old mode 100755
7448new mode 100644
7449diff --git a/include/linux/mfd/da9052/tsi_filter.h b/include/linux/mfd/da9052/tsi_filter.h
7450old mode 100755
7451new mode 100644
7452diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c
7453index fd05514..45191d1 100644
7454--- a/sound/soc/codecs/sgtl5000.c
7455+++ b/sound/soc/codecs/sgtl5000.c
7456@@ -602,7 +602,7 @@ static const struct snd_kcontrol_new sgtl5000_snd_controls[] = {
7457 5, 1, 0),
7458
7459 SOC_SINGLE_TLV("Mic Volume", SGTL5000_CHIP_MIC_CTRL,
7460- 0, 4, 0, mic_gain_tlv),
7461+ 0, 3, 0, mic_gain_tlv),
7462
7463 /* Bass Enhance enable */
7464 SOC_SINGLE("Bass Enable", SGTL5000_DAP_BASS_ENHANCE,
7465@@ -1614,7 +1614,7 @@ static int sgtl5000_probe(struct snd_soc_codec *codec)
7466 SGTL5000_HP_ZCD_EN |
7467 SGTL5000_ADC_ZCD_EN);
7468
7469- snd_soc_write(codec, SGTL5000_CHIP_MIC_CTRL, 0);
7470+ snd_soc_write(codec, SGTL5000_CHIP_MIC_CTRL, 2);
7471
7472 snd_soc_write(codec, SGTL5000_CHIP_DAC_VOL, 0x6060);
7473 snd_soc_write(codec, SGTL5000_CHIP_ANA_ADC_CTRL,
diff --git a/recipes-kernel/linux/linux-imx_3.0.35.bb b/recipes-kernel/linux/linux-imx_3.0.35.bb
index f226e2c..20681ac 100644
--- a/recipes-kernel/linux/linux-imx_3.0.35.bb
+++ b/recipes-kernel/linux/linux-imx_3.0.35.bb
@@ -22,6 +22,3 @@ LOCALVERSION_mx6dl = "-3.0.0+yocto"
22SRC_URI += "file://fix_getrusage_for_perf.patch \ 22SRC_URI += "file://fix_getrusage_for_perf.patch \
23 file://egalax_ts-Add-support-for-single-touch-in-Kconfig.patch \ 23 file://egalax_ts-Add-support-for-single-touch-in-Kconfig.patch \
24 " 24 "
25
26# iMX6Q SabreLITE changes done by Boundary Devices
27SRC_URI_append_imx6qsabrelite = " file://sync-boundary-changes.patch"
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-07-25 23:05:41 +0000