summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorKhem Raj <raj.khem@gmail.com>2021-03-30 15:34:20 -0700
committerKhem Raj <raj.khem@gmail.com>2021-03-30 15:36:17 -0700
commite024a4c7085fb9ab2c79b3b6c5c6389037fab630 (patch)
tree32c5143fd1f7bde344ee821c652dbb45056c6fb8
parent401364d06f5d6519ded3d1588c8e27c2310a2b08 (diff)
downloadmeta-openembedded-e024a4c7085fb9ab2c79b3b6c5c6389037fab630.tar.gz
flashrom: Add remaining RISCV support
Signed-off-by: Khem Raj <raj.khem@gmail.com> Cc: Ross Burton <ross.burton@arm.com>
-rw-r--r--meta-oe/recipes-bsp/flashrom/flashrom/0001-flashrom-Mark-RISCV-as-non-memory-mapped-I-O-archite.patch44
-rw-r--r--meta-oe/recipes-bsp/flashrom/flashrom_1.2.bb1
2 files changed, 45 insertions, 0 deletions
diff --git a/meta-oe/recipes-bsp/flashrom/flashrom/0001-flashrom-Mark-RISCV-as-non-memory-mapped-I-O-archite.patch b/meta-oe/recipes-bsp/flashrom/flashrom/0001-flashrom-Mark-RISCV-as-non-memory-mapped-I-O-archite.patch
new file mode 100644
index 0000000000..e481c5a161
--- /dev/null
+++ b/meta-oe/recipes-bsp/flashrom/flashrom/0001-flashrom-Mark-RISCV-as-non-memory-mapped-I-O-archite.patch
@@ -0,0 +1,44 @@
1From 2c777126765b4095bf481d5cfe4a21470374d940 Mon Sep 17 00:00:00 2001
2From: Khem Raj <raj.khem@gmail.com>
3Date: Tue, 30 Mar 2021 15:12:09 -0700
4Subject: [PATCH] flashrom: Mark RISCV as non memory-mapped I/O architecture
5
6Upstream-Status: Submitted [https://review.coreboot.org/c/flashrom/+/51960]
7Signed-off-by: Khem Raj <raj.khem@gmail.com>
8Change-Id: I55c4e8529d36f0850dd56441c3fb8602c5d889fd
9---
10 Makefile | 2 +-
11 hwaccess.h | 4 ++++
12 2 files changed, 5 insertions(+), 1 deletion(-)
13
14diff --git a/Makefile b/Makefile
15index 6d37d55..203e04b 100644
16--- a/Makefile
17+++ b/Makefile
18@@ -559,7 +559,7 @@ endif
19 # Disable all drivers needing raw access (memory, PCI, port I/O) on
20 # architectures with unknown raw access properties.
21 # Right now those architectures are alpha hppa m68k sh s390
22-ifneq ($(ARCH),$(filter $(ARCH),x86 mips ppc arm sparc arc))
23+ifneq ($(ARCH),$(filter $(ARCH),x86 mips ppc arm sparc arc riscv))
24 ifeq ($(CONFIG_RAYER_SPI), yes)
25 UNSUPPORTED_FEATURES += CONFIG_RAYER_SPI=yes
26 else
27diff --git a/hwaccess.h b/hwaccess.h
28index 5602c15..e79988a 100644
29--- a/hwaccess.h
30+++ b/hwaccess.h
31@@ -295,6 +295,10 @@ int libpayload_wrmsr(int addr, msr_t msr);
32
33 /* Non memory mapped I/O is not supported on ARC. */
34
35+#elif IS_RISCV
36+
37+/* Non memory mapped I/O is not supported on RISCV. */
38+
39 #else
40
41 #error Unknown architecture, please check if it supports PCI port IO.
42--
432.31.1
44
diff --git a/meta-oe/recipes-bsp/flashrom/flashrom_1.2.bb b/meta-oe/recipes-bsp/flashrom/flashrom_1.2.bb
index 4e0b2d4a8c..145a3cad02 100644
--- a/meta-oe/recipes-bsp/flashrom/flashrom_1.2.bb
+++ b/meta-oe/recipes-bsp/flashrom/flashrom_1.2.bb
@@ -6,6 +6,7 @@ LIC_FILES_CHKSUM = "file://COPYING;md5=751419260aa954499f7abaabaa882bbe"
6SRC_URI = "https://download.flashrom.org/releases/flashrom-v${PV}.tar.bz2 \ 6SRC_URI = "https://download.flashrom.org/releases/flashrom-v${PV}.tar.bz2 \
7 file://0001-typecast-enum-conversions-explicitly.patch \ 7 file://0001-typecast-enum-conversions-explicitly.patch \
8 file://meson-fixes.patch \ 8 file://meson-fixes.patch \
9 file://0001-flashrom-Mark-RISCV-as-non-memory-mapped-I-O-archite.patch \
9 " 10 "
10SRC_URI[md5sum] = "7f8e4b87087eb12ecee0fcc5445b4956" 11SRC_URI[md5sum] = "7f8e4b87087eb12ecee0fcc5445b4956"
11SRC_URI[sha256sum] = "e1f8d95881f5a4365dfe58776ce821dfcee0f138f75d0f44f8a3cd032d9ea42b" 12SRC_URI[sha256sum] = "e1f8d95881f5a4365dfe58776ce821dfcee0f138f75d0f44f8a3cd032d9ea42b"