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authorKoen Kooi <koen@dominion.thruhere.net>2010-11-02 22:03:58 +0100
committerKoen Kooi <koen@dominion.thruhere.net>2010-11-02 22:12:02 +0100
commitbe10a6b1321f250b1034c7d9d0a8ef18b296eef1 (patch)
tree9249025cbfbfbee4cc430d62b27f75301dd4dfde /recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99351.patch
parent93b28937ac67ba46d65f55637e42552e224aa7e2 (diff)
downloadmeta-openembedded-be10a6b1321f250b1034c7d9d0a8ef18b296eef1.tar.gz
angstrom-layers: meta-openembedded: replace poky gcc 4.5 sources with OE ones
This needs further investigation, but for now we can get the tested sources into the poky gcc harness Signed-off-by: Koen Kooi <k-kooi@ti.com>
Diffstat (limited to 'recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99351.patch')
-rw-r--r--recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99351.patch552
1 files changed, 552 insertions, 0 deletions
diff --git a/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99351.patch b/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99351.patch
new file mode 100644
index 0000000000..a1a2c2ad81
--- /dev/null
+++ b/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99351.patch
@@ -0,0 +1,552 @@
1 * config/arm/arm.c (arm_rtx_costs_1): Adjust cost for
2 CONST_VECTOR.
3 (arm_size_rtx_costs): Likewise.
4 (thumb2_size_rtx_costs): Likewise.
5 (neon_valid_immediate): Add a case for double 0.0.
6
7 gcc/testsuite/
8 * gcc.target/arm/neon-vdup-1.c: New test case.
9 * gcc.target/arm/neon-vdup-2.c: New test case.
10 * gcc.target/arm/neon-vdup-3.c: New test case.
11 * gcc.target/arm/neon-vdup-4.c: New test case.
12 * gcc.target/arm/neon-vdup-5.c: New test case.
13 * gcc.target/arm/neon-vdup-6.c: New test case.
14 * gcc.target/arm/neon-vdup-7.c: New test case.
15 * gcc.target/arm/neon-vdup-8.c: New test case.
16 * gcc.target/arm/neon-vdup-9.c: New test case.
17 * gcc.target/arm/neon-vdup-10.c: New test case.
18 * gcc.target/arm/neon-vdup-11.c: New test case.
19 * gcc.target/arm/neon-vdup-12.c: New test case.
20 * gcc.target/arm/neon-vdup-13.c: New test case.
21 * gcc.target/arm/neon-vdup-14.c: New test case.
22 * gcc.target/arm/neon-vdup-15.c: New test case.
23 * gcc.target/arm/neon-vdup-16.c: New test case.
24 * gcc.target/arm/neon-vdup-17.c: New test case.
25 * gcc.target/arm/neon-vdup-18.c: New test case.
26 * gcc.target/arm/neon-vdup-19.c: New test case.
27
282010-07-26 Julian Brown <julian@codesourcery.com>
29
30 Merge from Sourcery G++ 4.4:
31
32 Jie Zhang <jie@codesourcery.com>
33
34 Issue #7122
35
36 gcc/
37 * config/arm/vfp.md (movdf_vfp): Add load double 0.0 case.
38 (thumb2_movdf_vfp): Likewise. Require that one of the operands be a
39 register.
40
41=== modified file 'gcc/config/arm/arm.c'
42--- old/gcc/config/arm/arm.c 2010-08-13 10:55:28 +0000
43+++ new/gcc/config/arm/arm.c 2010-08-13 11:02:47 +0000
44@@ -7061,6 +7061,17 @@
45 *total = COSTS_N_INSNS (4);
46 return true;
47
48+ case CONST_VECTOR:
49+ if (TARGET_NEON
50+ && TARGET_HARD_FLOAT
51+ && outer == SET
52+ && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode))
53+ && neon_immediate_valid_for_move (x, mode, NULL, NULL))
54+ *total = COSTS_N_INSNS (1);
55+ else
56+ *total = COSTS_N_INSNS (4);
57+ return true;
58+
59 default:
60 *total = COSTS_N_INSNS (4);
61 return false;
62@@ -7301,6 +7312,17 @@
63 *total = COSTS_N_INSNS (4);
64 return true;
65
66+ case CONST_VECTOR:
67+ if (TARGET_NEON
68+ && TARGET_HARD_FLOAT
69+ && outer_code == SET
70+ && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode))
71+ && neon_immediate_valid_for_move (x, mode, NULL, NULL))
72+ *total = COSTS_N_INSNS (1);
73+ else
74+ *total = COSTS_N_INSNS (4);
75+ return true;
76+
77 case HIGH:
78 case LO_SUM:
79 /* We prefer constant pool entries to MOVW/MOVT pairs, so bump the
80@@ -7647,6 +7669,17 @@
81 *total = COSTS_WIDE_INSNS (4);
82 return true;
83
84+ case CONST_VECTOR:
85+ if (TARGET_NEON
86+ && TARGET_HARD_FLOAT
87+ && outer_code == SET
88+ && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode))
89+ && neon_immediate_valid_for_move (x, mode, NULL, NULL))
90+ *total = COSTS_WIDE_INSNS (1);
91+ else
92+ *total = COSTS_WIDE_INSNS (4);
93+ return true;
94+
95 case HIGH:
96 case LO_SUM:
97 /* We prefer constant pool entries to MOVW/MOVT pairs, so bump the
98@@ -8315,11 +8348,14 @@
99 vmov i64 17 aaaaaaaa bbbbbbbb cccccccc dddddddd
100 eeeeeeee ffffffff gggggggg hhhhhhhh
101 vmov f32 18 aBbbbbbc defgh000 00000000 00000000
102+ vmov f32 19 00000000 00000000 00000000 00000000
103
104 For case 18, B = !b. Representable values are exactly those accepted by
105 vfp3_const_double_index, but are output as floating-point numbers rather
106 than indices.
107
108+ For case 19, we will change it to vmov.i32 when assembling.
109+
110 Variants 0-5 (inclusive) may also be used as immediates for the second
111 operand of VORR/VBIC instructions.
112
113@@ -8362,7 +8398,7 @@
114 rtx el0 = CONST_VECTOR_ELT (op, 0);
115 REAL_VALUE_TYPE r0;
116
117- if (!vfp3_const_double_rtx (el0))
118+ if (!vfp3_const_double_rtx (el0) && el0 != CONST0_RTX (GET_MODE (el0)))
119 return -1;
120
121 REAL_VALUE_FROM_CONST_DOUBLE (r0, el0);
122@@ -8384,7 +8420,10 @@
123 if (elementwidth)
124 *elementwidth = 0;
125
126- return 18;
127+ if (el0 == CONST0_RTX (GET_MODE (el0)))
128+ return 19;
129+ else
130+ return 18;
131 }
132
133 /* Splat vector constant out into a byte vector. */
134
135=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-1.c'
136--- old/gcc/testsuite/gcc.target/arm/neon-vdup-1.c 1970-01-01 00:00:00 +0000
137+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-1.c 2010-08-13 11:02:47 +0000
138@@ -0,0 +1,17 @@
139+/* Test the optimization of `vdupq_n_f32' ARM Neon intrinsic. */
140+
141+/* { dg-do compile } */
142+/* { dg-require-effective-target arm_neon_ok } */
143+/* { dg-options "-O2" } */
144+/* { dg-add-options arm_neon } */
145+
146+#include <arm_neon.h>
147+
148+float32x4_t out_float32x4_t;
149+void test_vdupq_nf32 (void)
150+{
151+ out_float32x4_t = vdupq_n_f32 (0.0);
152+}
153+
154+/* { dg-final { scan-assembler "vmov\.f32\[ \]+\[qQ\]\[0-9\]+, #0\.0\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
155+/* { dg-final { cleanup-saved-temps } } */
156
157=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-10.c'
158--- old/gcc/testsuite/gcc.target/arm/neon-vdup-10.c 1970-01-01 00:00:00 +0000
159+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-10.c 2010-08-13 11:02:47 +0000
160@@ -0,0 +1,17 @@
161+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
162+
163+/* { dg-do compile } */
164+/* { dg-require-effective-target arm_neon_ok } */
165+/* { dg-options "-O2" } */
166+/* { dg-add-options arm_neon } */
167+
168+#include <arm_neon.h>
169+
170+uint32x4_t out_uint32x4_t;
171+void test_vdupq_nu32 (void)
172+{
173+ out_uint32x4_t = vdupq_n_u32 (~0x12000000);
174+}
175+
176+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #3992977407\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
177+/* { dg-final { cleanup-saved-temps } } */
178
179=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-11.c'
180--- old/gcc/testsuite/gcc.target/arm/neon-vdup-11.c 1970-01-01 00:00:00 +0000
181+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-11.c 2010-08-13 11:02:47 +0000
182@@ -0,0 +1,17 @@
183+/* Test the optimization of `vdupq_n_u16' ARM Neon intrinsic. */
184+
185+/* { dg-do compile } */
186+/* { dg-require-effective-target arm_neon_ok } */
187+/* { dg-options "-O2" } */
188+/* { dg-add-options arm_neon } */
189+
190+#include <arm_neon.h>
191+
192+uint16x8_t out_uint16x8_t;
193+void test_vdupq_nu16 (void)
194+{
195+ out_uint16x8_t = vdupq_n_u16 (0x12);
196+}
197+
198+/* { dg-final { scan-assembler "vmov\.i16\[ \]+\[qQ\]\[0-9\]+, #18\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
199+/* { dg-final { cleanup-saved-temps } } */
200
201=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-12.c'
202--- old/gcc/testsuite/gcc.target/arm/neon-vdup-12.c 1970-01-01 00:00:00 +0000
203+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-12.c 2010-08-13 11:02:47 +0000
204@@ -0,0 +1,17 @@
205+/* Test the optimization of `vdupq_n_u16' ARM Neon intrinsic. */
206+
207+/* { dg-do compile } */
208+/* { dg-require-effective-target arm_neon_ok } */
209+/* { dg-options "-O2" } */
210+/* { dg-add-options arm_neon } */
211+
212+#include <arm_neon.h>
213+
214+uint16x8_t out_uint16x8_t;
215+void test_vdupq_nu16 (void)
216+{
217+ out_uint16x8_t = vdupq_n_u16 (0x1200);
218+}
219+
220+/* { dg-final { scan-assembler "vmov\.i16\[ \]+\[qQ\]\[0-9\]+, #4608\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
221+/* { dg-final { cleanup-saved-temps } } */
222
223=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-13.c'
224--- old/gcc/testsuite/gcc.target/arm/neon-vdup-13.c 1970-01-01 00:00:00 +0000
225+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-13.c 2010-08-13 11:02:47 +0000
226@@ -0,0 +1,17 @@
227+/* Test the optimization of `vdupq_n_u16' ARM Neon intrinsic. */
228+
229+/* { dg-do compile } */
230+/* { dg-require-effective-target arm_neon_ok } */
231+/* { dg-options "-O2" } */
232+/* { dg-add-options arm_neon } */
233+
234+#include <arm_neon.h>
235+
236+uint16x8_t out_uint16x8_t;
237+void test_vdupq_nu16 (void)
238+{
239+ out_uint16x8_t = vdupq_n_u16 (~0x12);
240+}
241+
242+/* { dg-final { scan-assembler "vmov\.i16\[ \]+\[qQ\]\[0-9\]+, #65517\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
243+/* { dg-final { cleanup-saved-temps } } */
244
245=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-14.c'
246--- old/gcc/testsuite/gcc.target/arm/neon-vdup-14.c 1970-01-01 00:00:00 +0000
247+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-14.c 2010-08-13 11:02:47 +0000
248@@ -0,0 +1,17 @@
249+/* Test the optimization of `vdupq_n_u16' ARM Neon intrinsic. */
250+
251+/* { dg-do compile } */
252+/* { dg-require-effective-target arm_neon_ok } */
253+/* { dg-options "-O2" } */
254+/* { dg-add-options arm_neon } */
255+
256+#include <arm_neon.h>
257+
258+uint16x8_t out_uint16x8_t;
259+void test_vdupq_nu16 (void)
260+{
261+ out_uint16x8_t = vdupq_n_u16 (~0x1200);
262+}
263+
264+/* { dg-final { scan-assembler "vmov\.i16\[ \]+\[qQ\]\[0-9\]+, #60927\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
265+/* { dg-final { cleanup-saved-temps } } */
266
267=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-15.c'
268--- old/gcc/testsuite/gcc.target/arm/neon-vdup-15.c 1970-01-01 00:00:00 +0000
269+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-15.c 2010-08-13 11:02:47 +0000
270@@ -0,0 +1,17 @@
271+/* Test the optimization of `vdupq_n_u8' ARM Neon intrinsic. */
272+
273+/* { dg-do compile } */
274+/* { dg-require-effective-target arm_neon_ok } */
275+/* { dg-options "-O2" } */
276+/* { dg-add-options arm_neon } */
277+
278+#include <arm_neon.h>
279+
280+uint8x16_t out_uint8x16_t;
281+void test_vdupq_nu8 (void)
282+{
283+ out_uint8x16_t = vdupq_n_u8 (0x12);
284+}
285+
286+/* { dg-final { scan-assembler "vmov\.i8\[ \]+\[qQ\]\[0-9\]+, #18\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
287+/* { dg-final { cleanup-saved-temps } } */
288
289=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-16.c'
290--- old/gcc/testsuite/gcc.target/arm/neon-vdup-16.c 1970-01-01 00:00:00 +0000
291+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-16.c 2010-08-13 11:02:47 +0000
292@@ -0,0 +1,17 @@
293+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
294+
295+/* { dg-do compile } */
296+/* { dg-require-effective-target arm_neon_ok } */
297+/* { dg-options "-O2" } */
298+/* { dg-add-options arm_neon } */
299+
300+#include <arm_neon.h>
301+
302+uint32x4_t out_uint32x4_t;
303+void test_vdupq_nu32 (void)
304+{
305+ out_uint32x4_t = vdupq_n_u32 (0x12ff);
306+}
307+
308+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4863\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
309+/* { dg-final { cleanup-saved-temps } } */
310
311=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-17.c'
312--- old/gcc/testsuite/gcc.target/arm/neon-vdup-17.c 1970-01-01 00:00:00 +0000
313+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-17.c 2010-08-13 11:02:47 +0000
314@@ -0,0 +1,17 @@
315+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
316+
317+/* { dg-do compile } */
318+/* { dg-require-effective-target arm_neon_ok } */
319+/* { dg-options "-O2" } */
320+/* { dg-add-options arm_neon } */
321+
322+#include <arm_neon.h>
323+
324+uint32x4_t out_uint32x4_t;
325+void test_vdupq_nu32 (void)
326+{
327+ out_uint32x4_t = vdupq_n_u32 (0x12ffff);
328+}
329+
330+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #1245183\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
331+/* { dg-final { cleanup-saved-temps } } */
332
333=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-18.c'
334--- old/gcc/testsuite/gcc.target/arm/neon-vdup-18.c 1970-01-01 00:00:00 +0000
335+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-18.c 2010-08-13 11:02:47 +0000
336@@ -0,0 +1,17 @@
337+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
338+
339+/* { dg-do compile } */
340+/* { dg-require-effective-target arm_neon_ok } */
341+/* { dg-options "-O2" } */
342+/* { dg-add-options arm_neon } */
343+
344+#include <arm_neon.h>
345+
346+uint32x4_t out_uint32x4_t;
347+void test_vdupq_nu32 (void)
348+{
349+ out_uint32x4_t = vdupq_n_u32 (~0x12ff);
350+}
351+
352+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4294962432\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
353+/* { dg-final { cleanup-saved-temps } } */
354
355=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-19.c'
356--- old/gcc/testsuite/gcc.target/arm/neon-vdup-19.c 1970-01-01 00:00:00 +0000
357+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-19.c 2010-08-13 11:02:47 +0000
358@@ -0,0 +1,17 @@
359+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
360+
361+/* { dg-do compile } */
362+/* { dg-require-effective-target arm_neon_ok } */
363+/* { dg-options "-O2" } */
364+/* { dg-add-options arm_neon } */
365+
366+#include <arm_neon.h>
367+
368+uint32x4_t out_uint32x4_t;
369+void test_vdupq_nu32 (void)
370+{
371+ out_uint32x4_t = vdupq_n_u32 (~0x12ffff);
372+}
373+
374+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4293722112\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
375+/* { dg-final { cleanup-saved-temps } } */
376
377=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-2.c'
378--- old/gcc/testsuite/gcc.target/arm/neon-vdup-2.c 1970-01-01 00:00:00 +0000
379+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-2.c 2010-08-13 11:02:47 +0000
380@@ -0,0 +1,17 @@
381+/* Test the optimization of `vdupq_n_f32' ARM Neon intrinsic. */
382+
383+/* { dg-do compile } */
384+/* { dg-require-effective-target arm_neon_ok } */
385+/* { dg-options "-O2" } */
386+/* { dg-add-options arm_neon } */
387+
388+#include <arm_neon.h>
389+
390+float32x4_t out_float32x4_t;
391+void test_vdupq_nf32 (void)
392+{
393+ out_float32x4_t = vdupq_n_f32 (0.125);
394+}
395+
396+/* { dg-final { scan-assembler "vmov\.f32\[ \]+\[qQ\]\[0-9\]+, #1\.25e-1\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
397+/* { dg-final { cleanup-saved-temps } } */
398
399=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-3.c'
400--- old/gcc/testsuite/gcc.target/arm/neon-vdup-3.c 1970-01-01 00:00:00 +0000
401+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-3.c 2010-08-13 11:02:47 +0000
402@@ -0,0 +1,17 @@
403+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
404+
405+/* { dg-do compile } */
406+/* { dg-require-effective-target arm_neon_ok } */
407+/* { dg-options "-O2" } */
408+/* { dg-add-options arm_neon } */
409+
410+#include <arm_neon.h>
411+
412+uint32x4_t out_uint32x4_t;
413+void test_vdupq_nu32 (void)
414+{
415+ out_uint32x4_t = vdupq_n_u32 (0x12);
416+}
417+
418+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #18\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
419+/* { dg-final { cleanup-saved-temps } } */
420
421=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-4.c'
422--- old/gcc/testsuite/gcc.target/arm/neon-vdup-4.c 1970-01-01 00:00:00 +0000
423+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-4.c 2010-08-13 11:02:47 +0000
424@@ -0,0 +1,17 @@
425+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
426+
427+/* { dg-do compile } */
428+/* { dg-require-effective-target arm_neon_ok } */
429+/* { dg-options "-O2" } */
430+/* { dg-add-options arm_neon } */
431+
432+#include <arm_neon.h>
433+
434+uint32x4_t out_uint32x4_t;
435+void test_vdupq_nu32 (void)
436+{
437+ out_uint32x4_t = vdupq_n_u32 (0x1200);
438+}
439+
440+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4608\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
441+/* { dg-final { cleanup-saved-temps } } */
442
443=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-5.c'
444--- old/gcc/testsuite/gcc.target/arm/neon-vdup-5.c 1970-01-01 00:00:00 +0000
445+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-5.c 2010-08-13 11:02:47 +0000
446@@ -0,0 +1,17 @@
447+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
448+
449+/* { dg-do compile } */
450+/* { dg-require-effective-target arm_neon_ok } */
451+/* { dg-options "-O2" } */
452+/* { dg-add-options arm_neon } */
453+
454+#include <arm_neon.h>
455+
456+uint32x4_t out_uint32x4_t;
457+void test_vdupq_nu32 (void)
458+{
459+ out_uint32x4_t = vdupq_n_u32 (0x120000);
460+}
461+
462+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #1179648\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
463+/* { dg-final { cleanup-saved-temps } } */
464
465=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-6.c'
466--- old/gcc/testsuite/gcc.target/arm/neon-vdup-6.c 1970-01-01 00:00:00 +0000
467+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-6.c 2010-08-13 11:02:47 +0000
468@@ -0,0 +1,17 @@
469+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
470+
471+/* { dg-do compile } */
472+/* { dg-require-effective-target arm_neon_ok } */
473+/* { dg-options "-O2" } */
474+/* { dg-add-options arm_neon } */
475+
476+#include <arm_neon.h>
477+
478+uint32x4_t out_uint32x4_t;
479+void test_vdupq_nu32 (void)
480+{
481+ out_uint32x4_t = vdupq_n_u32 (0x12000000);
482+}
483+
484+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #301989888\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
485+/* { dg-final { cleanup-saved-temps } } */
486
487=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-7.c'
488--- old/gcc/testsuite/gcc.target/arm/neon-vdup-7.c 1970-01-01 00:00:00 +0000
489+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-7.c 2010-08-13 11:02:47 +0000
490@@ -0,0 +1,17 @@
491+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
492+
493+/* { dg-do compile } */
494+/* { dg-require-effective-target arm_neon_ok } */
495+/* { dg-options "-O2" } */
496+/* { dg-add-options arm_neon } */
497+
498+#include <arm_neon.h>
499+
500+uint32x4_t out_uint32x4_t;
501+void test_vdupq_nu32 (void)
502+{
503+ out_uint32x4_t = vdupq_n_u32 (~0x12);
504+}
505+
506+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4294967277\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
507+/* { dg-final { cleanup-saved-temps } } */
508
509=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-8.c'
510--- old/gcc/testsuite/gcc.target/arm/neon-vdup-8.c 1970-01-01 00:00:00 +0000
511+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-8.c 2010-08-13 11:02:47 +0000
512@@ -0,0 +1,17 @@
513+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
514+
515+/* { dg-do compile } */
516+/* { dg-require-effective-target arm_neon_ok } */
517+/* { dg-options "-O2" } */
518+/* { dg-add-options arm_neon } */
519+
520+#include <arm_neon.h>
521+
522+uint32x4_t out_uint32x4_t;
523+void test_vdupq_nu32 (void)
524+{
525+ out_uint32x4_t = vdupq_n_u32 (~0x1200);
526+}
527+
528+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4294962687\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
529+/* { dg-final { cleanup-saved-temps } } */
530
531=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-9.c'
532--- old/gcc/testsuite/gcc.target/arm/neon-vdup-9.c 1970-01-01 00:00:00 +0000
533+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-9.c 2010-08-13 11:02:47 +0000
534@@ -0,0 +1,17 @@
535+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
536+
537+/* { dg-do compile } */
538+/* { dg-require-effective-target arm_neon_ok } */
539+/* { dg-options "-O2" } */
540+/* { dg-add-options arm_neon } */
541+
542+#include <arm_neon.h>
543+
544+uint32x4_t out_uint32x4_t;
545+void test_vdupq_nu32 (void)
546+{
547+ out_uint32x4_t = vdupq_n_u32 (~0x120000);
548+}
549+
550+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4293787647\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
551+/* { dg-final { cleanup-saved-temps } } */
552
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-10-04 06:22:52 +0000