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-rw-r--r--recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99413.patch26
1 files changed, 26 insertions, 0 deletions
diff --git a/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99413.patch b/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99413.patch
new file mode 100644
index 0000000000..3f873e7fe6
--- /dev/null
+++ b/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99413.patch
@@ -0,0 +1,26 @@
12010-10-13 Chung-Lin Tang <cltang@codesourcery.com>
2
3 Backport from mainline:
4
5 2010-04-20 James E. Wilson <wilson@codesourcery.com>
6
7 gcc/
8 PR rtl-optimization/43520
9 * ira-lives.c (ira_implicitly_set_insn_hard_regs): Exclude classes with
10 zero available registers.
11
12=== modified file 'gcc/ira-lives.c'
13Index: gcc-4.5/gcc/ira-lives.c
14===================================================================
15--- gcc-4.5.orig/gcc/ira-lives.c
16+++ gcc-4.5/gcc/ira-lives.c
17@@ -805,6 +805,9 @@ ira_implicitly_set_insn_hard_regs (HARD_
18 ? GENERAL_REGS
19 : REG_CLASS_FROM_CONSTRAINT (c, p));
20 if (cl != NO_REGS
21+ /* There is no register pressure problem if all of the
22+ regs in this class are fixed. */
23+ && ira_available_class_regs[cl] != 0
24 && (ira_available_class_regs[cl]
25 <= ira_reg_class_nregs[cl][mode]))
26 IOR_HARD_REG_SET (*set, reg_class_contents[cl]);