diff options
Diffstat (limited to 'recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99454.patch')
| -rw-r--r-- | recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99454.patch | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99454.patch b/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99454.patch new file mode 100644 index 0000000000..8aa06cc510 --- /dev/null +++ b/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99454.patch | |||
| @@ -0,0 +1,46 @@ | |||
| 1 | 2010-12-18 Andrew Stubbs <ams@codesourcery.com> | ||
| 2 | |||
| 3 | Backport from mainline: | ||
| 4 | |||
| 5 | gcc/ | ||
| 6 | 2010-12-17 Andrew Stubbs <ams@codesourcery.com> | ||
| 7 | |||
| 8 | * config/arm/arm.md (maddhisi4, *maddhidi4): Use the canonical | ||
| 9 | operand order for plus. | ||
| 10 | Drop redundant % from constraints. | ||
| 11 | |||
| 12 | === modified file 'gcc/config/arm/arm.md' | ||
| 13 | --- old/gcc/config/arm/arm.md 2010-11-11 11:12:14 +0000 | ||
| 14 | +++ new/gcc/config/arm/arm.md 2011-01-05 11:42:19 +0000 | ||
| 15 | @@ -1791,11 +1791,11 @@ | ||
| 16 | |||
| 17 | (define_insn "maddhisi4" | ||
| 18 | [(set (match_operand:SI 0 "s_register_operand" "=r") | ||
| 19 | - (plus:SI (match_operand:SI 3 "s_register_operand" "r") | ||
| 20 | - (mult:SI (sign_extend:SI | ||
| 21 | - (match_operand:HI 1 "s_register_operand" "%r")) | ||
| 22 | + (plus:SI (mult:SI (sign_extend:SI | ||
| 23 | + (match_operand:HI 1 "s_register_operand" "r")) | ||
| 24 | (sign_extend:SI | ||
| 25 | - (match_operand:HI 2 "s_register_operand" "r")))))] | ||
| 26 | + (match_operand:HI 2 "s_register_operand" "r"))) | ||
| 27 | + (match_operand:SI 3 "s_register_operand" "r")))] | ||
| 28 | "TARGET_DSP_MULTIPLY" | ||
| 29 | "smlabb%?\\t%0, %1, %2, %3" | ||
| 30 | [(set_attr "insn" "smlaxy") | ||
| 31 | @@ -1805,11 +1805,11 @@ | ||
| 32 | (define_insn "*maddhidi4" | ||
| 33 | [(set (match_operand:DI 0 "s_register_operand" "=r") | ||
| 34 | (plus:DI | ||
| 35 | - (match_operand:DI 3 "s_register_operand" "0") | ||
| 36 | (mult:DI (sign_extend:DI | ||
| 37 | - (match_operand:HI 1 "s_register_operand" "%r")) | ||
| 38 | + (match_operand:HI 1 "s_register_operand" "r")) | ||
| 39 | (sign_extend:DI | ||
| 40 | - (match_operand:HI 2 "s_register_operand" "r")))))] | ||
| 41 | + (match_operand:HI 2 "s_register_operand" "r"))) | ||
| 42 | + (match_operand:DI 3 "s_register_operand" "0")))] | ||
| 43 | "TARGET_DSP_MULTIPLY" | ||
| 44 | "smlalbb%?\\t%Q0, %R0, %1, %2" | ||
| 45 | [(set_attr "insn" "smlalxy") | ||
| 46 | |||