From 31cceea813c806ca8b4f14de305b2ebc53fdf426 Mon Sep 17 00:00:00 2001 From: Chris Patterson Date: Wed, 4 Feb 2015 17:18:53 +1000 Subject: xen: break out firmware bits Added recipes for various xen firmware components: - ipxe - seabios - vgabios Signed-off-by: Chris Patterson Signed-off-by: Eric Chanudet Signed-off-by: Nathan Rossi --- recipes-extended/seabios/seabios/defconfig | 102 ++++++++++++++++++++++++++ recipes-extended/seabios/seabios/hostcc.patch | 21 ++++++ recipes-extended/seabios/seabios_1.7.5.bb | 46 ++++++++++++ 3 files changed, 169 insertions(+) create mode 100644 recipes-extended/seabios/seabios/defconfig create mode 100644 recipes-extended/seabios/seabios/hostcc.patch create mode 100644 recipes-extended/seabios/seabios_1.7.5.bb (limited to 'recipes-extended/seabios') diff --git a/recipes-extended/seabios/seabios/defconfig b/recipes-extended/seabios/seabios/defconfig new file mode 100644 index 00000000..d4474bab --- /dev/null +++ b/recipes-extended/seabios/seabios/defconfig @@ -0,0 +1,102 @@ +# +# Automatically generated make config: don't edit +# SeaBIOS Configuration +# Wed Sep 18 14:08:45 2013 +# + +# +# General Features +# +# CONFIG_COREBOOT is not set +CONFIG_QEMU=y +# CONFIG_CSM is not set +CONFIG_QEMU_HARDWARE=y +CONFIG_XEN=y +CONFIG_THREADS=y +# CONFIG_THREAD_OPTIONROMS is not set +CONFIG_RELOCATE_INIT=y +CONFIG_BOOTMENU=y +# CONFIG_BOOTSPLASH is not set +CONFIG_BOOTORDER=y +# CONFIG_ENTRY_EXTRASTACK is not set + +# +# Hardware support +# +CONFIG_ATA=y +# CONFIG_ATA_DMA is not set +# CONFIG_ATA_PIO32 is not set +CONFIG_AHCI=y +CONFIG_VIRTIO_BLK=y +CONFIG_VIRTIO_SCSI=y +CONFIG_ESP_SCSI=y +CONFIG_LSI_SCSI=y +CONFIG_MEGASAS=y +CONFIG_FLOPPY=y +CONFIG_PS2PORT=y +CONFIG_USB=y +CONFIG_USB_UHCI=y +CONFIG_USB_OHCI=y +CONFIG_USB_EHCI=y +CONFIG_USB_MSC=y +CONFIG_USB_UAS=y +CONFIG_USB_HUB=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_MOUSE=y +CONFIG_SERIAL=y +CONFIG_LPT=y +# CONFIG_USE_SMM is not set +CONFIG_MTRR_INIT=y +CONFIG_PMTIMER=y + +# +# BIOS interfaces +# +CONFIG_DRIVES=y +CONFIG_CDROM_BOOT=y +CONFIG_CDROM_EMU=y +CONFIG_PCIBIOS=y +CONFIG_APMBIOS=y +CONFIG_PNPBIOS=y +CONFIG_OPTIONROMS=y +CONFIG_OPTIONROMS_DEPLOYED=y +CONFIG_PMM=y +CONFIG_BOOT=y +CONFIG_KEYBOARD=y +CONFIG_KBD_CALL_INT15_4F=y +CONFIG_MOUSE=y +CONFIG_S3_RESUME=y +CONFIG_VGAHOOKS=y +# CONFIG_DISABLE_A20 is not set + +# +# BIOS Tables +# +# CONFIG_PIRTABLE is not set +# CONFIG_MPTABLE is not set +# CONFIG_SMBIOS is not set +# CONFIG_ACPI is not set + +# +# VGA ROM +# +# CONFIG_NO_VGABIOS is not set +# CONFIG_VGA_STANDARD_VGA is not set +# CONFIG_VGA_CIRRUS is not set +# CONFIG_VGA_BOCHS is not set +# CONFIG_VGA_GEODEGX2 is not set +# CONFIG_VGA_GEODELX is not set +# CONFIG_VGA_XENGFX is not set +# CONFIG_BUILD_VGABIOS is not set +# CONFIG_VGA_VBE is not set +# CONFIG_VGA_PCI is not set +# CONFIG_OVERRIDE_PCI_ID is not set +# CONFIG_VGA_VID=0x5853 +# CONFIG_VGA_DID=0xC147 + +# +# Debugging +# +CONFIG_DEBUG_LEVEL=2 +# CONFIG_DEBUG_SERIAL is not set +CONFIG_DEBUG_IO=y diff --git a/recipes-extended/seabios/seabios/hostcc.patch b/recipes-extended/seabios/seabios/hostcc.patch new file mode 100644 index 00000000..f665e1a3 --- /dev/null +++ b/recipes-extended/seabios/seabios/hostcc.patch @@ -0,0 +1,21 @@ +diff -ur a/Makefile b/Makefile +--- a/Makefile 2015-02-02 22:02:58.651041951 -0500 ++++ b/Makefile 2015-02-02 23:08:13.884514003 -0500 +@@ -8,7 +8,7 @@ + OUT=out/ + + # Common command definitions +-export HOSTCC := $(CC) ++export HOSTCC ?= $(CC) + export CONFIG_SHELL := sh + export KCONFIG_AUTOHEADER := autoconf.h + export KCONFIG_CONFIG := $(CURDIR)/.config +@@ -22,7 +22,7 @@ + OBJDUMP=$(CROSS_PREFIX)objdump + STRIP=$(CROSS_PREFIX)strip + PYTHON=python +-CPP=cpp ++CPP=$(CROSS_PREFIX)cpp + IASL:=iasl + LD32BIT_FLAG:=-melf_i386 + diff --git a/recipes-extended/seabios/seabios_1.7.5.bb b/recipes-extended/seabios/seabios_1.7.5.bb new file mode 100644 index 00000000..5ff00045 --- /dev/null +++ b/recipes-extended/seabios/seabios_1.7.5.bb @@ -0,0 +1,46 @@ +DESCRIPTION = "SeaBIOS" +HOMEPAGE = "http://www.coreboot.org/SeaBIOS" +LICENSE = "LGPLv3" +SECTION = "firmware" + +SRC_URI = " \ + http://code.coreboot.org/p/seabios/downloads/get/${PN}-${PV}.tar.gz \ + file://hostcc.patch \ + file://defconfig \ + " + +LIC_FILES_CHKSUM = "file://COPYING;md5=d32239bcb673463ab874e80d47fae504 \ + file://COPYING.LESSER;md5=6a6a8e020838b23406c81b19c1d46df6 \ + " + +SRC_URI[md5sum] = "3f1e17485ca327b245ae5938d9aa02d9" +SRC_URI[sha256sum] = "858d9eda4ad91efa1c45a5a401d560ef9ca8dd172f03b0a106f06661c252dc51" + +PR = "r0" + +FILES_${PN} = "/usr/share/firmware" + +DEPENDS = "util-linux-native file-native bison-native flex-native gettext-native iasl-native python-native" + +TUNE_CCARGS = "" +PARALLEL_MAKE = "" +export HOSTCC="${BUILD_CC}" +export CROSS_PREFIX="${TARGET_PREFIX}" + +do_configure() { + install -m 0644 "${WORKDIR}/defconfig" .config + oe_runmake oldconfig +} + +do_compile() { + unset CPP + unset CPPFLAGS + oe_runmake +} + +do_install() { + oe_runmake + install -d ${D}/usr/share/firmware + install -m 0644 out/bios.bin ${D}/usr/share/firmware/ +} + -- cgit v1.2.3-54-g00ecf