u-boot-extra.inc: Retire use of this configuration framework

This is only used by MicroBlaze targets for U-Boot, and due to U-Boot
moving to Device Model this is no longer sufficent to configure U-Boot.
Instead support for MicroBlaze must be added by patches to U-Boot with
partial DM and xparameters support.

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>

4 files changed, 0 insertions, 102 deletions

diff --git a/conf/machine/boards/kc705/kc705-trd-microblazeel.xparameters.h b/conf/machine/boards/kc705/kc705-trd-microblazeel.xparameters.h
deleted file mode 100644
index 994a26e6..00000000
--- a/conf/machine/boards/kc705/kc705-trd-microblazeel.xparameters.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/* Microblaze is microblaze_0 */
-#define XILINX_USE_MSR_INSTR    1
-#define XILINX_PVR              2
-#define XILINX_FSL_NUMBER       0
-#define XILINX_USE_ICACHE       1
-#define XILINX_USE_DCACHE       1
-#define XILINX_DCACHE_BYTE_SIZE 8192
-
-/* Interrupt controller is interrupt_cntlr */
-#define XILINX_INTC_BASEADDR            0x40100000
-#define XILINX_INTC_NUM_INTR_INPUTS     8
-
-/* Timer pheriphery is dual_timer_counter */
-#define XILINX_TIMER_BASEADDR   0x40300000
-#define XILINX_TIMER_IRQ        3
-
-/* System Timer Clock Frequency */
-#define XILINX_CLOCK_FREQ       100000000
-
-/* Uart console is rs232_uart_1 */
-#define XILINX_UART16550
-#define XILINX_UART16550_BASEADDR       0x40400000
-#define XILINX_UART16550_CLOCK_HZ       100000000
-#define XILINX_UARTLITE_BASEADDR        0x40200000
-#define CONFIG_CONS_INDEX               1
-
-/* IIC pheriphery is iic_eeprom */
-#define XILINX_IIC_0_BASEADDR   0x40a00000
-#define XILINX_IIC_0_FREQ       100000
-#define XILINX_IIC_0_BIT        0
-
-/* GPIO doesn't exist */
-
-/* SDIO doesn't exist */
-
-/* Main Memory is ddr3_sdram */
-#define XILINX_RAM_START        0x80000000
-#define XILINX_RAM_SIZE         0x40000000
-
-/* Flash Memory is linear_flash */
-#define XILINX_FLASH_START      0x48000000
-#define XILINX_FLASH_SIZE       0x08000000
-
-/* Sysace doesn't exist */
-
-/* Ethernet controller is soft_ethernet_mac */
-#define XILINX_AXIEMAC_BASEADDR                 0x50100000
-#define XILINX_AXIDMA_BASEADDR                  0x50000000
diff --git a/conf/machine/kc705-trd-microblazeel.conf b/conf/machine/kc705-trd-microblazeel.conf
index 9c35a3df..bcc18b76 100644
--- a/conf/machine/kc705-trd-microblazeel.conf
+++ b/conf/machine/kc705-trd-microblazeel.conf
@@ -23,7 +23,6 @@ USE_VT = ""
 SERIAL_CONSOLE = "115200 ttyS0"
 
 MACHINE_DEVICETREE := "kc705/kc705-trd-microblazeel.dts"
-MACHINE_XPARAMETERS := "kc705/kc705-trd-microblazeel.xparameters.h"
 
 EXTRA_IMAGEDEPENDS += "virtual/bitstream"
 
diff --git a/recipes-bsp/u-boot/u-boot-extra.inc b/recipes-bsp/u-boot/u-boot-extra.inc
deleted file mode 100644
index ff824d85..00000000
--- a/recipes-bsp/u-boot/u-boot-extra.inc
+++ /dev/null
@@ -1,52 +0,0 @@
-
-inherit xilinx-utils
-
-# Appends the '<layer>/conf/machine/boards' path to FILESEXTRAPATHS for all
-# layers (using the ${BBPATH})
-FILESEXTRAPATHS_append := "${@get_additional_bbpath_filespath('conf/machine/boards', d)}"
-
-# Append the xparameters file to the SRC_URI if set
-SRC_URI_append = " ${@paths_affix(d.getVar("MACHINE_XPARAMETERS", True) or '', prefix = 'file://')}"
-
-# Full path to the xparameters.h file
-UBOOT_XPARAMETERS ?= "${@expand_workdir_paths("MACHINE_XPARAMETERS", d)}"
-
-# Install the MicroBlaze System configuration into the board configuration,
-# and generate a u-boot specific config.mk
-python do_configmk_generate () {
-    import re, sys, os, shutil
-
-    machine_xparameters = d.getVar("UBOOT_XPARAMETERS", True)
-
-    if machine_xparameters and os.path.exists(machine_xparameters):
-        boardpath = os.path.join("board", "xilinx", "microblaze-generic")
-        configmk = os.path.join(d.getVar("S", True), boardpath, "config.mk")
-        xparameters = os.path.join(d.getVar("S", True), boardpath, "xparameters.h")
-
-        shutil.copyfile(machine_xparameters, xparameters)
-
-        # Search the xparameters.h file for the RAM base addr and size.
-        ram = None
-        with open(machine_xparameters, "r") as f:
-            filedata = f.read()
-            ramstart = re.search("XILINX_RAM_START.*?(0x.*)", filedata)
-            ramsize = re.search("XILINX_RAM_SIZE.*?(0x.*)", filedata)
-            if ramstart and ramsize:
-                ram = (int(ramstart.group(1), 16), int(ramsize.group(1), 16))
-
-        # build up the config.mk file from known info
-        with open(configmk, "wb") as f:
-            f.write("# This file is generated by the meta-xilinx layers.\n")
-            f.write("\n")
-
-            for i in d.getVar("TUNE_CCARGS", True).split():
-                f.write("PLATFORM_CCPFLAGS += %s\n" % i)
-            f.write("\n")
-
-            if ram != None:
-                base_offset = ram[0] + ram[1] - 0x400000
-                f.write("TEXT_BASE = 0x%x\n" % base_offset)
-                f.write("CONFIG_SYS_TEXT_BASE = 0x%x\n" % base_offset)
-}
-addtask configmk_generate before do_configure after do_unpack
-
diff --git a/recipes-bsp/u-boot/u-boot-xlnx-dev.bb b/recipes-bsp/u-boot/u-boot-xlnx-dev.bb
index 9fa22fed..50bbf543 100644
--- a/recipes-bsp/u-boot/u-boot-xlnx-dev.bb
+++ b/recipes-bsp/u-boot/u-boot-xlnx-dev.bb
@@ -7,7 +7,6 @@
 UBRANCH ?= "master"
 
 include u-boot-xlnx.inc
-include u-boot-extra.inc
 include u-boot-spl-zynq-init.inc
 
 LIC_FILES_CHKSUM = "file://README;beginline=1;endline=6;md5=157ab8408beab40cd8ce1dc69f702a6c"