diff options
author | Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com> | 2024-12-11 18:19:42 -0700 |
---|---|---|
committer | Mark Hatle <mark.hatle@amd.com> | 2025-03-30 14:16:06 -0600 |
commit | 132f93718841f4b177c79a953075e6c038cdc0f3 (patch) | |
tree | 82522201edd8ea7006c2e4faddaacf6588c326c6 | |
parent | cca59d47d3040289b99a2e5f816abcb14047e456 (diff) | |
download | meta-xilinx-132f93718841f4b177c79a953075e6c038cdc0f3.tar.gz |
u-boot-xlnx-scr: Adjusted to use an intermediate default
Adjusted to use an intermediate default for KERNEL, DEVICETREE and
RAMDISK image offsets, so no override is required.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-rw-r--r-- | meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr.bb | 51 |
1 files changed, 30 insertions, 21 deletions
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr.bb index e13413a1..24fd76c0 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr.bb +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr.bb | |||
@@ -73,17 +73,21 @@ UBOOTPXE_CONFIG_NAME = "${UBOOTPXE_CONFIG}${IMAGE_VERSION_SUFFIX}" | |||
73 | DEVICETREE_ADDRESS ?= "${@append_baseaddr(d,d.getVar('DEVICETREE_OFFSET'))}" | 73 | DEVICETREE_ADDRESS ?= "${@append_baseaddr(d,d.getVar('DEVICETREE_OFFSET'))}" |
74 | DEVICETREE_ADDRESS_SD ?= "${DEVICETREE_ADDRESS}" | 74 | DEVICETREE_ADDRESS_SD ?= "${DEVICETREE_ADDRESS}" |
75 | 75 | ||
76 | DEVICETREE_OFFSET:microblaze ??= "0x1e00000" | 76 | DEVICETREE_OFFSET_DEFAULT ??= "" |
77 | DEVICETREE_OFFSET:zynqmp ??= "0x100000" | 77 | DEVICETREE_OFFSET_DEFAULT:microblaze ??= "0x1e00000" |
78 | DEVICETREE_OFFSET:zynq ??= "0x100000" | 78 | DEVICETREE_OFFSET_DEFAULT:zynqmp ??= "0x100000" |
79 | DEVICETREE_OFFSET:versal ??= "0x1000" | 79 | DEVICETREE_OFFSET_DEFAULT:zynq ??= "0x100000" |
80 | DEVICETREE_OFFSET:versal-net ??= "0x1000" | 80 | DEVICETREE_OFFSET_DEFAULT:versal ??= "0x1000" |
81 | 81 | DEVICETREE_OFFSET_DEFAULT:versal-net ??= "0x1000" | |
82 | DEVICETREE_OVERLAY_OFFSET:microblaze ??= "0x1e00000" | 82 | DEVICETREE_OFFSET ??= "${DEVICETREE_OFFSET_DEFAULT}" |
83 | DEVICETREE_OVERLAY_OFFSET:zynqmp ??= "0x100000" | 83 | |
84 | DEVICETREE_OVERLAY_OFFSET:zynq ??= "0x100000" | 84 | DEVICETREE_OVERLAY_OFFSET_DEFAULT ??= "" |
85 | DEVICETREE_OVERLAY_OFFSET:versal ??= "0x1000" | 85 | DEVICETREE_OVERLAY_OFFSET_DEFAULT:microblaze ??= "0x1e00000" |
86 | DEVICETREE_OVERLAY_OFFSET:versal-net ??= "0x1000" | 86 | DEVICETREE_OVERLAY_OFFSET_DEFAULT:zynqmp ??= "0x100000" |
87 | DEVICETREE_OVERLAY_OFFSET_DEFAULT:zynq ??= "0x100000" | ||
88 | DEVICETREE_OVERLAY_OFFSET_DEFAULT:versal ??= "0x1000" | ||
89 | DEVICETREE_OVERLAY_OFFSET_DEFAULT:versal-net ??= "0x1000" | ||
90 | DEVICETREE_OVERLAY_OFFSET ??= "${DEVICETREE_OVERLAY_OFFSET_DEFAULT}" | ||
87 | DEVICETREE_OVERLAY_PADSIZE ??= "0x1f00000" | 91 | DEVICETREE_OVERLAY_PADSIZE ??= "0x1f00000" |
88 | 92 | ||
89 | DEVICETREE_OVERLAY_ADDRESS ?= "${@hex(int(append_baseaddr(d,d.getVar('DEVICETREE_OVERLAY_OFFSET')),16) \ | 93 | DEVICETREE_OVERLAY_ADDRESS ?= "${@hex(int(append_baseaddr(d,d.getVar('DEVICETREE_OVERLAY_OFFSET')),16) \ |
@@ -91,21 +95,26 @@ DEVICETREE_OVERLAY_ADDRESS ?= "${@hex(int(append_baseaddr(d,d.getVar('DEVICETREE | |||
91 | 95 | ||
92 | KERNEL_LOAD_ADDRESS ?= "${@append_baseaddr(d,d.getVar('KERNEL_OFFSET'))}" | 96 | KERNEL_LOAD_ADDRESS ?= "${@append_baseaddr(d,d.getVar('KERNEL_OFFSET'))}" |
93 | 97 | ||
94 | KERNEL_OFFSET:microblaze ??= "0x0" | 98 | |
95 | KERNEL_OFFSET:zynqmp ??= "0x200000" | 99 | KERNEL_OFFSET_DEFAULT ??= "" |
96 | KERNEL_OFFSET:zynq ??= "0x200000" | 100 | KERNEL_OFFSET_DEFAULT:microblaze ??= "0x0" |
97 | KERNEL_OFFSET:versal ??= "0x200000" | 101 | KERNEL_OFFSET_DEFAULT:zynqmp ??= "0x200000" |
98 | KERNEL_OFFSET:versal-net ??= "0x200000" | 102 | KERNEL_OFFSET_DEFAULT:zynq ??= "0x200000" |
103 | KERNEL_OFFSET_DEFAULT:versal ??= "0x200000" | ||
104 | KERNEL_OFFSET_DEFAULT:versal-net ??= "0x200000" | ||
105 | KERNEL_OFFSET ??= "${KERNEL_OFFSET_DEFAULT}" | ||
99 | 106 | ||
100 | KERNEL_IMAGE ?= "${KERNEL_IMAGETYPE}" | 107 | KERNEL_IMAGE ?= "${KERNEL_IMAGETYPE}" |
101 | 108 | ||
102 | RAMDISK_IMAGE_ADDRESS ?= "${@append_baseaddr(d,d.getVar('RAMDISK_OFFSET'))}" | 109 | RAMDISK_IMAGE_ADDRESS ?= "${@append_baseaddr(d,d.getVar('RAMDISK_OFFSET'))}" |
103 | 110 | ||
104 | RAMDISK_OFFSET:microblaze ??= "0x2e00000" | 111 | RAMDISK_OFFSET_DEFAULT ??= "" |
105 | RAMDISK_OFFSET:zynq ??= "0x4000000" | 112 | RAMDISK_OFFSET_DEFAULT:microblaze ??= "0x2e00000" |
106 | RAMDISK_OFFSET:zynqmp ??= "0x4000000" | 113 | RAMDISK_OFFSET_DEFAULT:zynq ??= "0x4000000" |
107 | RAMDISK_OFFSET:versal ??= "0x4000000" | 114 | RAMDISK_OFFSET_DEFAULT:zynqmp ??= "0x4000000" |
108 | RAMDISK_OFFSET:versal-net ??= "0x4000000" | 115 | RAMDISK_OFFSET_DEFAULT:versal ??= "0x4000000" |
116 | RAMDISK_OFFSET_DEFAULT:versal-net ??= "0x4000000" | ||
117 | RAMDISK_OFFSET ??= "${RAMDISK_OFFSET_DEFAULT}" | ||
109 | 118 | ||
110 | FIT_IMAGE_LOAD_ADDRESS ?= "${@append_baseaddr(d,d.getVar('FIT_IMAGE_OFFSET'))}" | 119 | FIT_IMAGE_LOAD_ADDRESS ?= "${@append_baseaddr(d,d.getVar('FIT_IMAGE_OFFSET'))}" |
111 | FIT_IMAGE_OFFSET ??= "0x10000000" | 120 | FIT_IMAGE_OFFSET ??= "0x10000000" |