meta-vitis-tc: riscv-tc: Enable medany memory model

Per request, enable medany memory model with riscv 64-bit and newlib tclibc.

Signed-off-by: Mark Hatle <mark.hatle@amd.com>

1 files changed, 3 insertions, 0 deletions

diff --git a/meta-vitis-tc/conf/machine/riscv-tc.conf b/meta-vitis-tc/conf/machine/riscv-tc.conf
index 3d44277d..7dcc8ede 100644
--- a/meta-vitis-tc/conf/machine/riscv-tc.conf
+++ b/meta-vitis-tc/conf/machine/riscv-tc.conf
@@ -21,6 +21,9 @@ TUNE_CCARGS = "${TUNE_CCARGS:tune-${DEFAULTTUNE}}"
 # Define all of the multilibs supported by this configuration
 MULTILIB_GLOBAL_VARIANTS = "${@extend_variants(d,'MULTILIBS','multilib')}"
 
+# riscv 64-bit it's been requested to move to the medany memory model
+TARGET_CFLAGS:append:libc-newlib:riscv64 = " -mcmodel=medany"
+
 ############# DEFAULT SET ##################
 MULTILIBS  = ""