Merge remote-tracking branch 'origin/rel-v2024.2' into scarthgap-next

Merge in latest 2024.2 changes

17 files changed, 167 insertions, 12 deletions

diff --git a/meta-xilinx-core/conf/layer.conf b/meta-xilinx-core/conf/layer.conf
index 399011a7..a054ce56 100644
--- a/meta-xilinx-core/conf/layer.conf
+++ b/meta-xilinx-core/conf/layer.conf
@@ -72,6 +72,7 @@ XILINX_UBOOT_VERSION[v2024.2] = "1:2024.01-xilinx-v2024.2%"
 
 PREFERRED_VERSION_u-boot-xlnx ?= "${@d.getVarFlag('XILINX_UBOOT_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}"
 PREFERRED_VERSION_u-boot-tools-xlnx ?= "${@d.getVarFlag('XILINX_UBOOT_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}"
+PREFERRED_VERSION_u-boot-tools-xlnx-native ?= "${@d.getVarFlag('XILINX_UBOOT_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}"
 
 XILINX_LINUX_VERSION[v2022.1] = "5.15.19%"
 XILINX_LINUX_VERSION[v2022.2] = "5.15.36%"
diff --git a/meta-xilinx-core/lib/devtool/boot-jtag.py b/meta-xilinx-core/lib/devtool/boot-jtag.py
index 2d8a7d8f..ce38edf9 100644
--- a/meta-xilinx-core/lib/devtool/boot-jtag.py
+++ b/meta-xilinx-core/lib/devtool/boot-jtag.py
@@ -68,7 +68,7 @@ def bootjtag(args, config, basepath, workspace):
     print("INFO: MACHINE: " + machine)
 
     if arch != 'microblazeel':
-        if "fpga-overaly" in machine_features:
+        if "fpga-overlay" in machine_features:
             print("INFO: fpga-overlay MACHINE_FEATURES is enabled, Hence PL bitstream or PDI will not be loaded at initial boot, User can load from u-boot or linux.")
         else:
             print("INFO: fpga-overlay MACHINE_FEATURES is not enabled, Hence PL bitstream or PDI will be loaded at initial boot.")
@@ -78,7 +78,7 @@ def bootjtag(args, config, basepath, workspace):
 
     # For MB, Zynq 7000 and ZynqMP.
     if arch == 'microblazeel' or soc == 'zynq' or soc == 'zynqmp':
-        if not "fpga-overaly" in machine_features:
+        if not "fpga-overlay" in machine_features:
             data['bit'] = glob.glob(os.path.join(deploy_dir, '*' + machine + '.bit'))[0]
         data['uboot'] = os.path.join(deploy_dir, 'u-boot.elf')
         data['dtb'] = os.path.join(deploy_dir, machine + '-system.dtb')
@@ -122,7 +122,7 @@ def bootjtag(args, config, basepath, workspace):
         lines.append('    if { [ta] != "" } break;')
         lines.append('    after 50')
         lines.append('}')
-        if not "fpga-overaly" in machine_features:
+        if not "fpga-overlay" in machine_features:
             lines.append('')
             lines.append('puts stderr "INFO: Configuring the PL ..."')
             lines.append('puts stderr "INFO: Downloading bitstream: ' + data['bit'] + '"')
diff --git a/meta-xilinx-core/recipes-apps/image-update/image-update_1.3.bb b/meta-xilinx-core/recipes-apps/image-update/image-update_1.4.bb
index 828a3ca1..86efabb3 100644
--- a/meta-xilinx-core/recipes-apps/image-update/image-update_1.3.bb
+++ b/meta-xilinx-core/recipes-apps/image-update/image-update_1.4.bb
@@ -8,7 +8,7 @@ LIC_FILES_CHKSUM = "file://${WORKDIR}/git/LICENSES/MIT;md5=2ac09a7a37dd6ee0ba23c
 
 BRANCH = "master"
 SRC_URI = "git://github.com/Xilinx/linux-image_update.git;branch=${BRANCH};protocol=https"
-SRCREV = "1bd7d7405b484d808176c6e711691a846c18b4f0"
+SRCREV = "068a27fc30e065ddd96eb873595926cf65a37ba8"
 
 RDEPENDS:${PN} += "freeipmi"
 
diff --git a/meta-xilinx-core/recipes-apps/raft/raft_2024.2.bb b/meta-xilinx-core/recipes-apps/raft/raft_2024.2.bb
new file mode 100644
index 00000000..a763bfbf
--- /dev/null
+++ b/meta-xilinx-core/recipes-apps/raft/raft_2024.2.bb
@@ -0,0 +1,65 @@
+SUMMARY = "RAFT python application"
+LICENSE = "MIT & BSD-3-Clause"
+LIC_FILES_CHKSUM = " \
+    file://${WORKDIR}/git/LICENSE;md5=cc21c526211d34984839aa67dd16f172 \
+    file://${WORKDIR}/git/docs/LICENSE;md5=d8f0ffdbc8d019bc821a5a07bdca1406 \
+"
+BRANCH = "2024.2"
+SRC_URI = "git://github.com/Xilinx/RAFT;protocol=https;branch=${BRANCH}"
+SRCREV = "f5fc2a0bfa4a6dc18065b08455836e450f2ac054"
+
+inherit update-rc.d systemd
+
+S = "${WORKDIR}/git"
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:zcu208-zynqmp = "${MACHINE}"
+COMPATIBLE_MACHINE:zcu216-zynqmp = "${MACHINE}"
+COMPATIBLE_MACHINE:system-controller = "${MACHINE}"
+
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+
+INITSCRIPT_NAME = "raft-startup"
+INITSCRIPT_PARAMS = "start 99 S ."
+
+SYSTEMD_PACKAGES = "${PN}"
+SYSTEMD_SERVICE:${PN} = "raft-startup.service"
+SYSTEMD_AUTO_ENABLE:${PN}="enable"
+
+DEPENDS += "libmetal"
+
+RDEPENDS:${PN} += "\
+    python3 \
+    python3-pyro4 \
+    python3-cffi \
+    python3-serpent \
+    bash \
+    "
+
+PACKAGECONFIG[raftnotebooks] = "enabled,disabled,,packagegroup-xilinx-jupyter"
+PACKAGECONFIG[raftstartup] = "enabled,disabled,,librfdc librfclk libmetal"
+PACKAGECONFIG[raftstartupsc] = "enabled,disabled,,python3-psutil python3-periphery"
+
+do_install() {
+    if ${@bb.utils.contains('DISTRO_FEATURES','sysvinit','true','false',d)}; then
+        SYSCONFDIR=${D}${sysconfdir}/init.d/
+    else
+        SYSCONFDIR=''
+    fi
+    oe_runmake install DESTDIR=${D}\
+    NOTEBOOKS=${@bb.utils.contains('PACKAGECONFIG','raftnotebooks','enabled','', d)}\
+    STARTUPSC=${@bb.utils.contains('PACKAGECONFIG','raftstartupsc','enabled','',d)}\
+    STARTUP=${@bb.utils.contains('PACKAGECONFIG','raftstartup','enabled','',d)}\
+    BINDIR=${D}${bindir}\
+    SYSTEM_UNIT_DIR=${D}${systemd_system_unitdir}\
+    SYSCONF_DIR=${SYSCONFDIR}
+}
+
+PACKAGECONFIG:append:zcu208-zynqmp = "raftnotebooks raftstartup"
+PACKAGECONFIG:append:zcu216-zynqmp = "raftnotebooks raftstartup"
+PACKAGECONFIG:append:system-controller = "raftstartupsc"
+
+FILES:${PN} += " \
+    ${datadir}/raft/* \
+    ${datadir}/notebooks \
+    ${@bb.utils.contains('DISTRO_FEATURES','sysvinit','${sysconfdir}/*', '', d)} \
+    "
diff --git a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2024.2.bb b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2024.2.bb
index 88dec7b8..8c04150b 100644
--- a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2024.2.bb
+++ b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2024.2.bb
@@ -9,7 +9,7 @@ BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '
 SRC_URI = "${REPO};${BRANCHARG}"
 
 BRANCH = "xlnx_rel_v2024.2"
-SRCREV = "839e8e646c54a63326e36c48a7bd879f5e8efa31"
+SRCREV = "fd6fb8e0c90c0b66e8f840ccaf484159e1b4008d"
 SOMAJOR = "2"
 SOMINOR = "0"
 SOVERSION = "${SOMAJOR}.${SOMINOR}"
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2024.2.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2024.2.inc
index feb9bbcd..f54b5d6b 100644
--- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2024.2.inc
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2024.2.inc
@@ -1,6 +1,6 @@
 UBRANCH = "xlnx_rebase_v2024.01"
 
-SRCREV = "7f6ec94aac7eacfec07bd45c83a6d17df4b7d383"
+SRCREV = "20b67799856b578b1c79f29575448421c86b6161"
 
 LICENSE = "GPL-2.0-or-later"
 LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897"
diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx/linux-xlnx-kmeta/features/hwmon/hwmon_modules.cfg b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx/linux-xlnx-kmeta/features/hwmon/hwmon_modules.cfg
index b6db5f90..cf3004cb 100644
--- a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx/linux-xlnx-kmeta/features/hwmon/hwmon_modules.cfg
+++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx/linux-xlnx-kmeta/features/hwmon/hwmon_modules.cfg
@@ -1,2 +1,3 @@
 CONFIG_SENSORS_TPS53679=m
+CONFIG_SENSORS_UCD9000=m
 
diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt_202420.2.18.0.bb b/meta-xilinx-core/recipes-xrt/xrt/xrt_202420.2.18.0.bb
index d538f947..0df1da62 100644
--- a/meta-xilinx-core/recipes-xrt/xrt/xrt_202420.2.18.0.bb
+++ b/meta-xilinx-core/recipes-xrt/xrt/xrt_202420.2.18.0.bb
@@ -18,8 +18,6 @@ S = "${WORKDIR}/git/src"
 
 inherit cmake pkgconfig
 
-BBCLASSEXTEND = "native nativesdk"
-
 PACKAGECONFIG ??= "aie"
 PACKAGECONFIG[aie] = ",,libxaiengine aiefal,libxaiengine aiefal"
 
diff --git a/meta-xilinx-demos/recipes-firmware/vek280-pl-aie-vdu-fw/vek280-pl-aie-vdu-fw_1.0-2024.2.bb b/meta-xilinx-demos/recipes-firmware/vek280-pl-aie-vdu-fw/vek280-pl-aie-vdu-fw_1.0-2024.2.bb
new file mode 100644
index 00000000..9a546002
--- /dev/null
+++ b/meta-xilinx-demos/recipes-firmware/vek280-pl-aie-vdu-fw/vek280-pl-aie-vdu-fw_1.0-2024.2.bb
@@ -0,0 +1,29 @@
+SUMMARY = "VEK280 Segemented Configuration(DFx Full) firmware using dfx_user_dts bbclass"
+DESCRIPTION = "VEK280 Segemented Configuration(DFx Full) PL AIE and VDU firmware application"
+LICENSE = "MIT"
+LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302"
+
+inherit dfx_user_dts
+
+
+SRC_URI = "https://petalinux.xilinx.com/sswreleases/rel-v2024.2/sdt/2024.2/2024.2_1111_2_02260716/external/vek280-pl-aie-vdu-fw/vek280-pl-aie-vdu-fw_2024.2_1111_1.tar.gz"
+
+SRC_URI[sha256sum] = "6d42c9679e9615c6560a8b095957e5490aacbe9a22ae607794cb914ce790df0f"
+
+COMPATIBLE_MACHINE:versal-vek280-sdt-seg = "${MACHINE}"
+
+# When do_upack is exectuted it will extract tar file with original directory
+# name so set the FW_DIR pointing to pdi and dtsi files.
+FW_DIR = "vek280-pl-aie-vdu-fw"
+
+# fw files doesn't install on rootfs using dfx_user_dts bbclass using artifactory
+# method. To workaround this issue we are using copy_fw_files pre-functions.
+# copy_fw_files prefuncs needs to be called before find_firmware_file to update
+# the firmware-name to ${PN}.
+do_configure[prefuncs] =+ "copy_fw_files"
+python copy_fw_files () {
+    import shutil
+    fw_file_src = d.getVar('WORKDIR') + '/' + d.getVar("FW_DIR")
+    fw_file_dest = d.getVar('S')
+    shutil.copytree(fw_file_src, fw_file_dest, dirs_exist_ok=True)
+}
diff --git a/meta-xilinx-demos/recipes-firmware/vek280-pl-bram-uart-gpio-fw/vek280-pl-bram-uart-gpio-fw_1.0-2024.2.bb b/meta-xilinx-demos/recipes-firmware/vek280-pl-bram-uart-gpio-fw/vek280-pl-bram-uart-gpio-fw_1.0-2024.2.bb
index 045b88d5..7a144446 100644
--- a/meta-xilinx-demos/recipes-firmware/vek280-pl-bram-uart-gpio-fw/vek280-pl-bram-uart-gpio-fw_1.0-2024.2.bb
+++ b/meta-xilinx-demos/recipes-firmware/vek280-pl-bram-uart-gpio-fw/vek280-pl-bram-uart-gpio-fw_1.0-2024.2.bb
@@ -5,9 +5,9 @@ LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda
 
 inherit dfx_user_dts
 
-SRC_URI = "https://petalinux.xilinx.com/sswreleases/rel-v2024.2/sdt/2024.2/2024.2_1106_1_11061206/external/vek280-pl-bram-gpio-fw/vek280-pl-bram-gpio-fw_2024.2_1106_1.tar.gz"
+SRC_URI = "https://petalinux.xilinx.com/sswreleases/rel-v2024.2/sdt/2024.2/2024.2_1111_2_02260716/external/vek280-pl-bram-gpio-fw/vek280-pl-bram-gpio-fw_2024.2_1111_1.tar.gz"
 
-SRC_URI[sha256sum] = "bf7688694a27a0f81e7d59d16c2b819994aa5fb8adfb0d94656da4040e4bc279"
+SRC_URI[sha256sum] = "0c31d5595368ae796c7aac0344e084225fb9abe3ecf4c2f17583191a8196aed4"
 
 COMPATIBLE_MACHINE:versal-vek280-sdt-seg = "${MACHINE}"
 COMPATIBLE_MACHINE:versal-vek280-sdt-seg-ospi = "${MACHINE}"
diff --git a/meta-xilinx-demos/recipes-firmware/zcu104-pl-vcu-fw/zcu104-pl-vcu-fw_1.0-2024.2.bb b/meta-xilinx-demos/recipes-firmware/zcu104-pl-vcu-fw/zcu104-pl-vcu-fw_1.0-2024.2.bb
index 0dcb2be2..f7ece0ff 100644
--- a/meta-xilinx-demos/recipes-firmware/zcu104-pl-vcu-fw/zcu104-pl-vcu-fw_1.0-2024.2.bb
+++ b/meta-xilinx-demos/recipes-firmware/zcu104-pl-vcu-fw/zcu104-pl-vcu-fw_1.0-2024.2.bb
@@ -5,9 +5,9 @@ LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda
 
 inherit dfx_user_dts
 
-SRC_URI = "https://petalinux.xilinx.com/sswreleases/rel-v2024.2/sdt/2024.2/2024.2_1106_1_11061206/external/zcu104-pl-vcu-fw/zcu104-pl-vcu-fw_2024.2_1106_1.tar.gz"
+SRC_URI = "https://petalinux.xilinx.com/sswreleases/rel-v2024.2/sdt/2024.2/2024.2_1111_2_02260716/external/zcu104-pl-vcu-fw/zcu104-pl-vcu-fw_2024.2_1111_1.tar.gz"
 
-SRC_URI[sha256sum] = "1eef872153d2373c944c20752bc374e371159395a42d8353bd1a397fadc59231"
+SRC_URI[sha256sum] = "c4457697a50ecf70f5008797932feb55db18d8afbd5592e3a7ed2cc9ee9fac31"
 
 
 COMPATIBLE_MACHINE:zynqmp-zcu104-sdt-full = "${MACHINE}"
diff --git a/meta-xilinx-demos/scripts/generate-machines-sdt.sh b/meta-xilinx-demos/scripts/generate-machines-sdt.sh
index aaeef385..44c77a88 100755
--- a/meta-xilinx-demos/scripts/generate-machines-sdt.sh
+++ b/meta-xilinx-demos/scripts/generate-machines-sdt.sh
@@ -3,6 +3,7 @@
 ### The following table controls the automatic generated of the firmware demos
 ### Machine                 Recipe
 #M# vek280-pl-bram-gpio-fw  recipes-firmware/vek280-pl-bram-uart-gpio-fw/vek280-pl-bram-uart-gpio-fw_1.0-2024.2.bb
+#M# vek280-pl-aie-vdu-fw    recipes-firmware/vek280-pl-aie-vdu-fw/vek280-pl-aie-vdu-fw_1.0-2024.2.bb
 #M# zcu104-pl-vcu-fw        recipes-firmware/zcu104-pl-vcu-fw/zcu104-pl-vcu-fw_1.0-2024.2.bb
 
 this=$(realpath $0)
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/embeddedsw/2024.2+git/0001-sw_apps-zynqmp_pmufw-Correct-IOU-register-base-addre.patch b/meta-xilinx-standalone/recipes-bsp/embeddedsw/embeddedsw/2024.2+git/0001-sw_apps-zynqmp_pmufw-Correct-IOU-register-base-addre.patch
new file mode 100644
index 00000000..07062cdc
--- /dev/null
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/embeddedsw/2024.2+git/0001-sw_apps-zynqmp_pmufw-Correct-IOU-register-base-addre.patch
@@ -0,0 +1,54 @@
+From 7b6276c77c0be40006a7cb9f53bacf93fd493d49 Mon Sep 17 00:00:00 2001
+From: "Jain, Ronak" <ronak.jain@amd.com>
+Date: Sun, 20 Oct 2024 20:48:29 -1200
+Subject: [PATCH] sw_apps: zynqmp_pmufw: Correct IOU register base address for
+ GEM2 in SGMII mode
+
+Fix an issue where enabling GEM2 in SGMII mode causes QSPI access to
+fail on Kria K26 SOM and KV260 base boards. The failure was due to
+the PMUFW using the IOU_SLCR_BASEADDR instead of the
+IOU_SECURE_SLCR_BASEADDR when accessing the IOU_AXI_WPRTCN and
+IOU_AXI_RPRTCN registers, which caused an IO mux malfunction.
+
+This patch corrects the base addresses for these registers to ensure
+proper operation of GEM2 and QSPI.
+
+Signed-off-by: Ronak Jain <ronak.jain@amd.com>
+Acked-by: Buddhabhatti, Jay <jay.buddhabhatti@amd.com>
+---
+ lib/sw_apps/zynqmp_pmufw/src/iou_secure_slcr.h | 7 ++++---
+ 1 file changed, 4 insertions(+), 3 deletions(-)
+
+diff --git a/lib/sw_apps/zynqmp_pmufw/src/iou_secure_slcr.h b/lib/sw_apps/zynqmp_pmufw/src/iou_secure_slcr.h
+index f462268ad0..79fc790f20 100644
+--- a/lib/sw_apps/zynqmp_pmufw/src/iou_secure_slcr.h
++++ b/lib/sw_apps/zynqmp_pmufw/src/iou_secure_slcr.h
+@@ -1,5 +1,6 @@
+ /******************************************************************************
+-* Copyright (c) 2021 Xilinx, Inc.  All rights reserved.
++* Copyright (c) 2021 - 2022 Xilinx, Inc.  All rights reserved.
++* Copyright (c) 2022 - 2024 Advanced Micro Devices, Inc. All Rights Reserved.
+ * SPDX-License-Identifier: MIT
+ ******************************************************************************/
+ 
+@@ -19,7 +20,7 @@ extern "C" {
+ /**
+  * Register: IOU_AXI_WPRTCN
+  */
+-#define IOU_AXI_WPRTCN         ( ( IOU_SLCR_BASEADDR ) + ((u32)0X00000000U) )
++#define IOU_AXI_WPRTCN         ( ( IOU_SECURE_SLCR_BASEADDR ) + ((u32)0X00000000U) )
+ 
+ #define GEM0_AXI_AWPROT_SHIFT          0U
+ #define GEM0_AXI_AWPROT_MASK           ((u32)0x00000007U)
+@@ -37,7 +38,7 @@ extern "C" {
+ /**
+  * Register: IOU_AXI_RPRTCN
+  */
+-#define IOU_AXI_RPRTCN         ( ( IOU_SLCR_BASEADDR ) + ((u32)0X00000004U) )
++#define IOU_AXI_RPRTCN         ( ( IOU_SECURE_SLCR_BASEADDR ) + ((u32)0X00000004U) )
+ 
+ #define GEM0_AXI_ARPROT_SHIFT          0U
+ #define GEM0_AXI_ARPROT_MASK           ((u32)0x00000007U)
+-- 
+2.34.1
+
diff --git a/meta-xilinx-standalone-sdt/recipes-bsp/embeddedsw/esw-conf_2024.1.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/esw-conf_2024.1.bb
index f99db010..f99db010 100644
--- a/meta-xilinx-standalone-sdt/recipes-bsp/embeddedsw/esw-conf_2024.1.bb
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/esw-conf_2024.1.bb
diff --git a/meta-xilinx-standalone-sdt/recipes-bsp/embeddedsw/esw-conf_2024.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/esw-conf_2024.2.bb
index f99db010..f99db010 100644
--- a/meta-xilinx-standalone-sdt/recipes-bsp/embeddedsw/esw-conf_2024.2.bb
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/esw-conf_2024.2.bb
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2024.2+git-xsct.inc b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2024.2+git-xsct.inc
new file mode 100644
index 00000000..de8e4a25
--- /dev/null
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2024.2+git-xsct.inc
@@ -0,0 +1,5 @@
+FILESPATH .= ":${FILE_DIRNAME}/embeddedsw/${PV}:${FILE_DIRNAME}/embeddedsw"
+
+SRC_URI += " \
+            file://0001-sw_apps-zynqmp_pmufw-Correct-IOU-register-base-addre.patch \
+           "
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2024.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2024.2.bb
index 3ec0c10f..07c44b6a 100644
--- a/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2024.2.bb
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2024.2.bb
@@ -1,3 +1,4 @@
 require pmu-firmware.inc
 require ${@'pmu-firmware_generic.inc' if d.getVar('XILINX_WITH_ESW') == 'generic' else ''}
 require ${@'pmu-firmware_${PV}-generic.inc' if d.getVar('XILINX_WITH_ESW') == 'generic' else ''}
+require ${@'pmu-firmware_${PV}-xsct.inc' if d.getVar('XILINX_WITH_ESW') == 'xsct' else ''}