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@@ -5,10 +5,15 @@ NAND boot modes.
5 5
6* [Setting Up the Target](#setting-up-the-target) 6* [Setting Up the Target](#setting-up-the-target)
7* [Booting from JTAG](#booting-from-jtag) 7* [Booting from JTAG](#booting-from-jtag)
8 * [Loading boot components using XSCT](#loading-boot-components-using-xsct) 8 * [Sourcing the XSDB tools](#sourcing-the-xsdb-tools)
9 * [Loading Kernel, Root Filesystem and U-boot boot script](#loading-kernel-root-filesystem-and-u-boot-boot-script) 9 * [Deploying the images to target](#deploying-the-images-to-target)
10 * [Using XSCT](#using-xsct) 10 * [Using devtool boot-jtag script](#using-devtool-boot-jtag-script)
11 * [Using TFTP](#using-tftp) 11 * [Manually executing xsdb commands](#manually-executing-xsdb-commands)
12 * [Loading boot components using XSDB](#loading-boot-components-using-xsdb)
13 * [Loading Kernel, Root Filesystem and U-boot boot script](#loading-kernel-root-filesystem-and-u-boot-boot-script)
14 * [Using XSDB](#using-xsdb)
15 * [Using TFTP](#using-tftp)
16 * [Booting Linux](#booting-linux)
12* [Booting from SD](#booting-from-sd) 17* [Booting from SD](#booting-from-sd)
13* [Booting from QSPI](#booting-from-qspi) 18* [Booting from QSPI](#booting-from-qspi)
14 19
@@ -34,37 +39,57 @@ NAND boot modes.
34 39
35## Booting from JTAG 40## Booting from JTAG
36 41
37This boot flow requires the use of the AMD Xilinx tools, specifically XSCT and 42This boot flow requires the use of the AMD Xilinx tools, specifically XSDB and
38the associated JTAG device drivers. This also requires access to the JTAG interface 43the associated JTAG device drivers. This also requires access to the JTAG interface
39on the board, a number of AMD Xilinx and third-party boards come with on-board JTAG 44on the board, a number of AMD Xilinx and third-party boards come with on-board JTAG
40modules. 45modules.
41 46
421. Source the Vivado or Vitis tools `settings.sh` scripts. 47### Sourcing the XSDB tools
432. Power on the board, Open the XSCT console in the Vitis IDE by clicking the 48
44 XSCT button. Alternatively, you can also open the XSCT console by selecting 49Source the Vivado or Vitis tools `settings.sh` scripts.
45 Xilinx -> XSCT Console. 50
51### Deploying the images to target
52
53Deploying the images can be done in two methods.
54
55#### Using devtool boot-jtag script
56
571. Run devtool command to generate the boot-jtag.tcl script.
58```
59$ devtool boot-jtag --help
60$ devtool boot-jtag --image core-image-minimal --hw_server TCP:<hostname/ip-addr>:3121
61```
622. Script will be generated under ${DEPLOY_DIR_IMAGE}/boot-jtag.tcl
633. Execute this script using xsdb tool as shown below.
64```
65$ xsdb <absolute-path-to-deploy-dir-image>/boot-jtag.tcl
66```
67
68#### Manually executing xsdb commands
69
701. Power on the board, Launch the XSDB shell from command line as shown below.
46``` 71```
47$ xsct 72$ xsdb
48``` 73```
493. In the XSCT console, connect to the target over JTAG using the connect command. 742. In the XSDB console, connect to the target over JTAG using the connect command.
50 Optionally user can use `-url` to specify the local/remote hw_server. The 75 Optionally user can use `-url` to specify the local/remote hw_server. The
51 connect command returns the channel ID of the connection. 76 connect command returns the channel ID of the connection.
52``` 77```
53xsct% connect 78xsdb% connect
54``` 79```
554. The targets command lists the available targets and allows you to select a 803. The targets command lists the available targets and allows you to select a
56 target using its ID. The targets are assigned IDs as they are discovered on 81 target using its ID. The targets are assigned IDs as they are discovered on
57 the JTAG chain, so the IDs can change from session to session. 82 the JTAG chain, so the IDs can change from session to session.
58``` 83```
59xsct% targets 84xsdb% targets
60``` 85```
61 86
62> **Note:** For non-interactive usage such as scripting, you can use the `-filter` 87> **Note:** For non-interactive usage such as scripting, you can use the `-filter`
63 option to select a target instead of selecting the target using its ID. 88 option to select a target instead of selecting the target using its ID.
64 89
65### Loading boot components using XSCT 90##### Loading boot components using XSDB
66 91
671. Download the boot images for the target using XSCT with the `fpga` and `dow` 921. Download the boot images for the target using XSDB with the `fpga` and `dow`
68 command. ZyqnMP boot images will be located in the `${DEPLOY_DIR_IMAGE}` 93 command. ZyqnMP boot images will be located in the `${DEPLOY_DIR_IMAGE}`
69 directory. 94 directory.
70 95
@@ -73,43 +98,43 @@ xsct% targets
73 98
742. Program the bitstream or skip this step if you are loading from u-boot or linux. 992. Program the bitstream or skip this step if you are loading from u-boot or linux.
75``` 100```
76xsct% fpga -no-revision-check ${DEPLOY_DIR_IMAGE}/download.bit 101xsdb% fpga -no-revision-check ${DEPLOY_DIR_IMAGE}/download.bit
77``` 102```
783. By default, JTAG security gates are enabled. Disable the security gates for 1033. By default, JTAG security gates are enabled. Disable the security gates for
79 DAP, PL TAP, and PMU (this makes the PMU MB target visible to the debugger). 104 DAP, PL TAP, and PMU (this makes the PMU MB target visible to the debugger).
80``` 105```
81xsct% targets -set -nocase -filter {name =~ "*PSU*"} 106xsdb% targets -set -nocase -filter {name =~ "*PSU*"}
82xsct% mask_write 0xFFCA0038 0x1C0 0x1C0 107xsdb% mask_write 0xFFCA0038 0x1C0 0x1C0
83``` 108```
843. Verify if the PMU MB target is listed under the PMU device. Now, load the PMU 1093. Verify if the PMU MB target is listed under the PMU device. Now, load the PMU
85 firmware. 110 firmware.
86``` 111```
87xsct% targets -set -nocase -filter {name =~ "*MicroBlaze PMU*"} 112xsdb% targets -set -nocase -filter {name =~ "*MicroBlaze PMU*"}
88xsct% catch {stop} 113xsdb% catch {stop}
89xsct% dow ${DEPLOY_DIR_IMAGE}/pmufw.elf 114xsdb% dow ${DEPLOY_DIR_IMAGE}/pmufw.elf
90xsct% con 115xsdb% con
91``` 116```
925. Reset APU Cortex-A53 Core 0 to load and execute FSBL, This step is important, 1175. Reset APU Cortex-A53 Core 0 to load and execute FSBL, This step is important,
93 because when the ZynqMP boots up in JTAG boot mode, all the APU and RPU cores 118 because when the ZynqMP boots up in JTAG boot mode, all the APU and RPU cores
94 are held in reset. You must clear the resets on each core before performing 119 are held in reset. You must clear the resets on each core before performing
95 debugging on these cores. You can use the `rst` command in XSCT to clear the 120 debugging on these cores. You can use the `rst` command in XSDB to clear the
96 resets. 121 resets.
97``` 122```
98xsct% targets -set -nocase -filter {name =~ "*A53*#0"} 123xsdb% targets -set -nocase -filter {name =~ "*A53*#0"}
99xsct% rst -processor -clear-registers 124xsdb% rst -processor -clear-registers
100``` 125```
1016. Download and run FSBL from APU Cortex-A53 Core 0 1266. Download and run FSBL from APU Cortex-A53 Core 0
102``` 127```
103xsct% dow ${DEPLOY_DIR_IMAGE}/zynqmp_fsbl.elf 128xsdb% dow ${DEPLOY_DIR_IMAGE}/zynqmp_fsbl.elf
104xsct% con 129xsdb% con
105``` 130```
1067. Now download TF-A, U-boot.elf and Device tree to APU and execute. 1317. Now download TF-A, U-boot.elf and Device tree to APU and execute.
107``` 132```
108xsct% stop 133xsdb% stop
109xsct% dow ${DEPLOY_DIR_IMAGE}/bl31.elf 134xsdb% dow ${DEPLOY_DIR_IMAGE}/bl31.elf
110xsct% dow ${DEPLOY_DIR_IMAGE}/u-boot.elf 135xsdb% dow ${DEPLOY_DIR_IMAGE}/u-boot.elf
111xsct% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0x100000 136xsdb% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0x100000
112xsct% con 137xsdb% con
113``` 138```
114 139
1158. In the target Serial Terminal, press any key to stop the U-Boot auto-boot. 1408. In the target Serial Terminal, press any key to stop the U-Boot auto-boot.
@@ -119,7 +144,7 @@ Hit any key to stop autoboot: 0
119U-Boot> 144U-Boot>
120``` 145```
121 146
122### Loading Kernel, Root Filesystem and U-boot boot script 147##### Loading Kernel, Root Filesystem and U-boot boot script
123 148
124Load the images into the target DDR/PL DRR load address i.e., 149Load the images into the target DDR/PL DRR load address i.e.,
125`DDR base address + <image_offset>`. 150`DDR base address + <image_offset>`.
@@ -145,48 +170,50 @@ using U-Boot.
145> 4. If common ${DEPLOY_DIR_IMAGE}/system.dtb is used by u-boot and kernel, this 170> 4. If common ${DEPLOY_DIR_IMAGE}/system.dtb is used by u-boot and kernel, this
146> is already part of boot.bin we can skip loading dtb, else load kernel dtb. 171> is already part of boot.bin we can skip loading dtb, else load kernel dtb.
147 172
148#### Using XSCT 173###### Using XSDB
149 174
1501. Suspend the execution of active target using `stop` command in XSCT. 1751. Suspend the execution of active target using `stop` command in XSDB.
151``` 176```
152xsct% stop 177xsdb% stop
153``` 178```
1542. Using the `dow` command to load the images into the target DDR/PL DDR load 1792. Using the `dow` command to load the images into the target DDR/PL DDR load
155 address. 180 address.
156``` 181```
157xsct% dow -data ${DEPLOY_DIR_IMAGE}/Image 0x200000 182xsdb% dow -data ${DEPLOY_DIR_IMAGE}/Image 0x200000
158xsct% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0x100000 183xsdb% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0x100000
159xsct% dow -data ${DEPLOY_DIR_IMAGE}/core-image-minimal-${MACHINE}.cpio.gz.u-boot 0x4000000 184xsdb% dow -data ${DEPLOY_DIR_IMAGE}/core-image-minimal-${MACHINE}.cpio.gz.u-boot 0x4000000
160xsct% dow -data ${DEPLOY_DIR_IMAGE}/boot.scr 0x20000000 185xsdb% dow -data ${DEPLOY_DIR_IMAGE}/boot.scr 0x20000000
161``` 186```
162 187
163#### Using TFTP 188###### Using TFTP
164 189
1651. Configure the `ipaddr` and `serverip` of the U-Boot environment. 1901. Setup TFTP directory on host machine and copy the images to your TFTP directory
191 so that you can load them from U-Boot.
1922. Configure the `ipaddr` and `serverip` of the U-Boot environment.
166``` 193```
167Versal> set serverip <server ip> 194ZynqMP> set serverip <host-server-ip-address>
168Versal> set ipaddr <board ip> 195ZynqMP> set ipaddr <board-ip-address>
169``` 196```
1702. Load the images to DDR address. Make sure images are copied to tftp directory. 1973. Load the images to DDR address.
171``` 198```
172U-Boot> tftpboot 0x200000 ${TFTPDIR}/Image 199U-Boot> tftpboot 0x200000 Image
173U-Boot> tftpboot 0x100000 ${TFTPDIR}/system.dtb 200U-Boot> tftpboot 0x100000 system.dtb
174U-Boot> tftpboot 0x4000000 ${TFTPDIR}/core-image-minimal-${MACHINE}.cpio.gz.u-boot 201U-Boot> tftpboot 0x4000000 core-image-minimal-${MACHINE}.cpio.gz.u-boot
175U-Boot> tftpboot 0x20000000 ${TFTPDIR}/boot.scr 202U-Boot> tftpboot 0x20000000 boot.scr
176 203
177``` 204```
178### Booting Linux 205##### Booting Linux
179 206
180Once the images are loaded continue the execution. 207Once the images are loaded continue the execution.
181 208
1821. After loading images resume the execution of active target using the `con` 2091. After loading images resume the execution of active target using the `con`
183command in XSCT shell, Skip step 1 for if you have used TFTP to load images. 210command in XSDB shell, Skip step 1 for if you have used TFTP to load images.
184``` 211```
185xsct% con 212xsdb% con
186``` 213```
1872. Terminate xsct shell. 2142. Terminate xsdb shell.
188``` 215```
189xsct% exit 216xsdb% exit
190``` 217```
1913. In the target Serial Terminal, from U-Boot prompt run `boot` command. 2183. In the target Serial Terminal, from U-Boot prompt run `boot` command.
192``` 219```
@@ -204,9 +231,9 @@ U-Boot> boot
204 231
2051. To boot ZCU012 board in QSPI boot mode, Power on the ZCU102 board and boot 2321. To boot ZCU012 board in QSPI boot mode, Power on the ZCU102 board and boot
206 using JTAG or SD boot mode, to ensure that U-Boot is running and also have 233 using JTAG or SD boot mode, to ensure that U-Boot is running and also have
207 boot.bin copied to DDR location using XSCT `dow` or `tftpboot` or `fatload` 234 boot.bin copied to DDR location using XSDB `dow` or `tftpboot` or `fatload`
208 command. 235 command.
2092. Follow Flash boot instructions [README](README.booting.flash.md) for more details. 2362. Follow Flash boot instructions [README](README.booting.flash.md) for more details.
2103. After flashing the images, turn off the power switch on the board, and change 2373. After flashing the images, turn off the power switch on the board, and change
211 the SW6 boot mode pin settings to QSPI boot mode (1-ON, 2-ON, 3-OFF, 4-ON) by 238 the SW6 boot mode pin settings to QSPI boot mode (1-ON, 2-ON, 3-OFF, 4-ON) by
212 setting the SW6. Refer [Setting Up the Target](#setting-up-the-target). \ No newline at end of file 239 setting the SW6. Refer [Setting Up the Target](#setting-up-the-target).