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-rw-r--r--docs/README.booting.microblaze.md121
-rw-r--r--docs/README.booting.storage.md52
-rw-r--r--docs/README.booting.versal.md195
-rw-r--r--docs/README.booting.zynq.md124
-rw-r--r--docs/README.booting.zynqmp.md224
-rw-r--r--docs/README.dfx.user.dts.md706
-rw-r--r--docs/README.fpgamanager.custom.md478
-rw-r--r--docs/README.fw.package.md61
8 files changed, 1013 insertions, 948 deletions
diff --git a/docs/README.booting.microblaze.md b/docs/README.booting.microblaze.md
index 1ffcc3c8..91c0eda9 100644
--- a/docs/README.booting.microblaze.md
+++ b/docs/README.booting.microblaze.md
@@ -4,11 +4,16 @@ Booting OS images on MicroBlaze target boards can be done using JTAG and QSPI bo
4 4
5* [Setting Up the Target](#setting-up-the-target) 5* [Setting Up the Target](#setting-up-the-target)
6* [Booting from JTAG](#booting-from-jtag) 6* [Booting from JTAG](#booting-from-jtag)
7 * [Loading Bitstream using XSCT](#loading-bitstream-using-xsct) 7 * [Sourcing the XSDB tools](#sourcing-the-xsdb-tools)
8 * [Loading U-boot using XSCT](#loading-u-boot-using-xsct) 8 * [Deploying the images to target](#deploying-the-images-to-target)
9 * [Loading Kernel, Device tree, Root Filesystem and U-boot boot script](#loading-kernel-device-tree-root-filesystem-and-u-boot-boot-script) 9 * [Using devtool boot-jtag script](#using-devtool-boot-jtag-script)
10 * [Using XSCT](#using-xsct) 10 * [Manually executing xsdb commands](#manually-executing-xsdb-commands)
11 * [Using TFTP](#using-tftp) 11 * [Loading Bitstream using XSDB](#loading-bitstream-using-xsdb)
12 * [Loading U-boot using XSDB](#loading-u-boot-using-xsdb)
13 * [Loading Kernel, Device tree, Root Filesystem and U-boot boot script](#loading-kernel-device-tree-root-filesystem-and-u-boot-boot-script)
14 * [Using XSDB](#using-xsdb)
15 * [Using TFTP](#using-tftp)
16 * [Booting Linux](#booting-linux)
12 17
13## Setting Up the Target 18## Setting Up the Target
14 19
@@ -34,59 +39,79 @@ Booting OS images on MicroBlaze target boards can be done using JTAG and QSPI bo
34 39
35## Booting from JTAG 40## Booting from JTAG
36 41
37This boot flow requires the use of the AMD Xilinx tools, specifically XSCT and 42This boot flow requires the use of the AMD Xilinx tools, specifically XSDB and
38the associated JTAG device drivers. This also requires access to the JTAG interface 43the associated JTAG device drivers. This also requires access to the JTAG interface
39on the board, a number of AMD Xilinx and third-party boards come with on-board JTAG 44on the board, a number of AMD Xilinx and third-party boards come with on-board JTAG
40modules. 45modules.
41 46
421. Source the Vivado or Vitis tools `settings.sh` scripts. 47### Sourcing the XSDB tools
432. Power on the board, Open the XSCT console in the Vitis IDE by clicking the 48
44 XSCT button. Alternatively, you can also open the XSCT console by selecting 49Source the Vivado or Vitis tools `settings.sh` scripts.
45 Xilinx -> XSCT Console. 50
51### Deploying the images to target
52
53Deploying the images can be done in two methods.
54
55#### Using devtool boot-jtag script
56
571. Run devtool command to generate the boot-jtag.tcl script.
58```
59$ devtool boot-jtag --help
60$ devtool boot-jtag --image core-image-minimal --hw_server TCP:<hostname/ip-addr>:3121
61```
622. Script will be generated under ${DEPLOY_DIR_IMAGE}/boot-jtag.tcl
633. Execute this script using xsdb tool as shown below.
64```
65$ xsdb <absolute-path-to-deploy-dir-image>/boot-jtag.tcl
66```
67
68#### Manually executing xsdb commands
69
701. Power on the board, Launch the XSDB shell from command line as shown below.
46``` 71```
47$ xsct 72$ xsdb
48``` 73```
493. In the XSCT console, connect to the target over JTAG using the connect command. 742. In the XSDB console, connect to the target over JTAG using the connect command.
50 Optionally user can use `-url` to specify the local/remote hw_server. The 75 Optionally user can use `-url` to specify the local/remote hw_server. The
51 connect command returns the channel ID of the connection. 76 connect command returns the channel ID of the connection.
52``` 77```
53xsct% connect 78xsdb% connect
54``` 79```
554. The targets command lists the available targets and allows you to select a 803. The targets command lists the available targets and allows you to select a
56 target using its ID. The targets are assigned IDs as they are discovered on 81 target using its ID. The targets are assigned IDs as they are discovered on
57 the JTAG chain, so the IDs can change from session to session. 82 the JTAG chain, so the IDs can change from session to session.
58``` 83```
59xsct% targets 84xsdb% targets
60``` 85```
61 86
62> **Note:** For non-interactive usage such as scripting, you can use the `-filter` 87> **Note:** For non-interactive usage such as scripting, you can use the `-filter`
63 option to select a target instead of selecting the target using its ID. 88 option to select a target instead of selecting the target using its ID.
64 89
65### Loading Bitstream using XSCT 90##### Loading Bitstream using XSDB
66 91
67* Download the bitstream for the target using XSCT with the `fpga` command. Microblaze 92* Download the bitstream for the target using XSDB with the `fpga` command. Microblaze
68bitstream will be located in the `${DEPLOY_DIR_IMAGE}` directory. Optionally user 93bitstream will be located in the `${DEPLOY_DIR_IMAGE}` directory. Optionally user
69can use `fpga -no-revision-check` to skip FPGA silicon revision. 94can use `fpga -no-revision-check` to skip FPGA silicon revision.
70 95
71``` 96```
72xsct% fpga -no-revision-check ${DEPLOY_DIR_IMAGE}/system-${MACHINE}.bit 97xsdb% fpga -no-revision-check ${DEPLOY_DIR_IMAGE}/system-${MACHINE}.bit
73xsct% after 2000 98xsdb% after 2000
74xsct% targets -set -nocase -filter {name =~ "microblaze*#0"} 99xsdb% targets -set -nocase -filter {name =~ "microblaze*#0"}
75xsct% catch {stop} 100xsdb% catch {stop}
76xsct% after 1000 101xsdb% after 1000
77``` 102```
78### Loading U-boot using XSCT 103##### Loading U-boot using XSDB
79 104
801. Download `u-boot.elf` to the target CPU using XSCT. Microblaze u-boot.elf will be 1051. Download `u-boot.elf` to the target CPU using XSDB. Microblaze u-boot.elf will be
81located in the `${DEPLOY_DIR_IMAGE}` directory. Before u-boot.elf is loaded suspend 106located in the `${DEPLOY_DIR_IMAGE}` directory. Before u-boot.elf is loaded suspend
82the execution of active target using `stop` command. 107the execution of active target using `stop` command.
83``` 108```
84xsct% dow ${DEPLOY_DIR_IMAGE}/u-boot.elf 109xsdb% dow ${DEPLOY_DIR_IMAGE}/u-boot.elf
85``` 110```
862. After loading u-boot.elf resume the execution of active target using the `con` 1112. After loading u-boot.elf resume the execution of active target using the `con`
87command in XSCT shell. 112command in XSDB shell.
88``` 113```
89xsct% con 114xsdb% con
90``` 115```
913. In the target Serial Terminal, press any key to stop the U-Boot auto-boot. 1163. In the target Serial Terminal, press any key to stop the U-Boot auto-boot.
92``` 117```
@@ -95,7 +120,7 @@ Hit any key to stop autoboot: 0
95U-Boot> 120U-Boot>
96``` 121```
97 122
98### Loading Kernel, Device tree, Root Filesystem and U-boot boot script 123##### Loading Kernel, Device tree, Root Filesystem and U-boot boot script
99 124
100Load the images into the target DDR/MIG load address i.e., 125Load the images into the target DDR/MIG load address i.e.,
101`DDR base address + <image_offset>`. MicroBlaze U-boot boot script(boot.scr) 126`DDR base address + <image_offset>`. MicroBlaze U-boot boot script(boot.scr)
@@ -121,48 +146,50 @@ this process can take a long time to execute (more than 10 minutes). If your
121system has ethernet it is recommended that you use TFTP to load these images 146system has ethernet it is recommended that you use TFTP to load these images
122using U-Boot. 147using U-Boot.
123 148
124#### Using XSCT 149###### Using XSDB
125 150
1261. Suspend the execution of active target using `stop` command in XSCT. 1511. Suspend the execution of active target using `stop` command in XSDB.
127``` 152```
128xsct% stop 153xsdb% stop
129``` 154```
1302. Using the `dow` command to load the images into the target DDR/MIG 1552. Using the `dow` command to load the images into the target DDR/MIG
131load address. 156load address.
132``` 157```
133xsct% dow -data ${DEPLOY_DIR_IMAGE}/linux.bin.ub 0x80000000 158xsdb% dow -data ${DEPLOY_DIR_IMAGE}/linux.bin.ub 0x80000000
134xsct% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0x81e00000 159xsdb% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0x81e00000
135xsct% dow -data ${DEPLOY_DIR_IMAGE}/core-image-minimal-${MACHINE}.cpio.gz.u-boot 0x82e00000 160xsdb% dow -data ${DEPLOY_DIR_IMAGE}/core-image-minimal-${MACHINE}.cpio.gz.u-boot 0x82e00000
136xsct% dow -data ${DEPLOY_DIR_IMAGE}/boot.scr 0xff200000 161xsdb% dow -data ${DEPLOY_DIR_IMAGE}/boot.scr 0xff200000
137``` 162```
138 163
139#### Using TFTP 164###### Using TFTP
140 165
1411. Configure the `ipaddr` and `serverip` of the U-Boot environment. 1661. Setup TFTP directory on host machine and copy the images to your TFTP directory
167 so that you can load them from U-Boot.
1682. Configure the `ipaddr` and `serverip` of the U-Boot environment.
142``` 169```
143U-Boot> set serverip <server ip> 170U-Boot> set serverip <server ip>
144U-Boot> set ipaddr <board ip> 171U-Boot> set ipaddr <board ip>
145``` 172```
1462. Load the images to DDR address. Make sure images are copied to tftp directory. 1733. Load the images to DDR address.
147``` 174```
148U-Boot> tftpboot 0x80000000 ${TFTPDIR}/linux.bin.ub 175U-Boot> tftpboot 0x80000000 linux.bin.ub
149U-Boot> tftpboot 0x81e00000 ${TFTPDIR}/system.dtb 176U-Boot> tftpboot 0x81e00000 system.dtb
150U-Boot> tftpboot 0x82e00000 ${TFTPDIR}/core-image-minimal-${MACHINE}.cpio.gz.u-boot 177U-Boot> tftpboot 0x82e00000 core-image-minimal-${MACHINE}.cpio.gz.u-boot
151U-Boot> tftpboot 0xff200000 ${TFTPDIR}/boot.scr 178U-Boot> tftpboot 0xff200000 boot.scr
152``` 179```
153 180
154### Booting Linux 181##### Booting Linux
155 182
156Once the images are loaded continue the execution. 183Once the images are loaded continue the execution.
157 184
1581. After loading images resume the execution of active target using the `con` 1851. After loading images resume the execution of active target using the `con`
159command in XSCT shell, Skip step 1 for if you have used TFTP to load images. 186command in XSDB shell, Skip step 1 for if you have used TFTP to load images.
160``` 187```
161xsct% con 188xsdb% con
162``` 189```
1632. Terminate xsct shell. 1902. Terminate xsdb shell.
164``` 191```
165xsct% exit 192xsdb% exit
166``` 193```
1673. In the target Serial Terminal, from U-Boot prompt run `boot` command. 1943. In the target Serial Terminal, from U-Boot prompt run `boot` command.
168``` 195```
diff --git a/docs/README.booting.storage.md b/docs/README.booting.storage.md
index 4d33600d..d9689712 100644
--- a/docs/README.booting.storage.md
+++ b/docs/README.booting.storage.md
@@ -22,7 +22,7 @@ This section describes how to manually prepare and populate an SD card image.
22There are automation tools in OpenEmbedded that can generate disk images already 22There are automation tools in OpenEmbedded that can generate disk images already
23formatted and prepared such that they can be written directly to a disk. Refer 23formatted and prepared such that they can be written directly to a disk. Refer
24to the Yocto Project Manual for more details: 24to the Yocto Project Manual for more details:
25https://docs.yoctoproject.org/4.1.2/singleindex.html#creating-partitioned-images-using-wic 25https://docs.yoctoproject.org/4.1.4/singleindex.html#creating-partitioned-images-using-wic
26 26
27## Writing image to SD or eMMC device 27## Writing image to SD or eMMC device
28 28
@@ -33,11 +33,17 @@ There are two ways to write the images to SD card or eMMC device.
332. To write image to eMMC device make sure you need to boot Linux from JTAG or 332. To write image to eMMC device make sure you need to boot Linux from JTAG or
34 SD or QSPI first, then copy the wic image to `<target_rootfs>/tmp` directory. 34 SD or QSPI first, then copy the wic image to `<target_rootfs>/tmp` directory.
35 35
36> **Note:** `<target-image>` refers to core-image-minimal or petalinux-image-minimal
37
36### Using Wic file 38### Using Wic file
37 39
38Write wic image file to the SD card or eMMC device. 40Write wic image file to the SD card or eMMC device. Use dd command or balena
41etcher to flash the wic image file to SD card. WIC image will be
42build/tmp/deploy/${MACHINE}/<target-image>-${MACHINE}-${DATETIME}.rootfs.wic, See
43[Flashing Images Using bmaptool](https://docs.yoctoproject.org/singleindex.html#flashing-images-using-bmaptool)
44for fast and easy way to flash the image
39``` 45```
40$ sudo dd if=xilinx-default-sd-${DATETIME}-sda.direct of=/dev/mmcblk<devnum> bs=4M 46$ sudo dd if=<target-image>-${MACHINE}-${DATETIME}.rootfs.wic of=/dev/mmcblk<devnum> bs=4M
41``` 47```
42 48
43### Using Yocto images 49### Using Yocto images
@@ -55,22 +61,40 @@ $ sudo lsblk /dev/mmcblk<devnum> -o NAME,FSTYPE,LABEL,PARTLABEL
55$ sudo mount -L boot /mnt/boot; sudo mount -L root /mnt/rootfs` 61$ sudo mount -L boot /mnt/boot; sudo mount -L root /mnt/rootfs`
56``` 62```
573. Copy the boot images to the SD card or eMMC device FAT32 partition. 633. Copy the boot images to the SD card or eMMC device FAT32 partition.
64
65* Linux
58 * boot.bin 66 * boot.bin
59 * boot.scr 67 * boot.scr
60 * Image or uImage (For Zynq7000 only) 68 * Image or uImage (For Zynq7000 only)
61 * system.dtb 69 * system.dtb
62 * rootfs.cpio.gz.u-boot (If using a ramdisk) 70 * rootfs.cpio.gz.u-boot (If using a ramdisk)
63``` 71 ```
64$ cp ${DEPLOY_DIR_IMAGE}/boot.bin /mnt/boot/boot.bin 72 $ cp ${DEPLOY_DIR_IMAGE}/boot.bin /mnt/boot/boot.bin
65$ cp ${DEPLOY_DIR_IMAGE}/boot.scr /mnt/boot/boot.scr 73 $ cp ${DEPLOY_DIR_IMAGE}/boot.scr /mnt/boot/boot.scr
66$ cp ${DEPLOY_DIR_IMAGE}/Image /mnt/boot/Image 74 $ cp ${DEPLOY_DIR_IMAGE}/Image /mnt/boot/Image
67$ cp ${DEPLOY_DIR_IMAGE}/system.dtb /mnt/boot/system.dtb 75 $ cp ${DEPLOY_DIR_IMAGE}/system.dtb /mnt/boot/system.dtb
68$ cp ${DEPLOY_DIR_IMAGE}/core-image-minimal-${MACHINE}.cpio.gz.u-boot /mnt/boot/rootfs.cpio.gz.u-boot 76 $ cp ${DEPLOY_DIR_IMAGE}/<target-image>-${MACHINE}-${DATETIME}.cpio.gz.u-boot /mnt/boot/rootfs.cpio.gz.u-boot
69``` 77 ```
704. Extract `core-image-minimal-${MACHINE}-${DATETIME}.rootfs.tar.gz` file content to the SD 78* Xen
79 * boot.bin
80 * boot.scr
81 * Image
82 * xen
83 * system.dtb
84 * rootfs.cpio.gz (If using a ramdisk)
85 ```
86 $ cp ${DEPLOY_DIR_IMAGE}/boot.bin /mnt/boot/boot.bin
87 $ cp ${DEPLOY_DIR_IMAGE}/boot.scr /mnt/boot/boot.scr
88 $ cp ${DEPLOY_DIR_IMAGE}/Image /mnt/boot/Image
89 $ cp ${DEPLOY_DIR_IMAGE}/xen /mnt/boot/xen
90 $ cp ${DEPLOY_DIR_IMAGE}/system.dtb /mnt/boot/system.dtb
91 $ cp ${DEPLOY_DIR_IMAGE}/<target-image>-${MACHINE}-${DATETIME}.cpio.gz /mnt/boot/rootfs.cpio.gz
92 ```
93
944. Extract `<target-image>-${MACHINE}-${DATETIME}.rootfs.tar.gz` file content to the SD
71 card or eMMC device EXT4 partition. 95 card or eMMC device EXT4 partition.
72``` 96```
73$ sudo tar -xf ${DEPLOY_DIR_IMAGE}/core-image-minimal-${MACHINE}-${DATETIME}.rootfs.tar.gz -C /mnt/rootfs 97$ sudo tar -xf ${DEPLOY_DIR_IMAGE}/<target-image>-${MACHINE}-${DATETIME}.rootfs.tar.gz -C /mnt/rootfs
74$ sync 98$ sync
75``` 99```
765. Unmount the SD Card or eMMC device and boot from SD or eMMC boot modes. 1005. Unmount the SD Card or eMMC device and boot from SD or eMMC boot modes.
@@ -97,10 +121,10 @@ $ sudo lsblk /dev/sd<X> -o NAME,FSTYPE,LABEL,PARTLABEL
97``` 121```
98$ sudo mount -L root /mnt/rootfs` 122$ sudo mount -L root /mnt/rootfs`
99``` 123```
1003. Extract `core-image-minimal-${MACHINE}-${DATETIME}.rootfs.tar.gz` file content 1243. Extract `<target-image>-${MACHINE}-${DATETIME}.rootfs.tar.gz` file content
101 to the USB or SATA device EXT4 partition. 125 to the USB or SATA device EXT4 partition.
102``` 126```
103$ sudo tar -xf ${DEPLOY_DIR_IMAGE}/core-image-minimal-${MACHINE}-${DATETIME}.rootfs.tar.gz -C /mnt/rootfs 127$ sudo tar -xf ${DEPLOY_DIR_IMAGE}/<target-image>-${MACHINE}-${DATETIME}.rootfs.tar.gz -C /mnt/rootfs
104$ sync 128$ sync
105``` 129```
1064. Unmount the USB or SATA device. 1304. Unmount the USB or SATA device.
diff --git a/docs/README.booting.versal.md b/docs/README.booting.versal.md
index afdeba2b..25738784 100644
--- a/docs/README.booting.versal.md
+++ b/docs/README.booting.versal.md
@@ -5,10 +5,15 @@ modes.
5 5
6* [Setting Up the Target](#setting-up-the-target) 6* [Setting Up the Target](#setting-up-the-target)
7* [Booting from JTAG](#booting-from-jtag) 7* [Booting from JTAG](#booting-from-jtag)
8 * [Loading boot.bin using XSCT](#loading-bootbin-using-xsct) 8 * [Sourcing the XSDB tools](#sourcing-the-xsdb-tools)
9 * [Loading Kernel, Root Filesystem and U-boot boot script](#loading-kernel-root-filesystem-and-u-boot-boot-script) 9 * [Deploying the images to target](#deploying-the-images-to-target)
10 * [Using XSCT](#using-xsct) 10 * [Using devtool boot-jtag script](#using-devtool-boot-jtag-script)
11 * [Using TFTP](#using-tftp) 11 * [Manually executing xsdb commands](#manually-executing-xsdb-commands)
12 * [Loading boot.bin using XSDB](#loading-bootbin-using-xsdb)
13 * [Loading Kernel, Root Filesystem and U-boot boot script](#loading-kernel-root-filesystem-and-u-boot-boot-script)
14 * [Using XSDB](#using-xsdb)
15 * [Using TFTP](#using-tftp)
16 * [Booting Linux](#booting-linux)
12* [Booting from SD](#booting-from-sd) 17* [Booting from SD](#booting-from-sd)
13* [Booting from QSPI](#booting-from-qspi) 18* [Booting from QSPI](#booting-from-qspi)
14 19
@@ -37,37 +42,61 @@ modes.
37 42
38## Booting from JTAG 43## Booting from JTAG
39 44
40This boot flow requires the use of the AMD Xilinx tools, specifically XSCT and 45This boot flow requires the use of the AMD Xilinx tools, specifically XSDB and
41the associated JTAG device drivers. This also requires access to the JTAG interface 46the associated JTAG device drivers. This also requires access to the JTAG interface
42on the board, a number of AMD Xilinx and third-party boards come with on-board JTAG 47on the board, a number of AMD Xilinx and third-party boards come with on-board JTAG
43modules. 48modules.
44 49
451. Source the Vivado or Vitis tools `settings.sh` scripts. 50### Sourcing the XSDB tools
462. Power on the board, Open the XSCT console in the Vitis IDE by clicking the 51
47 XSCT button. Alternatively, you can also open the XSCT console by selecting 52Source the Vivado or Vitis tools `settings.sh` scripts.
48 Xilinx -> XSCT Console. 53
54### Deploying the images to target
55
56Deploying the images can be done in two methods.
57
58#### Using devtool boot-jtag script
59
60> **Note:** For Xen boot flow boot-jtag script doesn't include loading xen, kernel
61> and root filesystem, This step needs to be done manually as mentioned in XSDB
62> or TFTP method below.
63
641. Run devtool command to generate the boot-jtag.tcl script.
65```
66$ devtool boot-jtag --help
67$ devtool boot-jtag --image core-image-minimal --hw_server TCP:<hostname/ip-addr>:3121
68```
692. Script will be generated under ${DEPLOY_DIR_IMAGE}/boot-jtag.tcl
703. Execute this script using xsdb tool as shown below.
49``` 71```
50$ xsct 72$ xsdb <absolute-path-to-deploy-dir-image>/boot-jtag.tcl
51``` 73```
523. In the XSCT console, connect to the target over JTAG using the connect command. 74
75#### Manually executing xsdb commands
76
771. Power on the board, Launch the XSDB shell from command line as shown below.
78```
79$ xsdb
80```
812. In the XSDB console, connect to the target over JTAG using the connect command.
53 Optionally user can use `-url` to specify the local/remote hw_server. The 82 Optionally user can use `-url` to specify the local/remote hw_server. The
54 connect command returns the channel ID of the connection. 83 connect command returns the channel ID of the connection.
55``` 84```
56xsct% connect 85xsdb% connect
57``` 86```
584. The targets command lists the available targets and allows you to select a 873. The targets command lists the available targets and allows you to select a
59 target using its ID. The targets are assigned IDs as they are discovered on 88 target using its ID. The targets are assigned IDs as they are discovered on
60 the JTAG chain, so the IDs can change from session to session. 89 the JTAG chain, so the IDs can change from session to session.
61``` 90```
62xsct% targets 91xsdb% targets
63``` 92```
64 93
65> **Note:** For non-interactive usage such as scripting, you can use the `-filter` 94> **Note:** For non-interactive usage such as scripting, you can use the `-filter`
66 option to select a target instead of selecting the target using its ID. 95 option to select a target instead of selecting the target using its ID.
67 96
68### Loading boot.bin using XSCT 97##### Loading boot.bin using XSDB
69 98
701. Download the boot.bin for the target using XSCT with the `device program` command. 991. Download the boot.bin for the target using XSDB with the `device program` command.
71Versal boot.bin will be located in the `${DEPLOY_DIR_IMAGE}` directory. Default 100Versal boot.bin will be located in the `${DEPLOY_DIR_IMAGE}` directory. Default
72boot.bin consists of boot pdi, plm.elf, psm.elf, bl31.elf, u-boot.elf and 101boot.bin consists of boot pdi, plm.elf, psm.elf, bl31.elf, u-boot.elf and
73system.dtb. This boot.bin is generated using bootgen tool by passing a .bif file. 102system.dtb. This boot.bin is generated using bootgen tool by passing a .bif file.
@@ -76,15 +105,15 @@ system.dtb. This boot.bin is generated using bootgen tool by passing a .bif file
76> u-boot and kernel. 105> u-boot and kernel.
77 106
78``` 107```
79xsct% targets -set -nocase -filter {name =~ "*PMC*"} 108xsdb% targets -set -nocase -filter {name =~ "*PMC*"}
80xsct% device program ${DEPLOY_DIR_IMAGE}/boot.bin 109xsdb% device program ${DEPLOY_DIR_IMAGE}/boot.bin
81xsct% targets -set -nocase -filter {name =~ "*A72*#0"} 110xsdb% targets -set -nocase -filter {name =~ "*A72*#0"}
82xsct% stop 111xsdb% stop
83``` 112```
842. After loading boot.bin resume the execution of active target using the `con` 1132. After loading boot.bin resume the execution of active target using the `con`
85command in XSCT shell. 114command in XSDB shell.
86``` 115```
87xsct% con 116xsdb% con
88``` 117```
893. In the target Serial Terminal, press any key to stop the U-Boot auto-boot. 1183. In the target Serial Terminal, press any key to stop the U-Boot auto-boot.
90``` 119```
@@ -93,20 +122,38 @@ Hit any key to stop autoboot: 0
93U-Boot> 122U-Boot>
94``` 123```
95 124
96### Loading Kernel, Root Filesystem and U-boot boot script 125##### Loading Kernel, Root Filesystem and U-boot boot script
97 126
98Load the images into the target DDR/PL DRR load address i.e., 127Load the images into the target DDR/PL DRR load address i.e.,
99`DDR base address + <image_offset>`. 128`DDR base address + <image_offset>`.
100 129
101Below example uses base DDR address as 0x0 which matches in vivado address editor. 130Below example uses base DDR address as 0x0 which matches in vivado address editor.
102 131
1321. **Linux**
133
103| Image Type | Base DDR Address | Image Offset | Load Address in DDR | 134| Image Type | Base DDR Address | Image Offset | Load Address in DDR |
104|--------------------|------------------|--------------|---------------------| 135|--------------------|------------------|--------------|---------------------|
105| Kernel | 0x0 | 0x200000 | 0x200000 | 136| Linux Kernel | 0x0 | 0x200000 | 0x200000 |
106| Device Tree | 0x0 | 0x1000 | 0x1000 | 137| Device Tree Blob | 0x0 | 0x1000 | 0x1000 |
107| Rootfs | 0x0 | 0x4000000 | 0x4000000 | 138| Rootfs | 0x0 | 0x4000000 | 0x4000000 |
108| U-boot boot script | 0x0 | 0x20000000 | 0x20000000 | 139| U-boot boot script | 0x0 | 0x20000000 | 0x20000000 |
109 140
1412. **Xen**
142
143> **Note:** Xen, Rootfs and Device Tree image offset is calculated as shown below.
144> * `Xen Rootfs = Base DDR Address + Linux Kernel Image Offset(0xE00000) + Size of Linux Kernel Image`
145> * `Xen Kernel = Base DDR Address + Xen Rootfs Image Offset (Ex: 0x2600000) + Size of Xen Rootfs`
146> * `Device Tree Blob = Base DDR Address + Xen Kernel Image Offset (Ex: 0xBA00000) + Size of Device Tree Blob`
147
148| Image Type | Base DDR Address | Image Offset | Load Address in DDR |
149|--------------------|------------------|--------------|---------------------|
150| Linux Kernel | 0x0 | 0xE00000 | 0xE00000 |
151| Xen Rootfs | 0x0 | 0x2600000 | 0x2600000 |
152| Xen Kernel | 0x0 | 0xBA00000 | 0xBA00000 |
153| Device Tree Blob | 0x0 | 0xC000000 | 0xC000000 |
154| U-boot boot script | 0x0 | 0x20000000 | 0x20000000 |
155
156
110> **Note:** 157> **Note:**
111> 1. `<target-image>` refers to core-image-minimal or petalinux-image-minimal 158> 1. `<target-image>` refers to core-image-minimal or petalinux-image-minimal
112> 2. For pxeboot boot create a symlink for `<target-image>-${MACHINE}-${DATETIME}.cpio.gz.u-boot` 159> 2. For pxeboot boot create a symlink for `<target-image>-${MACHINE}-${DATETIME}.cpio.gz.u-boot`
@@ -119,55 +166,101 @@ using U-Boot.
119> 4. If common ${DEPLOY_DIR_IMAGE}/system.dtb is used by u-boot and kernel, this 166> 4. If common ${DEPLOY_DIR_IMAGE}/system.dtb is used by u-boot and kernel, this
120> is already part of boot.bin we can skip loading dtb, else load kernel dtb. 167> is already part of boot.bin we can skip loading dtb, else load kernel dtb.
121 168
122#### Using XSCT 169###### Using XSDB
123 170
1241. Suspend the execution of active target using `stop` command in XSCT. 1711. Suspend the execution of active target using `stop` command in XSDB.
125``` 172```
126xsct% stop 173xsdb% stop
127``` 174```
1282. Using the `dow` command to load the images into the target DDR/PL DDR load 1752. Using the `dow` command to load the images into the target DDR/PL DDR load
129 address. 176 address.
130```
131xsct% dow -data ${DEPLOY_DIR_IMAGE}/Image 0x200000
132xsct% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0x1000
133xsct% dow -data ${DEPLOY_DIR_IMAGE}/core-image-minimal-${MACHINE}.cpio.gz.u-boot 0x4000000
134xsct% dow -data ${DEPLOY_DIR_IMAGE}/boot.scr 0x20000000
135xsct% targets -set -nocase -filter {name =~ "*A72*#0"}
136```
137 177
138#### Using TFTP 178 * Linux XSDB
179 ```
180 xsdb% targets -set -nocase -filter {name =~ "*A72*#0"}
181 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/Image 0x200000
182 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0x1000
183 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/core-image-minimal-${MACHINE}.cpio.gz.u-boot 0x4000000
184 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/boot.scr 0x20000000
185 ```
186
187 * Xen XSDB
188 ```
189 xsdb% targets -set -nocase -filter {name =~ "*A72*#0"}
190 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/Image 0xE00000
191 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/core-image-minimal-${MACHINE}.cpio.gz 0x2600000
192 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/xen 0xBA00000
193 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0xC000000
194 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/boot.scr 0x20000000
195 ```
196
197###### Using TFTP
139 198
1401. Configure the `ipaddr` and `serverip` of the U-Boot environment. 1991. Setup TFTP directory on host machine and copy the images to your TFTP directory
200 so that you can load them from U-Boot.
2012. Configure the `ipaddr` and `serverip` of the U-Boot environment.
141``` 202```
142Versal> set serverip <server ip> 203Versal> set serverip <server ip>
143Versal> set ipaddr <board ip> 204Versal> set ipaddr <board ip>
144``` 205```
1452. Load the images to DDR address. Make sure images are copied to tftp directory. 2063. Load the images to DDR address.
146```
147U-Boot> tftpboot 0x200000 ${TFTPDIR}/Image
148U-Boot> tftpboot 0x1000 ${TFTPDIR}/system.dtb
149U-Boot> tftpboot 0x4000000 ${TFTPDIR}/core-image-minimal-${MACHINE}.cpio.gz.u-boot
150U-Boot> tftpboot 0x20000000 ${TFTPDIR}/boot.scr
151 207
152``` 208 * Linux TFTP
153### Booting Linux 209 ```
210 U-Boot> tftpboot 0x200000 Image
211 U-Boot> tftpboot 0x1000 system.dtb
212 U-Boot> tftpboot 0x4000000 core-image-minimal-${MACHINE}.cpio.gz.u-boot
213 U-Boot> tftpboot 0x20000000 boot.scr
214 ```
215
216 * Xen TFTP
217 ```
218 U-Boot> tftpboot 0xE00000 Image
219 U-Boot> setenv kernel_size 0x$filesize
220 U-Boot> tftpboot 0x2600000 core-image-minimal-${MACHINE}.cpio.gz
221 U-Boot> setenv ramdisk_size 0x$filesize
222 U-Boot> tftpboot 0xBA00000 xen
223 U-Boot> tftpboot 0xC000000 system.dtb
224 U-Boot> tftpboot 0x20000000 boot.scr
225 ```
226
227##### Booting Linux
154 228
155Once the images are loaded continue the execution. 229Once the images are loaded continue the execution.
156 230
1571. After loading images resume the execution of active target using the `con` 2311. After loading images resume the execution of active target using the `con`
158command in XSCT shell, Skip step 1 for if you have used TFTP to load images. 232command in XSDB shell, Skip step 1 for if you have used TFTP to load images.
159``` 233```
160xsct% con 234xsdb% con
161``` 235```
1622. Terminate xsct shell. 2362. Terminate xsdb shell.
163``` 237```
164xsct% exit 238xsdb% exit
165``` 239```
1663. In the target Serial Terminal, from U-Boot prompt run `boot` command. 2403. In the target Serial Terminal, from U-Boot prompt run `boot` command.
241
242* Linux boot
167``` 243```
168U-Boot> boot 244U-Boot> boot
169``` 245```
170 246
247* XEN JTAG boot
248
249 * XSDB
250 > **Note:** You need to calculate the Kernel(kernel_size) and ramdisk(ramdisk_size)
251 > image size manually from `${DEPLOY_DIR_IMAGE}` directory. For example if your
252 > kernel size is 24269312 bytes you need to convert to hex 0x1725200 and use it.
253 ```
254 U-Boot> setenv kernel_size <filesize>
255 U-Boot> setenv ramdisk_size <filesize>
256 U-Boot> boot
257 ```
258
259 * TFTP
260 ```
261 U-Boot> boot
262 ```
263
171## Booting from SD 264## Booting from SD
172 265
1731. Load the SD card into the VCK190 board in the J302 SD slot. 2661. Load the SD card into the VCK190 board in the J302 SD slot.
@@ -181,9 +274,9 @@ U-Boot> boot
181 card (part number: X_EBM-01, REV_A01). 274 card (part number: X_EBM-01, REV_A01).
1822. With the card powered off, install the QSPI daughter card. 2752. With the card powered off, install the QSPI daughter card.
1833. Power on the VCK190 board and boot using JTAG or SD boot mode, to ensure that 2763. Power on the VCK190 board and boot using JTAG or SD boot mode, to ensure that
184 U-Boot is running and also have boot.bin copied to DDR location using XSCT 277 U-Boot is running and also have boot.bin copied to DDR location using XSDB
185 `dow` or `tftpboot` or `fatload` command. 278 `dow` or `tftpboot` or `fatload` command.
1864. Follow Flash boot instructions [README](README.booting.flash.md) for more details. 2794. Follow Flash boot instructions [README](README.booting.flash.md) for more details.
1875. After flashing the images, turn off the power switch on the board, and change 2805. After flashing the images, turn off the power switch on the board, and change
188 the SW1 boot mode pin settings to QSPI boot mode (1-ON, 2-OFF, 3-ON, 4-ON) by 281 the SW1 boot mode pin settings to QSPI boot mode (1-ON, 2-OFF, 3-ON, 4-ON) by
189 setting the SW1. Refer [Setting Up the Target](#setting-up-the-target). \ No newline at end of file 282 setting the SW1. Refer [Setting Up the Target](#setting-up-the-target).
diff --git a/docs/README.booting.zynq.md b/docs/README.booting.zynq.md
index a9b6e8f3..28aad78f 100644
--- a/docs/README.booting.zynq.md
+++ b/docs/README.booting.zynq.md
@@ -5,10 +5,15 @@ boot modes.
5 5
6* [Setting Up the Target](#setting-up-the-target) 6* [Setting Up the Target](#setting-up-the-target)
7* [Booting from JTAG](#booting-from-jtag) 7* [Booting from JTAG](#booting-from-jtag)
8 * [Loading boot components using XSCT](#loading-boot-components-using-xsct) 8 * [Sourcing the XSDB tools](#sourcing-the-xsdb-tools)
9 * [Loading Kernel, Root Filesystem and U-boot boot script](#loading-kernel-root-filesystem-and-u-boot-boot-script) 9 * [Deploying the images to target](#deploying-the-images-to-target)
10 * [Using XSCT](#using-xsct) 10 * [Using devtool boot-jtag script](#using-devtool-boot-jtag-script)
11 * [Using TFTP](#using-tftp) 11 * [Manually executing xsdb commands](#manually-executing-xsdb-commands)
12 * [Loading boot components using XSDB](#loading-boot-components-using-xsdb)
13 * [Loading Kernel, Root Filesystem and U-boot boot script](#loading-kernel-root-filesystem-and-u-boot-boot-script)
14 * [Using XSDB](#using-xsdb)
15 * [Using TFTP](#using-tftp)
16 * [Booting Linux](#booting-linux)
12* [Booting from SD](#booting-from-sd) 17* [Booting from SD](#booting-from-sd)
13* [Booting from QSPI](#booting-from-qspi) 18* [Booting from QSPI](#booting-from-qspi)
14 19
@@ -35,37 +40,58 @@ boot modes.
35--- 40---
36## Booting from JTAG 41## Booting from JTAG
37 42
38This boot flow requires the use of the AMD Xilinx tools, specifically XSCT and 43This boot flow requires the use of the AMD Xilinx tools, specifically XSDB and
39the associated JTAG device drivers. This also requires access to the JTAG interface 44the associated JTAG device drivers. This also requires access to the JTAG interface
40on the board, a number of AMD Xilinx and third-party boards come with on-board JTAG 45on the board, a number of AMD Xilinx and third-party boards come with on-board JTAG
41modules. 46modules.
42 47
431. Source the Vivado or Vitis tools `settings.sh` scripts. 48### Sourcing the XSDB tools
442. Power on the board, Open the XSCT console in the Vitis IDE by clicking the 49
45 XSCT button. Alternatively, you can also open the XSCT console by selecting 50Source the Vivado or Vitis tools `settings.sh` scripts.
46 Xilinx -> XSCT Console. 51
52### Deploying the images to target
53
54Deploying the images can be done in two methods.
55
56#### Using devtool boot-jtag script
57
581. Run devtool command to generate the boot-jtag.tcl script.
59```
60$ devtool boot-jtag --help
61$ devtool boot-jtag --image core-image-minimal --hw_server TCP:<hostname/ip-addr>:3121
62```
632. Script will be generated under ${DEPLOY_DIR_IMAGE}/boot-jtag.tcl
643. Execute this script using xsdb tool as shown below.
47``` 65```
48$ xsct 66$ xsdb <absolute-path-to-deploy-dir-image>/boot-jtag.tcl
49``` 67```
503. In the XSCT console, connect to the target over JTAG using the connect command. 68
69#### Manually executing xsdb commands
70
711. Power on the board, Launch the XSDB shell from command line as shown below.
72```
73$ xsdb
74```
752. In the XSDB console, connect to the target over JTAG using the connect command.
51 Optionally user can use `-url` to specify the local/remote hw_server. The 76 Optionally user can use `-url` to specify the local/remote hw_server. The
52 connect command returns the channel ID of the connection. 77 connect command returns the channel ID of the connection.
53``` 78```
54xsct% connect 79xsdb% connect
55``` 80```
564. The targets command lists the available targets and allows you to select a 813. The targets command lists the available targets and allows you to select a
57 target using its ID. The targets are assigned IDs as they are discovered on 82 target using its ID. The targets are assigned IDs as they are discovered on
58 the JTAG chain, so the IDs can change from session to session. 83 the JTAG chain, so the IDs can change from session to session.
59``` 84```
60xsct% targets 85xsdb% targets
61``` 86```
62 87
63> **Note:** For non-interactive usage such as scripting, you can use the `-filter` 88> **Note:** For non-interactive usage such as scripting, you can use the `-filter`
64 option to select a target instead of selecting the target using its ID. 89 option to select a target instead of selecting the target using its ID.
90
65--- 91---
66### Loading boot components using XSCT 92##### Loading boot components using XSDB
67 93
681. Download the boot images for the target using XSCT with the `fpga` and `dow` 941. Download the boot images for the target using XSDB with the `fpga` and `dow`
69 command. Zynq boot images will be located in the `${DEPLOY_DIR_IMAGE}` 95 command. Zynq boot images will be located in the `${DEPLOY_DIR_IMAGE}`
70 directory. 96 directory.
71 97
@@ -74,24 +100,24 @@ xsct% targets
74 100
752. Program the bitstream or skip this step if you are loading from u-boot or linux. 1012. Program the bitstream or skip this step if you are loading from u-boot or linux.
76``` 102```
77xsct% fpga -no-revision-check ${DEPLOY_DIR_IMAGE}/download.bit 103xsdb% fpga -no-revision-check ${DEPLOY_DIR_IMAGE}/download.bit
78``` 104```
793. Select APU Cortex-A9 Core 0 to load and execute FSBL. 1053. Select APU Cortex-A9 Core 0 to load and execute FSBL.
80``` 106```
81xsct% targets -set -nocase -filter {name =~ "arm*#0"} 107xsdb% targets -set -nocase -filter {name =~ "arm*#0"}
82xsct% catch {stop} 108xsdb% catch {stop}
83``` 109```
845. Download and run FSBL from APU Cortex-A9 Core 0 1105. Download and run FSBL from APU Cortex-A9 Core 0
85``` 111```
86xsct% dow ${DEPLOY_DIR_IMAGE}/zynq_fsbl.elf 112xsdb% dow ${DEPLOY_DIR_IMAGE}/zynq_fsbl.elf
87xsct% con 113xsdb% con
88``` 114```
897. Now download U-boot.elf and Device tree to APU and execute. 1157. Now download U-boot.elf and Device tree to APU and execute.
90``` 116```
91xsct% stop 117xsdb% stop
92xsct% dow ${DEPLOY_DIR_IMAGE}/u-boot.elf 118xsdb% dow ${DEPLOY_DIR_IMAGE}/u-boot.elf
93xsct% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0x100000 119xsdb% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0x100000
94xsct% con 120xsdb% con
95``` 121```
96 122
978. In the target Serial Terminal, press any key to stop the U-Boot auto-boot. 1238. In the target Serial Terminal, press any key to stop the U-Boot auto-boot.
@@ -101,7 +127,7 @@ Hit any key to stop autoboot: 0
101U-Boot> 127U-Boot>
102``` 128```
103--- 129---
104### Loading Kernel, Root Filesystem and U-boot boot script 130##### Loading Kernel, Root Filesystem and U-boot boot script
105 131
106Load the images into the target DDR load address i.e., 132Load the images into the target DDR load address i.e.,
107`DDR base address + <image_offset>`. 133`DDR base address + <image_offset>`.
@@ -127,53 +153,56 @@ using U-Boot.
127> 4. If common ${DEPLOY_DIR_IMAGE}/system.dtb is used by u-boot and kernel, this 153> 4. If common ${DEPLOY_DIR_IMAGE}/system.dtb is used by u-boot and kernel, this
128> is already part of boot.bin we can skip loading dtb, else load kernel dtb. 154> is already part of boot.bin we can skip loading dtb, else load kernel dtb.
129--- 155---
130#### Using XSCT 156###### Using XSDB
131 157
1321. Suspend the execution of active target using `stop` command in XSCT. 1581. Suspend the execution of active target using `stop` command in XSDB.
133``` 159```
134xsct% stop 160xsdb% stop
135``` 161```
1362. Using the `dow` command to load the images into the target DDR/PL DDR load 1622. Using the `dow` command to load the images into the target DDR/PL DDR load
137 address. 163 address.
138``` 164```
139xsct% dow -data ${DEPLOY_DIR_IMAGE}/uImage 0x200000 165xsdb% dow -data ${DEPLOY_DIR_IMAGE}/uImage 0x200000
140xsct% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0x100000 166xsdb% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0x100000
141xsct% dow -data ${DEPLOY_DIR_IMAGE}/core-image-minimal-${MACHINE}.cpio.gz.u-boot 0x4000000 167xsdb% dow -data ${DEPLOY_DIR_IMAGE}/core-image-minimal-${MACHINE}.cpio.gz.u-boot 0x4000000
142xsct% dow -data ${DEPLOY_DIR_IMAGE}/boot.scr 0x3000000 168xsdb% dow -data ${DEPLOY_DIR_IMAGE}/boot.scr 0x3000000
143``` 169```
144--- 170---
145#### Using TFTP 171###### Using TFTP
146 172
1471. Configure the `ipaddr` and `serverip` of the U-Boot environment. 1731. Setup TFTP directory on host machine and copy the images to your TFTP directory
174 so that you can load them from U-Boot.
1752. Configure the `ipaddr` and `serverip` of the U-Boot environment.
148``` 176```
149Versal> set serverip <server ip> 177Versal> set serverip <server ip>
150Versal> set ipaddr <board ip> 178Versal> set ipaddr <board ip>
151``` 179```
1522. Load the images to DDR address. Make sure images are copied to tftp directory. 1803. Load the images to DDR address.
153``` 181```
154U-Boot> tftpboot 0x200000 ${TFTPDIR}/uImage 182U-Boot> tftpboot 0x200000 uImage
155U-Boot> tftpboot 0x100000 ${TFTPDIR}/system.dtb 183U-Boot> tftpboot 0x100000 system.dtb
156U-Boot> tftpboot 0x4000000 ${TFTPDIR}/core-image-minimal-${MACHINE}.cpio.gz.u-boot 184U-Boot> tftpboot 0x4000000 core-image-minimal-${MACHINE}.cpio.gz.u-boot
157U-Boot> tftpboot 0x3000000 ${TFTPDIR}/boot.scr 185U-Boot> tftpboot 0x3000000 boot.scr
158``` 186```
159--- 187---
160### Booting Linux 188##### Booting Linux
161 189
162Once the images are loaded continue the execution. 190Once the images are loaded continue the execution.
163 191
1641. After loading images resume the execution of active target using the `con` 1921. After loading images resume the execution of active target using the `con`
165command in XSCT shell, Skip step 1 for if you have used TFTP to load images. 193command in XSDB shell, Skip step 1 for if you have used TFTP to load images.
166``` 194```
167xsct% con 195xsdb% con
168``` 196```
1692. Terminate xsct shell. 1972. Terminate xsdb shell.
170``` 198```
171xsct% exit 199xsdb% exit
172``` 200```
1733. In the target Serial Terminal, from U-Boot prompt run `boot` command. 2013. In the target Serial Terminal, from U-Boot prompt run `boot` command.
174``` 202```
175U-Boot> boot 203U-Boot> boot
176``` 204```
205
177--- 206---
178## Booting from SD 207## Booting from SD
179 208
@@ -181,14 +210,15 @@ U-Boot> boot
1812. Configure the ZC702 board to boot in SD-Boot mode (1-OFF, 2-OFF, 3-ON, 4-ON, 5-OFF) 2102. Configure the ZC702 board to boot in SD-Boot mode (1-OFF, 2-OFF, 3-ON, 4-ON, 5-OFF)
182 by setting the SW6. Refer [Setting Up the Target](#setting-up-the-target). 211 by setting the SW6. Refer [Setting Up the Target](#setting-up-the-target).
1833. Follow SD boot instructions [README](README.booting.storage.md) for more details. 2123. Follow SD boot instructions [README](README.booting.storage.md) for more details.
213
184--- 214---
185## Booting from QSPI 215## Booting from QSPI
186 216
1871. To boot ZC702 board in QSPI boot mode, Power on the ZCU102 board and boot 2171. To boot ZC702 board in QSPI boot mode, Power on the ZCU102 board and boot
188 using JTAG or SD boot mode, to ensure that U-Boot is running and also have 218 using JTAG or SD boot mode, to ensure that U-Boot is running and also have
189 boot.bin copied to DDR location using XSCT `dow` or `tftpboot` or `fatload` 219 boot.bin copied to DDR location using XSDB `dow` or `tftpboot` or `fatload`
190 command. 220 command.
1912. Follow Flash boot instructions [README](README.booting.flash.md) for more details. 2212. Follow Flash boot instructions [README](README.booting.flash.md) for more details.
1923. After flashing the images, turn off the power switch on the board, and change 2223. After flashing the images, turn off the power switch on the board, and change
193 the SW16 boot mode pin settings to QSPI boot mode (1-OFF, 2-ON, 3-OFF, 4-OFF, 5-OFF) 223 the SW16 boot mode pin settings to QSPI boot mode (1-OFF, 2-ON, 3-OFF, 4-OFF, 5-OFF)
194 by setting the SW16. Refer [Setting Up the Target](#setting-up-the-target). \ No newline at end of file 224 by setting the SW16. Refer [Setting Up the Target](#setting-up-the-target).
diff --git a/docs/README.booting.zynqmp.md b/docs/README.booting.zynqmp.md
index c8f8aa21..44e6f2b7 100644
--- a/docs/README.booting.zynqmp.md
+++ b/docs/README.booting.zynqmp.md
@@ -5,10 +5,15 @@ NAND boot modes.
5 5
6* [Setting Up the Target](#setting-up-the-target) 6* [Setting Up the Target](#setting-up-the-target)
7* [Booting from JTAG](#booting-from-jtag) 7* [Booting from JTAG](#booting-from-jtag)
8 * [Loading boot components using XSCT](#loading-boot-components-using-xsct) 8 * [Sourcing the XSDB tools](#sourcing-the-xsdb-tools)
9 * [Loading Kernel, Root Filesystem and U-boot boot script](#loading-kernel-root-filesystem-and-u-boot-boot-script) 9 * [Deploying the images to target](#deploying-the-images-to-target)
10 * [Using XSCT](#using-xsct) 10 * [Using devtool boot-jtag script](#using-devtool-boot-jtag-script)
11 * [Using TFTP](#using-tftp) 11 * [Manually executing xsdb commands](#manually-executing-xsdb-commands)
12 * [Loading boot components using XSDB](#loading-boot-components-using-xsdb)
13 * [Loading Kernel, Root Filesystem and U-boot boot script](#loading-kernel-root-filesystem-and-u-boot-boot-script)
14 * [Using XSDB](#using-xsdb)
15 * [Using TFTP](#using-tftp)
16 * [Booting Linux](#booting-linux)
12* [Booting from SD](#booting-from-sd) 17* [Booting from SD](#booting-from-sd)
13* [Booting from QSPI](#booting-from-qspi) 18* [Booting from QSPI](#booting-from-qspi)
14 19
@@ -34,37 +39,61 @@ NAND boot modes.
34 39
35## Booting from JTAG 40## Booting from JTAG
36 41
37This boot flow requires the use of the AMD Xilinx tools, specifically XSCT and 42This boot flow requires the use of the AMD Xilinx tools, specifically XSDB and
38the associated JTAG device drivers. This also requires access to the JTAG interface 43the associated JTAG device drivers. This also requires access to the JTAG interface
39on the board, a number of AMD Xilinx and third-party boards come with on-board JTAG 44on the board, a number of AMD Xilinx and third-party boards come with on-board JTAG
40modules. 45modules.
41 46
421. Source the Vivado or Vitis tools `settings.sh` scripts. 47### Sourcing the XSDB tools
432. Power on the board, Open the XSCT console in the Vitis IDE by clicking the 48
44 XSCT button. Alternatively, you can also open the XSCT console by selecting 49Source the Vivado or Vitis tools `settings.sh` scripts.
45 Xilinx -> XSCT Console. 50
51### Deploying the images to target
52
53Deploying the images can be done in two methods.
54
55#### Using devtool boot-jtag script
56
57> **Note:** For Xen boot flow boot-jtag script doesn't include loading xen, kernel
58> and root filesystem, This step needs to be done manually as mentioned in XSDB
59> or TFTP method below.
60
611. Run devtool command to generate the boot-jtag.tcl script.
62```
63$ devtool boot-jtag --help
64$ devtool boot-jtag --image core-image-minimal --hw_server TCP:<hostname/ip-addr>:3121
46``` 65```
47$ xsct 662. Script will be generated under ${DEPLOY_DIR_IMAGE}/boot-jtag.tcl
673. Execute this script using xsdb tool as shown below.
48``` 68```
493. In the XSCT console, connect to the target over JTAG using the connect command. 69$ xsdb <absolute-path-to-deploy-dir-image>/boot-jtag.tcl
70```
71
72#### Manually executing xsdb commands
73
741. Power on the board, Launch the XSDB shell from command line as shown below.
75```
76$ xsdb
77```
782. In the XSDB console, connect to the target over JTAG using the connect command.
50 Optionally user can use `-url` to specify the local/remote hw_server. The 79 Optionally user can use `-url` to specify the local/remote hw_server. The
51 connect command returns the channel ID of the connection. 80 connect command returns the channel ID of the connection.
52``` 81```
53xsct% connect 82xsdb% connect
54``` 83```
554. The targets command lists the available targets and allows you to select a 843. The targets command lists the available targets and allows you to select a
56 target using its ID. The targets are assigned IDs as they are discovered on 85 target using its ID. The targets are assigned IDs as they are discovered on
57 the JTAG chain, so the IDs can change from session to session. 86 the JTAG chain, so the IDs can change from session to session.
58``` 87```
59xsct% targets 88xsdb% targets
60``` 89```
61 90
62> **Note:** For non-interactive usage such as scripting, you can use the `-filter` 91> **Note:** For non-interactive usage such as scripting, you can use the `-filter`
63 option to select a target instead of selecting the target using its ID. 92 option to select a target instead of selecting the target using its ID.
64 93
65### Loading boot components using XSCT 94##### Loading boot components using XSDB
66 95
671. Download the boot images for the target using XSCT with the `fpga` and `dow` 961. Download the boot images for the target using XSDB with the `fpga` and `dow`
68 command. ZyqnMP boot images will be located in the `${DEPLOY_DIR_IMAGE}` 97 command. ZyqnMP boot images will be located in the `${DEPLOY_DIR_IMAGE}`
69 directory. 98 directory.
70 99
@@ -73,43 +102,46 @@ xsct% targets
73 102
742. Program the bitstream or skip this step if you are loading from u-boot or linux. 1032. Program the bitstream or skip this step if you are loading from u-boot or linux.
75``` 104```
76xsct% fpga -no-revision-check ${DEPLOY_DIR_IMAGE}/download.bit 105xsdb% fpga -no-revision-check ${DEPLOY_DIR_IMAGE}/download.bit
77``` 106```
783. By default, JTAG security gates are enabled. Disable the security gates for 1073. By default, JTAG security gates are enabled. Disable the security gates for
79 DAP, PL TAP, and PMU (this makes the PMU MB target visible to the debugger). 108 DAP, PL TAP, and PMU (this makes the PMU MB target visible to the debugger).
80``` 109```
81xsct% targets -set -nocase -filter {name =~ "*PSU*"} 110xsdb% targets -set -nocase -filter {name =~ "*PSU*"}
82xsct% mask_write 0xFFCA0038 0x1C0 0x1C0 111xsdb% mask_write 0xFFCA0038 0x1C0 0x1C0
83``` 112```
843. Verify if the PMU MB target is listed under the PMU device. Now, load the PMU 1133. Verify if the PMU MB target is listed under the PMU device. Now, load the PMU
85 firmware. 114 firmware.
86``` 115```
87xsct% targets -set -nocase -filter {name =~ "*MicroBlaze PMU*"} 116xsdb% targets -set -nocase -filter {name =~ "*MicroBlaze PMU*"}
88xsct% catch {stop} 117xsdb% catch {stop}
89xsct% dow ${DEPLOY_DIR_IMAGE}/pmufw.elf 118xsdb% dow ${DEPLOY_DIR_IMAGE}/pmufw.elf
90xsct% con 119xsdb% con
91``` 120```
925. Reset APU Cortex-A53 Core 0 to load and execute FSBL, This step is important, 1215. Reset APU Cortex-A53 Core 0 to load and execute FSBL, This step is important,
93 because when the ZynqMP boots up in JTAG boot mode, all the APU and RPU cores 122 because when the ZynqMP boots up in JTAG boot mode, all the APU and RPU cores
94 are held in reset. You must clear the resets on each core before performing 123 are held in reset. You must clear the resets on each core before performing
95 debugging on these cores. You can use the `rst` command in XSCT to clear the 124 debugging on these cores. You can use the `rst` command in XSDB to clear the
96 resets. 125 resets.
97``` 126```
98xsct% targets -set -nocase -filter {name =~ "*A53*#0"} 127xsdb% targets -set -nocase -filter {name =~ "*A53*#0"}
99xsct% rst -processor -clear-registers 128xsdb% rst -processor -clear-registers
100``` 129```
1016. Download and run FSBL from APU Cortex-A53 Core 0 1306. Download and run FSBL from APU Cortex-A53 Core 0
102``` 131```
103xsct% dow ${DEPLOY_DIR_IMAGE}/zynqmp_fsbl.elf 132xsdb% dow ${DEPLOY_DIR_IMAGE}/zynqmp_fsbl.elf
104xsct% con 133xsdb% con
105``` 134```
1067. Now download TF-A, U-boot.elf and Device tree to APU and execute. 1357. Now download TF-A, U-boot.elf and Device tree blob to APU and execute.
136
137> **Note:** For Xen boot system.dtb load address will vary, see below table.
138
107``` 139```
108xsct% stop 140xsdb% stop
109xsct% dow ${DEPLOY_DIR_IMAGE}/bl31.elf 141xsdb% dow ${DEPLOY_DIR_IMAGE}/bl31.elf
110xsct% dow ${DEPLOY_DIR_IMAGE}/u-boot.elf 142xsdb% dow ${DEPLOY_DIR_IMAGE}/u-boot.elf
111xsct% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0x100000 143xsdb% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0x100000
112xsct% con 144xsdb% con
113``` 145```
114 146
1158. In the target Serial Terminal, press any key to stop the U-Boot auto-boot. 1478. In the target Serial Terminal, press any key to stop the U-Boot auto-boot.
@@ -119,20 +151,37 @@ Hit any key to stop autoboot: 0
119U-Boot> 151U-Boot>
120``` 152```
121 153
122### Loading Kernel, Root Filesystem and U-boot boot script 154##### Loading Kernel, Root Filesystem and U-boot boot script
123 155
124Load the images into the target DDR/PL DRR load address i.e., 156Load the images into the target DDR/PL DRR load address i.e.,
125`DDR base address + <image_offset>`. 157`DDR base address + <image_offset>`.
126 158
127Below example uses base DDR address as 0x0 which matches in vivado address editor. 159Below example uses base DDR address as 0x0 which matches in vivado address editor.
128 160
1611. **Linux**
162
129| Image Type | Base DDR Address | Image Offset | Load Address in DDR | 163| Image Type | Base DDR Address | Image Offset | Load Address in DDR |
130|--------------------|------------------|--------------|---------------------| 164|--------------------|------------------|--------------|---------------------|
131| Kernel | 0x0 | 0x200000 | 0x200000 | 165| Linux Kernel | 0x0 | 0x200000 | 0x200000 |
132| Device Tree | 0x0 | 0x1000 | 0x1000 | 166| Device Tree Blob | 0x0 | 0x100000 | 0x100000 |
133| Rootfs | 0x0 | 0x04000000 | 0x4000000 | 167| Rootfs | 0x0 | 0x04000000 | 0x4000000 |
134| U-boot boot script | 0x0 | 0x20000000 | 0x20000000 | 168| U-boot boot script | 0x0 | 0x20000000 | 0x20000000 |
135 169
1702. **Xen**
171
172> **Note:** Xen, Rootfs and Device Tree image offset is calculated as shown below.
173> * `Xen Rootfs = Base DDR Address + Linux Kernel Image Offset(0xE00000) + Size of Linux Kernel Image`
174> * `Xen Kernel = Base DDR Address + Xen Rootfs Image Offset (Ex: 0x2600000) + Size of Xen Rootfs`
175> * `Device Tree Blob = Base DDR Address + Xen Kernel Image Offset (Ex: 0xBA00000) + Size of Device Tree Blob`
176
177| Image Type | Base DDR Address | Image Offset | Load Address in DDR |
178|--------------------|------------------|--------------|---------------------|
179| Linux Kernel | 0x0 | 0xE00000 | 0xE00000 |
180| Xen Rootfs | 0x0 | 0x2600000 | 0x2600000 |
181| Xen Kernel | 0x0 | 0xBA00000 | 0xBA00000 |
182| Device Tree Blob | 0x0 | 0xC000000 | 0xC000000 |
183| U-boot boot script | 0x0 | 0x20000000 | 0x20000000 |
184
136> **Note:** 185> **Note:**
137> 1. `<target-image>` refers to core-image-minimal or petalinux-image-minimal 186> 1. `<target-image>` refers to core-image-minimal or petalinux-image-minimal
138> 2. For pxeboot boot create a symlink for `<target-image>-${MACHINE}-${DATETIME}.cpio.gz.u-boot` 187> 2. For pxeboot boot create a symlink for `<target-image>-${MACHINE}-${DATETIME}.cpio.gz.u-boot`
@@ -145,54 +194,101 @@ using U-Boot.
145> 4. If common ${DEPLOY_DIR_IMAGE}/system.dtb is used by u-boot and kernel, this 194> 4. If common ${DEPLOY_DIR_IMAGE}/system.dtb is used by u-boot and kernel, this
146> is already part of boot.bin we can skip loading dtb, else load kernel dtb. 195> is already part of boot.bin we can skip loading dtb, else load kernel dtb.
147 196
148#### Using XSCT 197###### Using XSDB
149 198
1501. Suspend the execution of active target using `stop` command in XSCT. 1991. Suspend the execution of active target using `stop` command in XSDB.
151``` 200```
152xsct% stop 201xsdb% stop
153``` 202```
1542. Using the `dow` command to load the images into the target DDR/PL DDR load 2032. Using the `dow` command to load the images into the target DDR/PL DDR load
155 address. 204 address.
156```
157xsct% dow -data ${DEPLOY_DIR_IMAGE}/Image 0x200000
158xsct% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0x100000
159xsct% dow -data ${DEPLOY_DIR_IMAGE}/core-image-minimal-${MACHINE}.cpio.gz.u-boot 0x4000000
160xsct% dow -data ${DEPLOY_DIR_IMAGE}/boot.scr 0x20000000
161```
162 205
163#### Using TFTP 206 * Linux XSDB
207 ```
208 xsdb% targets -set -nocase -filter {name =~ "*A53*#0"}
209 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/Image 0x200000
210 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0x100000
211 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/core-image-minimal-${MACHINE}.cpio.gz.u-boot 0x4000000
212 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/boot.scr 0x20000000
213 ```
164 214
1651. Configure the `ipaddr` and `serverip` of the U-Boot environment. 215 * Xen XSDB
166``` 216 ```
167Versal> set serverip <server ip> 217 xsdb% targets -set -nocase -filter {name =~ "*A53*#0"}
168Versal> set ipaddr <board ip> 218 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/Image 0xE00000
219 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/core-image-minimal-${MACHINE}.cpio.gz 0x2600000
220 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/xen 0xBA00000
221 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/system.dtb 0xC000000
222 xsdb% dow -data ${DEPLOY_DIR_IMAGE}/boot.scr 0x20000000
223 ```
224
225###### Using TFTP
226
2271. Setup TFTP directory on host machine and copy the images to your TFTP directory
228 so that you can load them from U-Boot.
2292. Configure the `ipaddr` and `serverip` of the U-Boot environment.
169``` 230```
1702. Load the images to DDR address. Make sure images are copied to tftp directory. 231ZynqMP> set serverip <host-server-ip-address>
232ZynqMP> set ipaddr <board-ip-address>
171``` 233```
172U-Boot> tftpboot 0x200000 ${TFTPDIR}/Image 2343. Load the images to DDR address.
173U-Boot> tftpboot 0x100000 ${TFTPDIR}/system.dtb
174U-Boot> tftpboot 0x4000000 ${TFTPDIR}/core-image-minimal-${MACHINE}.cpio.gz.u-boot
175U-Boot> tftpboot 0x20000000 ${TFTPDIR}/boot.scr
176 235
177``` 236 * Linux TFTP
178### Booting Linux 237 ```
238 U-Boot> tftpboot 0x200000 Image
239 U-Boot> tftpboot 0x100000 system.dtb
240 U-Boot> tftpboot 0x4000000 core-image-minimal-${MACHINE}.cpio.gz.u-boot
241 U-Boot> tftpboot 0x20000000 boot.scr
242 ```
243
244 * Xen TFTP
245 ```
246 U-Boot> tftpboot 0xE00000 Image
247 U-Boot> setenv kernel_size 0x$filesize
248 U-Boot> tftpboot 0x2600000 core-image-minimal-${MACHINE}.cpio.gz
249 U-Boot> setenv ramdisk_size 0x$filesize
250 U-Boot> tftpboot 0xBA00000 xen
251 U-Boot> tftpboot 0xC000000 system.dtb
252 U-Boot> tftpboot 0x20000000 boot.scr
253 ```
254
255##### Booting Linux
179 256
180Once the images are loaded continue the execution. 257Once the images are loaded continue the execution.
181 258
1821. After loading images resume the execution of active target using the `con` 2591. After loading images resume the execution of active target using the `con`
183command in XSCT shell, Skip step 1 for if you have used TFTP to load images. 260command in XSDB shell, Skip step 1 for if you have used TFTP to load images.
184``` 261```
185xsct% con 262xsdb% con
186``` 263```
1872. Terminate xsct shell. 2642. Terminate xsdb shell.
188``` 265```
189xsct% exit 266xsdb% exit
190``` 267```
1913. In the target Serial Terminal, from U-Boot prompt run `boot` command. 2683. In the target Serial Terminal, from U-Boot prompt run `boot` command.
269
270* Linux boot
192``` 271```
193U-Boot> boot 272U-Boot> boot
194``` 273```
195 274
275* XEN JTAG boot
276
277 * XSDB
278 > **Note:** You need to calculate the Kernel(kernel_size) and ramdisk(ramdisk_size)
279 > image size manually from `${DEPLOY_DIR_IMAGE}` directory. For example if your
280 > kernel size is 24269312 bytes you need to convert to hex 0x1725200 and use it.
281 ```
282 U-Boot> setenv kernel_size <filesize>
283 U-Boot> setenv ramdisk_size <filesize>
284 U-Boot> boot
285 ```
286
287 * TFTP
288 ```
289 U-Boot> boot
290 ```
291
196## Booting from SD 292## Booting from SD
197 293
1981. Load the SD card into the ZCU102 board in the J100 SD slot. 2941. Load the SD card into the ZCU102 board in the J100 SD slot.
@@ -204,9 +300,9 @@ U-Boot> boot
204 300
2051. To boot ZCU012 board in QSPI boot mode, Power on the ZCU102 board and boot 3011. To boot ZCU012 board in QSPI boot mode, Power on the ZCU102 board and boot
206 using JTAG or SD boot mode, to ensure that U-Boot is running and also have 302 using JTAG or SD boot mode, to ensure that U-Boot is running and also have
207 boot.bin copied to DDR location using XSCT `dow` or `tftpboot` or `fatload` 303 boot.bin copied to DDR location using XSDB `dow` or `tftpboot` or `fatload`
208 command. 304 command.
2092. Follow Flash boot instructions [README](README.booting.flash.md) for more details. 3052. Follow Flash boot instructions [README](README.booting.flash.md) for more details.
2103. After flashing the images, turn off the power switch on the board, and change 3063. After flashing the images, turn off the power switch on the board, and change
211 the SW6 boot mode pin settings to QSPI boot mode (1-ON, 2-ON, 3-OFF, 4-ON) by 307 the SW6 boot mode pin settings to QSPI boot mode (1-ON, 2-ON, 3-OFF, 4-ON) by
212 setting the SW6. Refer [Setting Up the Target](#setting-up-the-target). \ No newline at end of file 308 setting the SW6. Refer [Setting Up the Target](#setting-up-the-target).
diff --git a/docs/README.dfx.user.dts.md b/docs/README.dfx.user.dts.md
index 69e1e52b..9caf866e 100644
--- a/docs/README.dfx.user.dts.md
+++ b/docs/README.dfx.user.dts.md
@@ -16,11 +16,12 @@ following use cases.
16> **Note:** Refer https://github.com/Xilinx/dfx-mgr/blob/master/README.md for 16> **Note:** Refer https://github.com/Xilinx/dfx-mgr/blob/master/README.md for
17> shell.json and accel.json file content. 17> shell.json and accel.json file content.
18 18
19* **Zynq-7000 and ZynqMP**: 19* **Zynq 7000, ZynqMP and Versal**:
20 * Design: Vivado flat design. 20 * Design: Vivado flat or Segmented Configuration design.
21 * Input files to firmware recipes: .bit, .dtsi or dtbo and shell.json (optional) 21 * Input files to firmware recipes: .bit or .bin or _pld.pdi, .dtsi or dtbo and shell.json (optional)
22 * Usage Examples: 22 * Usage Examples:
23``` 23```
24# Zynq 7000 or ZynqMP flat design
24SRC_URI = " \ 25SRC_URI = " \
25 file://<flat_design_pl>.bit \ 26 file://<flat_design_pl>.bit \
26 file://<flat_design_pl>.dtsi \ 27 file://<flat_design_pl>.dtsi \
@@ -29,6 +30,7 @@ SRC_URI = " \
29``` 30```
30 31
31``` 32```
33# Zynq 7000 or ZynqMP flat design
32SRC_URI = " \ 34SRC_URI = " \
33 file://<flat_design_pl>.bit \ 35 file://<flat_design_pl>.bit \
34 file://<flat_design_pl>.dtbo \ 36 file://<flat_design_pl>.dtbo \
@@ -36,9 +38,69 @@ SRC_URI = " \
36 " 38 "
37``` 39```
38 40
41```
42# Zynq 7000 or ZynqMP flat design
43SRC_URI = " \
44 file://<flat_design_pl>.bin \
45 file://<flat_design_pl>.dtsi \
46 file://shell.json \
47 "
48```
49
50```
51# Zynq 7000 or ZynqMP flat design
52SRC_URI = " \
53 file://<flat_design_pl>.bin \
54 file://<flat_design_pl>.dtbo \
55 file://shell.json \
56 "
57```
58
59```
60# Zynq 7000 or ZynqMP flat design
61SRC_URI = " \
62 file://<flat_design_pl>.bit \
63 file://shell.json \
64 "
65```
66
67```
68# Zynq 7000 or ZynqMP flat design
69SRC_URI = " \
70 file://<flat_design_pl>.bin \
71 file://shell.json \
72 "
73```
74
75```
76# Versal Segmented Configuration design
77SRC_URI = " \
78 file://<flat_design>_pld.pdi \
79 file://<flat_design>_pld.dtsi \
80 file://shell.json \
81 "
82```
83
84```
85# Versal Segmented Configuration design
86SRC_URI = " \
87 file://<flat_design>_pld.pdi \
88 file://<flat_design>_pld.dtbo \
89 file://shell.json \
90 "
91```
92
93```
94# Versal Segmented Configuration design
95SRC_URI = " \
96 file://<flat_design>_pld.pdi \
97 file://shell.json \
98 "
99```
100
39* **ZynqMP and Versal**: 101* **ZynqMP and Versal**:
40 * Design: Vivado DFx design. 102 * Design: Vivado DFx design.
41 * Input files to firmware recipes: .bit(ZynqMP) or .pdi(Versal), .dtsi or dtbo 103 * Input files to firmware recipes: .bit/bin(ZynqMP) or .pdi(Versal), .dtsi or dtbo
42 shell.json or accel.json (optional) and .xclbin (optional). 104 shell.json or accel.json (optional) and .xclbin (optional).
43 * Usage Examples: 105 * Usage Examples:
44 106
@@ -63,6 +125,44 @@ SRC_URI = " \
63``` 125```
64 126
65``` 127```
128# ZynqMP DFx Static
129SRC_URI = " \
130 file://<dfx_design_static_pl>.bin \
131 file://<dfx_design_static_pl>.dtsi \
132 file://shell.json \
133 file://<dfx_design_static_pl>.xclbin \
134 "
135```
136
137```
138# ZynqMP DFx Static
139SRC_URI = " \
140 file://<dfx_design_static_pl>.bin \
141 file://<dfx_design_static_pl>.dtbo \
142 file://shell.json \
143 file://<dfx_design_static_pl>.xclbin \
144 "
145```
146
147```
148# ZynqMP DFx Static
149SRC_URI = " \
150 file://<dfx_design_static_pl>.bit \
151 file://shell.json \
152 file://<dfx_design_static_pl>.xclbin \
153 "
154```
155
156```
157# ZynqMP DFx Static
158SRC_URI = " \
159 file://<dfx_design_static_pl>.bin \
160 file://shell.json \
161 file://<dfx_design_static_pl>.xclbin \
162 "
163```
164
165```
66# ZynqMP DFx RP 166# ZynqMP DFx RP
67SRC_URI = " \ 167SRC_URI = " \
68 file://<dfx_design_rp_rm_pl>.bit \ 168 file://<dfx_design_rp_rm_pl>.bit \
@@ -81,6 +181,45 @@ SRC_URI = " \
81 file://<dfx_design_rp_rm_pl>.xclbin \ 181 file://<dfx_design_rp_rm_pl>.xclbin \
82 " 182 "
83``` 183```
184
185```
186# ZynqMP DFx RP
187SRC_URI = " \
188 file://<dfx_design_rp_rm_pl>.bin \
189 file://<dfx_design_rp_rm_pl>.dtsi \
190 file://accel.json \
191 file://<dfx_design_rp_rm_pl>.xclbin \
192 "
193```
194
195```
196# ZynqMP DFx RP
197SRC_URI = " \
198 file://<dfx_design_rp_rm_pl>.bin \
199 file://<dfx_design_rp_rm_pl>.dtbo \
200 file://accel.json \
201 file://<dfx_design_rp_rm_pl>.xclbin \
202 "
203```
204
205```
206# ZynqMP DFx RP
207SRC_URI = " \
208 file://<dfx_design_rp_rm_pl>.bit \
209 file://accel.json \
210 file://<dfx_design_rp_rm_pl>.xclbin \
211 "
212```
213
214```
215# ZynqMP DFx RP
216SRC_URI = " \
217 file://<dfx_design_rp_rm_pl>.bin \
218 file://accel.json \
219 file://<dfx_design_rp_rm_pl>.xclbin \
220 "
221```
222
84``` 223```
85# Versal DFx Static 224# Versal DFx Static
86SRC_URI = " \ 225SRC_URI = " \
@@ -102,6 +241,15 @@ SRC_URI = " \
102``` 241```
103 242
104``` 243```
244# Versal DFx Static
245SRC_URI = " \
246 file://<dfx_design_static_pl>.pdi \
247 file://shell.json \
248 file://<dfx_design_static_pl>.xclbin \
249 "
250```
251
252```
105# Versal DFx RP 253# Versal DFx RP
106SRC_URI = " \ 254SRC_URI = " \
107 file://<dfx_design_rp_rm_pl>.pdi \ 255 file://<dfx_design_rp_rm_pl>.pdi \
@@ -120,16 +268,29 @@ SRC_URI = " \
120 file://<dfx_design_rp_rm_pl>.xclbin \ 268 file://<dfx_design_rp_rm_pl>.xclbin \
121 " 269 "
122``` 270```
271
272```
273# Versal DFx RP
274SRC_URI = " \
275 file://<dfx_design_rp_rm_pl>.pdi \
276 file://accel.json \
277 file://<dfx_design_rp_rm_pl>.xclbin \
278 "
279```
123--- 280---
124 281
125## How to create a firmware recipe app 282## How to create a firmware recipe app
126 283
1271. Follow [Building Instructions](../README.building.md) upto step 4. 2841. Follow SDT or XSCT Build instructions whichever build method is used but not
1282. Create recipes-firmware directory in meta layer and copy the .bit/pdi, 285 both.
286 a. [SDT Building Instructions](../meta-xilinx-standalone-experimental/README.md) upto step 4.
287 b. [XSCT Building Instructions](../README.building.md)
288 upto step 4.b (With SDT overlay).
2892. Create recipes-firmware directory in meta layer and copy the .bit/bin/pdi,
129 .dtsi/dtbo, .json and .xclbin file to these directories. 290 .dtsi/dtbo, .json and .xclbin file to these directories.
130``` 291```
131$ mkdir -p <meta-layer>/recipes-firmware/<recipes-firmware-app>/files 292$ mkdir -p <meta-layer>/recipes-firmware/<recipes-firmware-app>/files
132$ cp -r <path-to-files>/*.{bit or pdi, dtsi or dtbo, shell.json or accel.json and .xclbin} <meta-layer>/recipes-firmware/<firmware-app-name>/files 293$ cp -r <path-to-files>/*.{bit or bin or pdi, dtsi or dtbo, shell.json or accel.json and .xclbin} <meta-layer>/recipes-firmware/<firmware-app-name>/files
133``` 294```
1343. Now create the recipes for flat or static or partial firmware using recipetool. 2953. Now create the recipes for flat or static or partial firmware using recipetool.
135``` 296```
@@ -144,8 +305,9 @@ LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda
144inherit dfx_user_dts 305inherit dfx_user_dts
145 306
146SRC_URI = "\ 307SRC_URI = "\
147 file://zcu111-pl-demo.bit \ 308 file://shell.json \
148 file://zcu111-pl-demo.dtsi \ 309 file://zcu111-pl-demo-user-dts.bit \
310 file://zcu111-pl-demo-user-dts.dtsi \
149 " 311 "
150 312
151COMPATIBLE_MACHINE ?= "^$" 313COMPATIBLE_MACHINE ?= "^$"
@@ -153,7 +315,7 @@ COMPATIBLE_MACHINE:zynqmp = "zynqmp"
153``` 315```
1545. Add firmware-recipe app to image and enable fpga-overlay machine features to 3165. Add firmware-recipe app to image and enable fpga-overlay machine features to
155 local.conf as shown below. 317 local.conf as shown below.
156> **Note:** fpga-manager-script provides fpgautil tool to load .bit/pdi and dtbo 318> **Note:** fpga-manager-script provides fpgautil tool to load .bin/pdi and dtbo
157> at runtime linux. 319> at runtime linux.
158``` 320```
159MACHINE_FEATURES += "fpga-overlay" 321MACHINE_FEATURES += "fpga-overlay"
@@ -162,7 +324,11 @@ IMAGE_INSTALL:append = " \
162 fpga-manager-script \ 324 fpga-manager-script \
163 " 325 "
164``` 326```
1656. Follow [Building Instructions](../README.building.md) and continue from step 5. 3276. Follow SDT or XSCT Build instructions whichever build method is used but not
328 both.
329 a. [SDT Building Instructions](../meta-xilinx-standalone-experimental/README.md ) and continue from step 5.
330 b. [XSCT Building Instructions](../README.building.md)
331 and continue from step 5.
1667. Once images are built firmware app files will be installed on target_rootfs. 3327. Once images are built firmware app files will be installed on target_rootfs.
167``` 333```
168# <target_rootfs>/lib/firmware/xilinx/firmware-app-name 334# <target_rootfs>/lib/firmware/xilinx/firmware-app-name
@@ -170,7 +336,7 @@ IMAGE_INSTALL:append = " \
170--- 336---
171 337
172## Test Procedure on Target 338## Test Procedure on Target
173* Once Linux boots on target, use fpgautil command to load .bit or .pdi and 339* Once Linux boots on target, use fpgautil command to load .bin or .pdi and
174 corresponding dt overlay as shown below. 340 corresponding dt overlay as shown below.
175> **Note:** firmware can be loaded only with sudo or root permissions. 341> **Note:** firmware can be loaded only with sudo or root permissions.
176--- 342---
@@ -179,142 +345,188 @@ IMAGE_INSTALL:append = " \
179 345
180* ZynqMP 346* ZynqMP
181``` 347```
182yocto-zynqmp-generic-20231:~$ sudo su 348yocto-zynqmp-generic:~$ cd /
183yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts 349yocto-zynqmp-generic:/$ sudo su
350yocto-zynqmp-generic:/# cat /proc/interrupts
184 CPU0 CPU1 CPU2 CPU3 351 CPU0 CPU1 CPU2 CPU3
185 11: 13309 13021 13673 14170 GICv2 30 Level arch_timer 352 11: 3399 4404 3273 3113 GICv2 30 Level arch_timer
186 14: 0 0 0 0 GICv2 67 Level zynqmp_ipi 353 14: 0 0 0 0 GICv2 67 Level zynqmp-ipi
187 15: 0 0 0 0 GICv2 175 Level arm-pmu 354 15: 0 0 0 0 GICv2 58 Level ffa60000.rtc
188 16: 0 0 0 0 GICv2 176 Level arm-pmu 355 16: 0 0 0 0 GICv2 59 Level ffa60000.rtc
189 17: 0 0 0 0 GICv2 177 Level arm-pmu 356 17: 0 0 0 0 GICv2 88 Level ams-irq
190 18: 0 0 0 0 GICv2 178 Level arm-pmu 357 18: 0 0 0 0 GICv2 155 Level axi-pmon, axi-pmon
191 19: 0 0 0 0 GICv2 58 Level ffa60000.rtc 358 19: 0 0 0 0 GICv2 175 Level arm-pmu
192 20: 0 0 0 0 GICv2 59 Level ffa60000.rtc 359 20: 0 0 0 0 GICv2 176 Level arm-pmu
193 21: 0 0 0 0 GICv2 42 Level ff960000.memory-controller 360 21: 0 0 0 0 GICv2 177 Level arm-pmu
194 22: 0 0 0 0 GICv2 88 Level ams-irq 361 22: 0 0 0 0 GICv2 178 Level arm-pmu
195 23: 0 0 0 0 GICv2 155 Level axi-pmon, axi-pmon 362 23: 379 0 0 0 GICv2 53 Level xuartps
196 24: 327 0 0 0 GICv2 53 Level xuartps 363 26: 0 0 0 0 GICv2 156 Level zynqmp-dma
197 27: 0 0 0 0 GICv2 156 Level zynqmp-dma 364 27: 0 0 0 0 GICv2 157 Level zynqmp-dma
198 28: 0 0 0 0 GICv2 157 Level zynqmp-dma 365 28: 0 0 0 0 GICv2 158 Level zynqmp-dma
199 29: 0 0 0 0 GICv2 158 Level zynqmp-dma 366 29: 0 0 0 0 GICv2 159 Level zynqmp-dma
200 30: 0 0 0 0 GICv2 159 Level zynqmp-dma 367 30: 0 0 0 0 GICv2 160 Level zynqmp-dma
201 31: 0 0 0 0 GICv2 160 Level zynqmp-dma 368 31: 0 0 0 0 GICv2 161 Level zynqmp-dma
202 32: 0 0 0 0 GICv2 161 Level zynqmp-dma 369 32: 0 0 0 0 GICv2 162 Level zynqmp-dma
203 33: 0 0 0 0 GICv2 162 Level zynqmp-dma 370 33: 0 0 0 0 GICv2 163 Level zynqmp-dma
204 34: 0 0 0 0 GICv2 163 Level zynqmp-dma 371 34: 0 0 0 0 GICv2 109 Level zynqmp-dma
205 35: 0 0 0 0 GICv2 109 Level zynqmp-dma 372 35: 0 0 0 0 GICv2 110 Level zynqmp-dma
206 36: 0 0 0 0 GICv2 110 Level zynqmp-dma 373 36: 0 0 0 0 GICv2 111 Level zynqmp-dma
207 37: 0 0 0 0 GICv2 111 Level zynqmp-dma 374 37: 0 0 0 0 GICv2 112 Level zynqmp-dma
208 38: 0 0 0 0 GICv2 112 Level zynqmp-dma 375 38: 0 0 0 0 GICv2 113 Level zynqmp-dma
209 39: 0 0 0 0 GICv2 113 Level zynqmp-dma 376 39: 0 0 0 0 GICv2 114 Level zynqmp-dma
210 40: 0 0 0 0 GICv2 114 Level zynqmp-dma 377 40: 0 0 0 0 GICv2 115 Level zynqmp-dma
211 41: 0 0 0 0 GICv2 115 Level zynqmp-dma 378 41: 0 0 0 0 GICv2 116 Level zynqmp-dma
212 42: 0 0 0 0 GICv2 116 Level zynqmp-dma 379 42: 0 0 0 0 GICv2 154 Level fd4c0000.dma-controller
213 43: 0 0 0 0 GICv2 154 Level fd4c0000.dma-controller 380 43: 11183 0 0 0 GICv2 47 Level ff0f0000.spi
214 44: 5938 0 0 0 GICv2 47 Level ff0f0000.spi 381 44: 77 0 0 0 GICv2 95 Level eth0, eth0
215 45: 76 0 0 0 GICv2 95 Level eth0, eth0 382 45: 0 0 0 0 GICv2 57 Level axi-pmon, axi-pmon
216 46: 0 0 0 0 GICv2 57 Level axi-pmon, axi-pmon 383 46: 2365 0 0 0 GICv2 49 Level cdns-i2c
217 47: 4802 0 0 0 GICv2 49 Level cdns-i2c 384 47: 326 0 0 0 GICv2 50 Level cdns-i2c
218 48: 501 0 0 0 GICv2 50 Level cdns-i2c 385 49: 0 0 0 0 GICv2 84 Edge ff150000.watchdog
219 50: 0 0 0 0 GICv2 84 Edge ff150000.watchdog 386 50: 0 0 0 0 GICv2 151 Level fd4a0000.display
220 51: 0 0 0 0 GICv2 151 Level fd4a0000.display 387 51: 551 0 0 0 GICv2 81 Level mmc0
221 52: 548 0 0 0 GICv2 81 Level mmc0 388 52: 0 0 0 0 GICv2 165 Level ahci-ceva[fd0c0000.ahci]
222 53: 0 0 0 0 GICv2 165 Level ahci-ceva[fd0c0000.ahci] 389 53: 0 0 0 0 GICv2 97 Level xhci-hcd:usb1
223 54: 0 0 0 0 GICv2 97 Level xhci-hcd:usb1 390 54: 0 0 0 0 zynq-gpio 22 Edge sw19
224 55: 0 0 0 0 zynq-gpio 22 Edge sw19 391IPI0: 73 69 133 115 Rescheduling interrupts
225IPI0: 64 25 87 38 Rescheduling interrupts 392IPI1: 2590 1426 1711 13134 Function call interrupts
226IPI1: 1933 6579 1096 5686 Function call interrupts
227IPI2: 0 0 0 0 CPU stop interrupts 393IPI2: 0 0 0 0 CPU stop interrupts
228IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts 394IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts
229IPI4: 0 0 0 0 Timer broadcast interrupts 395IPI4: 0 0 0 0 Timer broadcast interrupts
230IPI5: 0 0 0 0 IRQ work interrupts 396IPI5: 0 0 0 0 IRQ work interrupts
231IPI6: 0 0 0 0 CPU wake-up interrupts 397IPI6: 0 0 0 0 CPU wake-up interrupts
232Err: 0 398Err: 0
233yocto-zynqmp-generic-20231:/home/petalinux# tree /lib/firmware/ 399yocto-zynqmp-generic:/#
400yocto-zynqmp-generic:/# tree /lib/firmware/
234/lib/firmware/ 401/lib/firmware/
235`-- xilinx 402`-- xilinx
236 `-- zcu111-pl-demo 403 `-- zcu111-pl-demo-user-dts
237 |-- zcu111-pl-demo.bit.bin 404 |-- shell.json
238 `-- zcu111-pl-demo.dtbo 405 |-- zcu111-pl-demo-user-dts.bin
239 406 `-- zcu111-pl-demo-user-dts.dtbo
2402 directories, 2 files 407
241yocto-zynqmp-generic-20231:/home/petalinux# fpgautil -b /lib/firmware/xilinx/zcu111-pl-demo/zcu111-pl-demo.bit -o /lib/firmware/xilinx/zcu111-pl-demo/zcu111-pl-demo.dtbo 4082 directories, 3 files
242[ 91.039773] fpga_manager fpga0: writing zcu111-pl-demo.bit to Xilinx ZynqMP FPGA Manager 409yocto-zynqmp-generic:/#
243[ 91.528214] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/firmware-name 410yocto-zynqmp-generic:/# fpgautil -b /lib/firmware/xilinx/zcu111-pl-demo-user-dts/zcu111-pl-demo-user-dts.bin -o /lib/firmware/xilinx/zcu111-pl-demo-user-dts/zcu111-pl-demo-user-dts.dtbo
244[ 91.538354] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/pid 411[ 86.077583] fpga_manager fpga0: writing zcu111-pl-demo-user-dts.bin to Xilinx ZynqMP FPGA Manager
245[ 91.547598] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/resets 412[ 86.300854] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-region/firmware-name
246[ 91.557087] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/uid 413[ 86.311158] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-region/pid
247[ 91.566804] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/afi0 414[ 86.320571] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-region/resets
248[ 91.576312] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/clocking0 415[ 86.330230] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-region/uid
249[ 91.586255] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_0 416[ 86.340074] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/afi0
250[ 91.596280] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/misc_clk_0 417[ 86.349574] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/clocking0
251[ 91.606300] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_1 418[ 86.359510] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_0
252[ 91.616325] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_2 419[ 86.369526] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/misc_clk_0
253[ 91.626342] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_uartlite_0 420[ 86.379544] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_1
254[ 91.636705] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/ddr4_0 421[ 86.389561] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_2
255[ 91.661849] gpio gpiochip3: (a0000000.gpio): not an immutable chip, please consider fixing it! 422[ 86.399588] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_uartlite_0
256[ 91.662020] gpio gpiochip4: (a0010000.gpio): not an immutable chip, please consider fixing it! 423[ 86.409951] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/ddr4_0
257[ 91.863492] a0030000.serial: ttyUL0 at MMIO 0xa0030000 (irq = 58, base_baud = 0) is a uartlite 424[ 86.439309] a0030000.serial: ttyUL0 at MMIO 0xa0030000 (irq = 57, base_baud = 0) is a uartlite
258[ 91.876674] uartlite a0030000.serial: Runtime PM usage count underflow! 425[ 86.456365] uartlite a0030000.serial: Runtime PM usage count underflow!
259[ 91.906539] input: pl-gpio-keys as /devices/platform/pl-gpio-keys/input/input1 426[ 86.466353] input: axi:pl-gpio-keys as /devices/platform/axi/axi:pl-gpio-keys/input/input1
260Time taken to load BIN is 901.000000 Milli Seconds 427Time taken to load BIN is 402.000000 Milli Seconds
261BIN FILE loaded through FPGA manager successfully 428BIN FILE loaded through FPGA manager successfully
262yocto-zynqmp-generic-20231:/home/petalinux# 429yocto-zynqmp-generic:/#
263``` 430```
264* Versal (DFx Static) 431* Versal (DFx Static)
265``` 432```
266yocto-vck190-dfx-2023:~$ sudo su 433yocto-vck190-versal:/$ sudo su
267root@yocto-vck190-dfx-2023:~# 434yocto-vck190-versal:/# fpgautil -b /lib/firmware/xilinx/vck190-dfx-static/vck190-dfx-static.pdi -o /lib/firmware/xilinx/vck190-dfx-static/vck190-dfx-static.dtbo
268root@yocto-vck190-dfx-2023:~# fpgautil -o /lib/firmware/xilinx/vck190-dfx-static/vck190-dfx-static.dtbo 435[ 110.575263] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/external-fpga-config
269[ 257.555571] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/external-fpga-config 436[ 110.585557] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/pid
270[ 257.565879] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/pid 437[ 110.594365] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/uid
271[ 257.574670] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/uid 438[ 110.603307] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR0
272[ 257.583599] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR0 439[ 110.613152] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR1
273[ 257.593434] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR1 440[ 110.623007] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR2
274[ 257.603268] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR2 441[ 110.632849] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_axi_bram_ctrl_0
275[ 257.613100] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_axi_bram_ctrl_0 442[ 110.644516] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp1
276[ 257.624762] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp1 443[ 110.656351] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp2
277[ 257.636589] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp2 444[ 110.668188] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp3
278[ 257.648415] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp3 445[ 110.682762] of-fpga-region fpga:fpga-PR0: FPGA Region probed
279[ 257.663234] of-fpga-region fpga:fpga-PR0: FPGA Region probed 446[ 110.689956] of-fpga-region fpga:fpga-PR1: FPGA Region probed
280[ 257.669135] of-fpga-region fpga:fpga-PR1: FPGA Region probed 447[ 110.695890] of-fpga-region fpga:fpga-PR2: FPGA Region probed
281[ 257.675022] of-fpga-region fpga:fpga-PR2: FPGA Region probed 448Time taken to load BIN is 133.000000 Milli Seconds
282root@yocto-vck190-dfx-2023:~# 449BIN FILE loaded through FPGA manager successfully
450yocto-vck190-versal:/#
283``` 451```
284* Versal (DFx RP) 452* Versal (DFx RP)
285``` 453```
286root@yocto-vck190-dfx-2023:~# fpgautil -b /lib/firmware/xilinx/vck190-dfx-static/rp1/vck190-dfx-rp1rm1-dipsw/vck190-dfx-rp1rm1-dipsw.pdi -o /lib/firmware/xilinx/vck190-dfx-static/rp1/vck190-dfx-rp1rm1-dipsw/vck190-dfx-rp1rm1-dipsw.dtbo -f Partial -n PR0 454yocto-vck190-versal:/$ sudo su
287[ 273.511455] fpga_manager fpga0: writing vck190-dfx-rp1rm1-dipsw.pdi to Xilinx Versal FPGA Manager 455yocto-vck190-versal:/# fpgautil -b /lib/firmware/xilinx/vck190-dfx-rp1rm1-dipsw/vck190-dfx-rp1rm1-dipsw.pdi -o /lib/firmware/xilinx/vck190-dfx-rp1rm1-dipsw/vck190-dfx-rp1rm1-dipsw.dtbo -f Partial -n PR0
288[284052.461]Loading PDI from DDR 456[ 154.155127] fpga_manager fpga0: writing vck190-dfx-rp1rm1-dipsw.pdi to Xilinx Versal FPGA Manager
289[284052.566]Monolithic/Master Device 457[173465.709]Loading PDI from DDR
290[284055.847]3.365 ms: PDI initialization time 458[173465.800]Monolithic/Master Device
291[284059.809]+++Loading Image#: 0x0, Name: pl_cfi, Id: 0x18700002 459[173469.235]3.520 ms: PDI initialization time
292[284065.432]---Loading Partition#: 0x0, Id: 0x103 460[173473.045]+++Loading Image#: 0x0, Name: pl_cfi, Id: 0x18700002
293[284069.829] 0.033 ms for Partition#: 0x0, Size: 1312 Bytes 461[173478.669]---Loading Partition#: 0x0, Id: 0x103
294[284074.973]---Loading Partition#: 0x1, Id: 0x105 462[173483.052] 0.032 ms for Partition#: 0x0, Size: 1264 Bytes
295[284079.344] 0.007 ms for Partition#: 0x1, Size: 160 Bytes 463[173488.219]---Loading Partition#: 0x1, Id: 0x203
296[284084.430]---Loading Partition#: 0x2, Id: 0x205 464[173492.599] 0.030 ms for Partition#: 0x1, Size: 672 Bytes
297[284088.844] 0.049 ms for Partition#: 0x2, Size: 960 Bytes 465[173497.682]---Loading Partition#: 0x2, Id: 0x303
298[284093.887]---Loading Partition#: 0x3, Id: 0x203 466[173503.193] 1.159 ms for Partition#: 0x2, Size: 204960 Bytes
299[284098.280] 0.030 ms for Partition#: 0x3, Size: 688 Bytes 467[173507.400]---Loading Partition#: 0x3, Id: 0x403
300[284103.342]---Loading Partition#: 0x4, Id: 0x303 468[173511.805] 0.054 ms for Partition#: 0x3, Size: 8400 Bytes
301[284108.863] 1.156 ms for Partition#: 0x4, Size: 209440 Bytes 469[173516.979]Subsystem PDI Load: Done
302[284113.052]---Loading Partition#: 0x5, Id: 0x305 470[ 154.220425] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/rp1_axi_gpio_0
303[284117.712] 0.296 ms for Partition#: 0x5, Size: 3536 Bytes 471[ 154.239592] input: axi:pl-gpio-keys as /devices/platform/axi/axi:pl-gpio-keys/input/input1
304[284122.594]---Loading Partition#: 0x6, Id: 0x403 472Time taken to load BIN is 99.000000 Milli Seconds
305[284126.991] 0.034 ms for Partition#: 0x6, Size: 8096 Bytes
306[284132.136]---Loading Partition#: 0x7, Id: 0x405
307[284136.507] 0.007 ms for Partition#: 0x7, Size: 160 Bytes
308[284141.636]Subsystem PDI Load: Done
309[ 273.615503] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/firmware-name
310[ 273.627382] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/fpga-bridges
311[ 273.636953] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/partial-fpga-config
312[ 273.647241] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/rp1_axi_gpio_0
313[ 273.660826] gpio gpiochip1: (a4010000.gpio): not an immutable chip, please consider fixing it!
314[ 273.670490] input: pl-gpio-keys as /devices/platform/pl-gpio-keys/input/input0
315Time taken to load BIN is 171.000000 Milli Seconds
316BIN FILE loaded through FPGA manager successfully 473BIN FILE loaded through FPGA manager successfully
317root@yocto-vck190-dfx-2023:~# 474yocto-vck190-versal:/#
475```
476* Versal (Segmented Configuration)
477```
478yocto-vck190-versal:/$ sudo su
479yocto-vck190-versal:/# fpgautil -b /lib/firmware/xilinx/vck190-dfx-full/vck190-dfx-full.pdi -o /lib/firmware/xilinx/vck190-dfx-full/vck190-dfx-full.dtbo
480[ 642.857986] fpga_manager fpga0: writing vck190-dfx-full.pdi to Xilinx Versal FPGA Manager
481[653673.622]Loading PDI from DDR
482[653673.713]Monolithic/Master Device
483[653677.159]3.531 ms: PDI initialization time
484[653680.973]+++Loading Image#: 0x0, Name: pl_cfi, Id: 0x18700001
485[653686.608]---Loading Partition#: 0x0, Id: 0x103
486[653705.058] 14.091 ms for Partition#: 0x0, Size: 22176 Bytes
487[653707.626]---Loading Partition#: 0x1, Id: 0x105
488[653712.243] 0.264 ms for Partition#: 0x1, Size: 4784 Bytes
489[653717.183]---Loading Partition#: 0x2, Id: 0x205
490[653725.148] 3.608 ms for Partition#: 0x2, Size: 64368 Bytes
491[653727.632]---Loading Partition#: 0x3, Id: 0x203
492[653732.018] 0.030 ms for Partition#: 0x3, Size: 672 Bytes
493[653737.107]---Loading Partition#: 0x4, Id: 0x303
494[653768.983] 27.516 ms for Partition#: 0x4, Size: 1115456 Bytes
495[653771.723]---Loading Partition#: 0x5, Id: 0x305
496[653777.150] 1.068 ms for Partition#: 0x5, Size: 69056 Bytes
497[653781.371]---Loading Partition#: 0x6, Id: 0x403
498[653785.892] 0.166 ms for Partition#: 0x6, Size: 242320 Bytes
499[653791.103]---Loading Partition#: 0x7, Id: 0x405
500ERR PldMemCtrlrMap: 0x490E
501ERR PldInitNode: 0xFFFF
502ERR XPm_InitNode: 0xFFFF
503ALERT XPm_ProcessCmd: Error 0x15 while processing command 0xC023E
504ALERT XPm_ProcessCmd: Err Code: 0x15
505[653811.158]CMD: 0x000C023E execute failed, Processed Cdo Length 0x129C
506[653817.390]CMD Payload START, Len:0x00000008
507 0x00000000F20012C0: 0x18700001 0x0000000A 0xF6110000 0x00000002
508 0x00000000F20012CC: 0x00000000 0x00000000 0x80000000 0x00000000
509 0x00000000F20012DC:
510[653834.800]CMD Payload END
511[653837.277]Error loading PL data:
512CFU_ISR: 0x00000000, CFU_STATUS: 0x00002A8C
513PMC ERR1: 0x00000000, PMC ERR2: 0x00000000
514[653848.127]PLM Error Status: 0x223E0015
515[65 851.704]XPlm _IpiDispatehHandl0:: Error:hIPI crmmand faileddfor tommanA ID: 0x1000701
516[653859.465]PLM Error Status: 0x27010015
517[ 643.063905] fpga_region region0: failed to load FPGA image
518[ 643.069420] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/firmware-name
519[ 643.079075] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/pid
520[ 643.087857] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/uid
521[ 643.096849] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_bram_ctrl_0
522[ 643.107288] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_dip_sw
523[ 643.117729] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_led
524[ 643.127906] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_pb
525[ 643.137996] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_uartlite_0
526[ 643.178340] 20100000000.serial: ttyUL0 at MMIO 0x20100000000 (irq = 41, base_baud = 0) is a uartlite
527[ 643.189536] uartlite 20100000000.serial: Runtime PM usage count underflow!
528[ 643.198059] input: axi:pl-gpio-keys as /devices/platform/axi/axi:pl-gpio-keys/input/input0
529yocto-vck190-versal:/#
318``` 530```
319--- 531---
320 532
@@ -324,148 +536,148 @@ root@yocto-vck190-dfx-2023:~#
324* Verify PL GPIO DIP switches and Push buttons are registered. 536* Verify PL GPIO DIP switches and Push buttons are registered.
325* Move the DIP Switches ON/OFF and verify the interrupt counts. 537* Move the DIP Switches ON/OFF and verify the interrupt counts.
326``` 538```
327yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts 539yocto-zynqmp-generic:/# cat /proc/interrupts
328 CPU0 CPU1 CPU2 CPU3 540 CPU0 CPU1 CPU2 CPU3
329 11: 23303 22971 24203 24990 GICv2 30 Level arch_timer 541 11: 4254 6509 4214 4236 GICv2 30 Level arch_timer
330 14: 0 0 0 0 GICv2 67 Level zynqmp_ipi 542 14: 0 0 0 0 GICv2 67 Level zynqmp-ipi
331 15: 0 0 0 0 GICv2 175 Level arm-pmu 543 15: 0 0 0 0 GICv2 58 Level ffa60000.rtc
332 16: 0 0 0 0 GICv2 176 Level arm-pmu 544 16: 0 0 0 0 GICv2 59 Level ffa60000.rtc
333 17: 0 0 0 0 GICv2 177 Level arm-pmu 545 17: 0 0 0 0 GICv2 88 Level ams-irq
334 18: 0 0 0 0 GICv2 178 Level arm-pmu 546 18: 0 0 0 0 GICv2 155 Level axi-pmon, axi-pmon
335 19: 0 0 0 0 GICv2 58 Level ffa60000.rtc 547 19: 0 0 0 0 GICv2 175 Level arm-pmu
336 20: 0 0 0 0 GICv2 59 Level ffa60000.rtc 548 20: 0 0 0 0 GICv2 176 Level arm-pmu
337 21: 0 0 0 0 GICv2 42 Level ff960000.memory-controller 549 21: 0 0 0 0 GICv2 177 Level arm-pmu
338 22: 0 0 0 0 GICv2 88 Level ams-irq 550 22: 0 0 0 0 GICv2 178 Level arm-pmu
339 23: 0 0 0 0 GICv2 155 Level axi-pmon, axi-pmon 551 23: 579 0 0 0 GICv2 53 Level xuartps
340 24: 515 0 0 0 GICv2 53 Level xuartps 552 26: 0 0 0 0 GICv2 156 Level zynqmp-dma
341 27: 0 0 0 0 GICv2 156 Level zynqmp-dma 553 27: 0 0 0 0 GICv2 157 Level zynqmp-dma
342 28: 0 0 0 0 GICv2 157 Level zynqmp-dma 554 28: 0 0 0 0 GICv2 158 Level zynqmp-dma
343 29: 0 0 0 0 GICv2 158 Level zynqmp-dma 555 29: 0 0 0 0 GICv2 159 Level zynqmp-dma
344 30: 0 0 0 0 GICv2 159 Level zynqmp-dma 556 30: 0 0 0 0 GICv2 160 Level zynqmp-dma
345 31: 0 0 0 0 GICv2 160 Level zynqmp-dma 557 31: 0 0 0 0 GICv2 161 Level zynqmp-dma
346 32: 0 0 0 0 GICv2 161 Level zynqmp-dma 558 32: 0 0 0 0 GICv2 162 Level zynqmp-dma
347 33: 0 0 0 0 GICv2 162 Level zynqmp-dma 559 33: 0 0 0 0 GICv2 163 Level zynqmp-dma
348 34: 0 0 0 0 GICv2 163 Level zynqmp-dma 560 34: 0 0 0 0 GICv2 109 Level zynqmp-dma
349 35: 0 0 0 0 GICv2 109 Level zynqmp-dma 561 35: 0 0 0 0 GICv2 110 Level zynqmp-dma
350 36: 0 0 0 0 GICv2 110 Level zynqmp-dma 562 36: 0 0 0 0 GICv2 111 Level zynqmp-dma
351 37: 0 0 0 0 GICv2 111 Level zynqmp-dma 563 37: 0 0 0 0 GICv2 112 Level zynqmp-dma
352 38: 0 0 0 0 GICv2 112 Level zynqmp-dma 564 38: 0 0 0 0 GICv2 113 Level zynqmp-dma
353 39: 0 0 0 0 GICv2 113 Level zynqmp-dma 565 39: 0 0 0 0 GICv2 114 Level zynqmp-dma
354 40: 0 0 0 0 GICv2 114 Level zynqmp-dma 566 40: 0 0 0 0 GICv2 115 Level zynqmp-dma
355 41: 0 0 0 0 GICv2 115 Level zynqmp-dma 567 41: 0 0 0 0 GICv2 116 Level zynqmp-dma
356 42: 0 0 0 0 GICv2 116 Level zynqmp-dma 568 42: 0 0 0 0 GICv2 154 Level fd4c0000.dma-controller
357 43: 0 0 0 0 GICv2 154 Level fd4c0000.dma-controller 569 43: 11183 0 0 0 GICv2 47 Level ff0f0000.spi
358 44: 5938 0 0 0 GICv2 47 Level ff0f0000.spi 570 44: 146 0 0 0 GICv2 95 Level eth0, eth0
359 45: 110 0 0 0 GICv2 95 Level eth0, eth0 571 45: 0 0 0 0 GICv2 57 Level axi-pmon, axi-pmon
360 46: 0 0 0 0 GICv2 57 Level axi-pmon, axi-pmon 572 46: 2365 0 0 0 GICv2 49 Level cdns-i2c
361 47: 4802 0 0 0 GICv2 49 Level cdns-i2c 573 47: 326 0 0 0 GICv2 50 Level cdns-i2c
362 48: 501 0 0 0 GICv2 50 Level cdns-i2c 574 49: 0 0 0 0 GICv2 84 Edge ff150000.watchdog
363 50: 0 0 0 0 GICv2 84 Edge ff150000.watchdog 575 50: 0 0 0 0 GICv2 151 Level fd4a0000.display
364 51: 0 0 0 0 GICv2 151 Level fd4a0000.display 576 51: 551 0 0 0 GICv2 81 Level mmc0
365 52: 548 0 0 0 GICv2 81 Level mmc0 577 52: 0 0 0 0 GICv2 165 Level ahci-ceva[fd0c0000.ahci]
366 53: 0 0 0 0 GICv2 165 Level ahci-ceva[fd0c0000.ahci] 578 53: 0 0 0 0 GICv2 97 Level xhci-hcd:usb1
367 54: 0 0 0 0 GICv2 97 Level xhci-hcd:usb1 579 54: 0 0 0 0 zynq-gpio 22 Edge sw19
368 55: 0 0 0 0 zynq-gpio 22 Edge sw19 580 58: 0 0 0 0 gpio-xilinx 4 Edge PL_GPIO_PB_SW9_N
369 59: 0 0 0 0 gpio-xilinx 4 Edge PL_GPIO_PB_SW9_N 581 59: 0 0 0 0 gpio-xilinx 3 Edge PL_GPIO_PB_SW12_E
370 60: 0 0 0 0 gpio-xilinx 3 Edge PL_GPIO_PB_SW12_E 582 60: 0 0 0 0 gpio-xilinx 2 Edge PL_GPIO_PB_SW13_S
371 61: 0 0 0 0 gpio-xilinx 2 Edge PL_GPIO_PB_SW13_S 583 61: 0 0 0 0 gpio-xilinx 1 Edge PL_GPIO_PB_SW10_W
372 62: 0 0 0 0 gpio-xilinx 1 Edge PL_GPIO_PB_SW10_W 584 62: 0 0 0 0 gpio-xilinx 0 Edge PL_GPIO_PB_SW11_C
373 63: 0 0 0 0 gpio-xilinx 0 Edge PL_GPIO_PB_SW11_C 585 63: 0 0 0 0 gpio-xilinx 7 Edge PL_GPIO_DIP_SW7
374 64: 0 0 0 0 gpio-xilinx 7 Edge PL_GPIO_DIP_SW7 586 64: 0 0 0 0 gpio-xilinx 6 Edge PL_GPIO_DIP_SW6
375 65: 0 0 0 0 gpio-xilinx 6 Edge PL_GPIO_DIP_SW6 587 65: 0 0 0 0 gpio-xilinx 5 Edge PL_GPIO_DIP_SW5
376 66: 0 0 0 0 gpio-xilinx 5 Edge PL_GPIO_DIP_SW5 588 66: 0 0 0 0 gpio-xilinx 4 Edge PL_GPIO_DIP_SW4
377 67: 0 0 0 0 gpio-xilinx 4 Edge PL_GPIO_DIP_SW4 589 67: 0 0 0 0 gpio-xilinx 3 Edge PL_GPIO_DIP_SW3
378 68: 0 0 0 0 gpio-xilinx 3 Edge PL_GPIO_DIP_SW3 590 68: 0 0 0 0 gpio-xilinx 2 Edge PL_GPIO_DIP_SW2
379 69: 0 0 0 0 gpio-xilinx 2 Edge PL_GPIO_DIP_SW2 591 69: 0 0 0 0 gpio-xilinx 1 Edge PL_GPIO_DIP_SW1
380 70: 0 0 0 0 gpio-xilinx 1 Edge PL_GPIO_DIP_SW1 592 70: 0 0 0 0 gpio-xilinx 0 Edge PL_GPIO_DIP_SW0
381 71: 0 0 0 0 gpio-xilinx 0 Edge PL_GPIO_DIP_SW0 593IPI0: 77 79 141 123 Rescheduling interrupts
382IPI0: 64 25 87 38 Rescheduling interrupts 594IPI1: 2621 1536 1782 13236 Function call interrupts
383IPI1: 2066 6747 1212 5791 Function call interrupts
384IPI2: 0 0 0 0 CPU stop interrupts 595IPI2: 0 0 0 0 CPU stop interrupts
385IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts 596IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts
386IPI4: 0 0 0 0 Timer broadcast interrupts 597IPI4: 0 0 0 0 Timer broadcast interrupts
387IPI5: 0 0 0 0 IRQ work interrupts 598IPI5: 0 0 0 0 IRQ work interrupts
388IPI6: 0 0 0 0 CPU wake-up interrupts 599IPI6: 0 0 0 0 CPU wake-up interrupts
389Err: 0 600Err: 0
390yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts 601yocto-zynqmp-generic:/#
602yocto-zynqmp-generic:/#
603yocto-zynqmp-generic:/# cat /proc/interrupts
391 CPU0 CPU1 CPU2 CPU3 604 CPU0 CPU1 CPU2 CPU3
392 11: 28169 27725 29250 30190 GICv2 30 Level arch_timer 605 11: 4972 7894 4568 4673 GICv2 30 Level arch_timer
393 14: 0 0 0 0 GICv2 67 Level zynqmp_ipi 606 14: 0 0 0 0 GICv2 67 Level zynqmp-ipi
394 15: 0 0 0 0 GICv2 175 Level arm-pmu 607 15: 0 0 0 0 GICv2 58 Level ffa60000.rtc
395 16: 0 0 0 0 GICv2 176 Level arm-pmu 608 16: 0 0 0 0 GICv2 59 Level ffa60000.rtc
396 17: 0 0 0 0 GICv2 177 Level arm-pmu 609 17: 0 0 0 0 GICv2 88 Level ams-irq
397 18: 0 0 0 0 GICv2 178 Level arm-pmu 610 18: 0 0 0 0 GICv2 155 Level axi-pmon, axi-pmon
398 19: 0 0 0 0 GICv2 58 Level ffa60000.rtc 611 19: 0 0 0 0 GICv2 175 Level arm-pmu
399 20: 0 0 0 0 GICv2 59 Level ffa60000.rtc 612 20: 0 0 0 0 GICv2 176 Level arm-pmu
400 21: 0 0 0 0 GICv2 42 Level ff960000.memory-controller 613 21: 0 0 0 0 GICv2 177 Level arm-pmu
401 22: 0 0 0 0 GICv2 88 Level ams-irq 614 22: 0 0 0 0 GICv2 178 Level arm-pmu
402 23: 0 0 0 0 GICv2 155 Level axi-pmon, axi-pmon 615 23: 685 0 0 0 GICv2 53 Level xuartps
403 24: 603 0 0 0 GICv2 53 Level xuartps 616 26: 0 0 0 0 GICv2 156 Level zynqmp-dma
404 27: 0 0 0 0 GICv2 156 Level zynqmp-dma 617 27: 0 0 0 0 GICv2 157 Level zynqmp-dma
405 28: 0 0 0 0 GICv2 157 Level zynqmp-dma 618 28: 0 0 0 0 GICv2 158 Level zynqmp-dma
406 29: 0 0 0 0 GICv2 158 Level zynqmp-dma 619 29: 0 0 0 0 GICv2 159 Level zynqmp-dma
407 30: 0 0 0 0 GICv2 159 Level zynqmp-dma 620 30: 0 0 0 0 GICv2 160 Level zynqmp-dma
408 31: 0 0 0 0 GICv2 160 Level zynqmp-dma 621 31: 0 0 0 0 GICv2 161 Level zynqmp-dma
409 32: 0 0 0 0 GICv2 161 Level zynqmp-dma 622 32: 0 0 0 0 GICv2 162 Level zynqmp-dma
410 33: 0 0 0 0 GICv2 162 Level zynqmp-dma 623 33: 0 0 0 0 GICv2 163 Level zynqmp-dma
411 34: 0 0 0 0 GICv2 163 Level zynqmp-dma 624 34: 0 0 0 0 GICv2 109 Level zynqmp-dma
412 35: 0 0 0 0 GICv2 109 Level zynqmp-dma 625 35: 0 0 0 0 GICv2 110 Level zynqmp-dma
413 36: 0 0 0 0 GICv2 110 Level zynqmp-dma 626 36: 0 0 0 0 GICv2 111 Level zynqmp-dma
414 37: 0 0 0 0 GICv2 111 Level zynqmp-dma 627 37: 0 0 0 0 GICv2 112 Level zynqmp-dma
415 38: 0 0 0 0 GICv2 112 Level zynqmp-dma 628 38: 0 0 0 0 GICv2 113 Level zynqmp-dma
416 39: 0 0 0 0 GICv2 113 Level zynqmp-dma 629 39: 0 0 0 0 GICv2 114 Level zynqmp-dma
417 40: 0 0 0 0 GICv2 114 Level zynqmp-dma 630 40: 0 0 0 0 GICv2 115 Level zynqmp-dma
418 41: 0 0 0 0 GICv2 115 Level zynqmp-dma 631 41: 0 0 0 0 GICv2 116 Level zynqmp-dma
419 42: 0 0 0 0 GICv2 116 Level zynqmp-dma 632 42: 0 0 0 0 GICv2 154 Level fd4c0000.dma-controller
420 43: 0 0 0 0 GICv2 154 Level fd4c0000.dma-controller 633 43: 11183 0 0 0 GICv2 47 Level ff0f0000.spi
421 44: 5938 0 0 0 GICv2 47 Level ff0f0000.spi 634 44: 265 0 0 0 GICv2 95 Level eth0, eth0
422 45: 134 0 0 0 GICv2 95 Level eth0, eth0 635 45: 0 0 0 0 GICv2 57 Level axi-pmon, axi-pmon
423 46: 0 0 0 0 GICv2 57 Level axi-pmon, axi-pmon 636 46: 2365 0 0 0 GICv2 49 Level cdns-i2c
424 47: 4802 0 0 0 GICv2 49 Level cdns-i2c 637 47: 326 0 0 0 GICv2 50 Level cdns-i2c
425 48: 501 0 0 0 GICv2 50 Level cdns-i2c 638 49: 0 0 0 0 GICv2 84 Edge ff150000.watchdog
426 50: 0 0 0 0 GICv2 84 Edge ff150000.watchdog 639 50: 0 0 0 0 GICv2 151 Level fd4a0000.display
427 51: 0 0 0 0 GICv2 151 Level fd4a0000.display 640 51: 551 0 0 0 GICv2 81 Level mmc0
428 52: 548 0 0 0 GICv2 81 Level mmc0 641 52: 0 0 0 0 GICv2 165 Level ahci-ceva[fd0c0000.ahci]
429 53: 0 0 0 0 GICv2 165 Level ahci-ceva[fd0c0000.ahci] 642 53: 0 0 0 0 GICv2 97 Level xhci-hcd:usb1
430 54: 0 0 0 0 GICv2 97 Level xhci-hcd:usb1 643 54: 0 0 0 0 zynq-gpio 22 Edge sw19
431 55: 0 0 0 0 zynq-gpio 22 Edge sw19 644 58: 12 0 0 0 gpio-xilinx 4 Edge PL_GPIO_PB_SW9_N
432 59: 2 0 0 0 gpio-xilinx 4 Edge PL_GPIO_PB_SW9_N 645 59: 8 0 0 0 gpio-xilinx 3 Edge PL_GPIO_PB_SW12_E
433 60: 4 0 0 0 gpio-xilinx 3 Edge PL_GPIO_PB_SW12_E 646 60: 8 0 0 0 gpio-xilinx 2 Edge PL_GPIO_PB_SW13_S
434 61: 2 0 0 0 gpio-xilinx 2 Edge PL_GPIO_PB_SW13_S 647 61: 8 0 0 0 gpio-xilinx 1 Edge PL_GPIO_PB_SW10_W
435 62: 2 0 0 0 gpio-xilinx 1 Edge PL_GPIO_PB_SW10_W 648 62: 10 0 0 0 gpio-xilinx 0 Edge PL_GPIO_PB_SW11_C
436 63: 2 0 0 0 gpio-xilinx 0 Edge PL_GPIO_PB_SW11_C 649 63: 2 0 0 0 gpio-xilinx 7 Edge PL_GPIO_DIP_SW7
437 64: 2 0 0 0 gpio-xilinx 7 Edge PL_GPIO_DIP_SW7 650 64: 4 0 0 0 gpio-xilinx 6 Edge PL_GPIO_DIP_SW6
438 65: 2 0 0 0 gpio-xilinx 6 Edge PL_GPIO_DIP_SW6 651 65: 2 0 0 0 gpio-xilinx 5 Edge PL_GPIO_DIP_SW5
439 66: 4 0 0 0 gpio-xilinx 5 Edge PL_GPIO_DIP_SW5 652 66: 2 0 0 0 gpio-xilinx 4 Edge PL_GPIO_DIP_SW4
440 67: 2 0 0 0 gpio-xilinx 4 Edge PL_GPIO_DIP_SW4 653 67: 2 0 0 0 gpio-xilinx 3 Edge PL_GPIO_DIP_SW3
441 68: 2 0 0 0 gpio-xilinx 3 Edge PL_GPIO_DIP_SW3 654 68: 2 0 0 0 gpio-xilinx 2 Edge PL_GPIO_DIP_SW2
442 69: 2 0 0 0 gpio-xilinx 2 Edge PL_GPIO_DIP_SW2 655 69: 2 0 0 0 gpio-xilinx 1 Edge PL_GPIO_DIP_SW1
443 70: 2 0 0 0 gpio-xilinx 1 Edge PL_GPIO_DIP_SW1 656 70: 4 0 0 0 gpio-xilinx 0 Edge PL_GPIO_DIP_SW0
444 71: 2 0 0 0 gpio-xilinx 0 Edge PL_GPIO_DIP_SW0 657IPI0: 77 79 142 123 Rescheduling interrupts
445IPI0: 64 26 87 38 Rescheduling interrupts 658IPI1: 2641 1596 2011 13239 Function call interrupts
446IPI1: 2163 6791 1243 5866 Function call interrupts
447IPI2: 0 0 0 0 CPU stop interrupts 659IPI2: 0 0 0 0 CPU stop interrupts
448IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts 660IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts
449IPI4: 0 0 0 0 Timer broadcast interrupts 661IPI4: 0 0 0 0 Timer broadcast interrupts
450IPI5: 0 0 0 0 IRQ work interrupts 662IPI5: 0 0 0 0 IRQ work interrupts
451IPI6: 0 0 0 0 CPU wake-up interrupts 663IPI6: 0 0 0 0 CPU wake-up interrupts
452Err: 0 664Err: 0
453yocto-zynqmp-generic-20231:/home/petalinux# 665yocto-zynqmp-generic:/#
454``` 666```
455--- 667---
456 668
457### Unloading PL bitstream or pdi and dt overlay 669### Unloading PL bitstream or pdi and dt overlay
458* Zynq or ZynqMP 670* Zynq or ZynqMP
459``` 671```
460yocto-zynqmp-generic-20231:/home/petalinux# fpgautil -R 672yocto-zynqmp-generic:/home/petalinux# fpgautil -R
461``` 673```
462* Versal (DFx RP) 674* Versal (DFx RP)
463``` 675```
464root@yocto-vck190-dfx-2023:~# fpgautil -R -n PR0 676yocto-vck190-versal:/# fpgautil -R -n PR0
465``` 677```
466* Versal (DFx Static) 678* Versal (DFx Static)
467``` 679```
468root@yocto-vck190-dfx-2023:~# fpgautil -R -n Full 680yocto-vck190-versal:/# fpgautil -R -n Full
469``` 681```
470--- 682---
471 683
diff --git a/docs/README.fpgamanager.custom.md b/docs/README.fpgamanager.custom.md
deleted file mode 100644
index dbdf5907..00000000
--- a/docs/README.fpgamanager.custom.md
+++ /dev/null
@@ -1,478 +0,0 @@
1# Build Instructions to create firmware recipes using fpgamanager_custom bbclass
2
3* [Introduction](#introduction)
4* [How to create a firmware recipe app](#how-to-create-a-firmware-recipe-app)
5* [Test Procedure on Target](#test-procedure-on-target)
6 * [Loading PL bitstream or pdi and dt overlay](#loading-pl-bitstream-or-pdi-and-dt-overlay)
7 * [Testing PL functionality](#testing-pl-functionality)
8 * [Unloading PL bitstream or pdi and dt overlay](#unloading-pl-bitstream-or-pdi-and-dt-overlay)
9* [References](#references)
10
11> **Note:** This README will be deprecated in 2024.1 release. User sthould start
12> using [DFx User DTS README](README.dfx.user.dts.md)
13
14## Introduction
15This readme describes the build instructions to create firmware recipes using
16fpgamanager_custom.bbclass for dynamic configuration. This bitbake class supports
17following use cases.
18
19> **Note:** Refer https://github.com/Xilinx/dfx-mgr/blob/master/README.md for
20> shell.json and accel.json file content.
21
22* **Zynq-7000 and ZynqMP**:
23 * Design: Vivado flat design.
24 * Input files to firmware recipes: .bit, .dtsi or dtbo and shell.json (optional)
25 * Usage Examples:
26```
27SRC_URI = " \
28 file://<flat_design_pl>.bit \
29 file://<flat_design_pl>.dtsi \
30 file://shell.json \
31 "
32```
33
34```
35SRC_URI = " \
36 file://<flat_design_pl>.bit \
37 file://<flat_design_pl>.dtbo \
38 file://shell.json \
39 "
40```
41
42* **ZynqMP and Versal**:
43 * Design: Vivado DFx design.
44 * Input files to firmware recipes: .bit(ZynqMP) or .pdi(Versal), .dtsi or dtbo
45 shell.json or accel.json (optional) and .xclbin (optional).
46 * Usage Examples:
47
48```
49# ZynqMP DFx Static
50SRC_URI = " \
51 file://<dfx_design_static_pl>.bit \
52 file://<dfx_design_static_pl>.dtsi \
53 file://shell.json \
54 file://<dfx_design_static_pl>.xclbin \
55 "
56```
57
58```
59# ZynqMP DFx Static
60SRC_URI = " \
61 file://<dfx_design_static_pl>.bit \
62 file://<dfx_design_static_pl>.dtbo \
63 file://shell.json \
64 file://<dfx_design_static_pl>.xclbin \
65 "
66```
67
68```
69# ZynqMP DFx RP
70SRC_URI = " \
71 file://<dfx_design_rp_rm_pl>.bit \
72 file://<dfx_design_rp_rm_pl>.dtsi \
73 file://accel.json \
74 file://<dfx_design_rp_rm_pl>.xclbin \
75 "
76```
77
78```
79# ZynqMP DFx RP
80SRC_URI = " \
81 file://<dfx_design_rp_rm_pl>.bit \
82 file://<dfx_design_rp_rm_pl>.dtbo \
83 file://accel.json \
84 file://<dfx_design_rp_rm_pl>.xclbin \
85 "
86```
87```
88# Versal DFx Static
89SRC_URI = " \
90 file://<dfx_design_static_pl>.pdi \
91 file://<dfx_design_static_pl>.dtsi \
92 file://shell.json \
93 file://<dfx_design_static_pl>.xclbin \
94 "
95```
96
97```
98# Versal DFx Static
99SRC_URI = " \
100 file://<dfx_design_static_pl>.pdi \
101 file://<dfx_design_static_pl>.dtbo \
102 file://shell.json \
103 file://<dfx_design_static_pl>.xclbin \
104 "
105```
106
107```
108# Versal DFx RP
109SRC_URI = " \
110 file://<dfx_design_rp_rm_pl>.pdi \
111 file://<dfx_design_rp_rm_pl>.dtsi \
112 file://accel.json \
113 file://<dfx_design_rp_rm_pl>.xclbin \
114 "
115```
116
117```
118# Versal DFx RP
119SRC_URI = " \
120 file://<dfx_design_rp_rm_pl>.pdi \
121 file://<dfx_design_rp_rm_pl>.dtbo \
122 file://accel.json \
123 file://<dfx_design_rp_rm_pl>.xclbin \
124 "
125```
126---
127
128## How to create a firmware recipe app
129
1301. Follow [Building Instructions](../README.building.md) upto step 4.
1312. Create recipes-firmware directory in meta layer and copy the .bit/pdi,
132 .dtsi/dtbo, .json and .xclbin file to these directories.
133```
134$ mkdir -p <meta-layer>/recipes-firmware/<recipes-firmware-app>/files
135$ cp -r <path-to-files>/*.{bit or pdi, dtsi or dtbo, shell.json or accel.json and .xclbin} <meta-layer>/recipes-firmware/<firmware-app-name>/files
136```
1373. Now create the recipes for flat or static or partial firmware using recipetool.
138```
139$ recipetool create -o <meta-layer>/recipes-firmware/<firmware-app-name>/firmware-app-name.bb file:///<meta-layer>/recipes-firmware/<firmware-app-name>/files
140```
1414. Modify the recipe and inherit fpgamanager_custom bbclass as shown below.
142```
143SUMMARY = "Full Bitstream loading zcu111-pl-demo firmware using fpgamanager_custom bbclass"
144LICENSE = "MIT"
145LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302"
146
147inherit fpgamanager_custom
148
149SRC_URI = "\
150 file://zcu111-pl-demo.bit \
151 file://zcu111-pl-demo.dtsi \
152 "
153
154COMPATIBLE_MACHINE ?= "^$"
155COMPATIBLE_MACHINE:zynqmp = "zynqmp"
156```
1575. Add firmware-recipe app to image and enable fpga-overlay machine features to
158 local.conf as shown below.
159> **Note:** fpga-manager-script provides fpgautil tool to load .bit/pdi and dtbo
160> at runtime linux.
161```
162MACHINE_FEATURES += "fpga-overlay"
163IMAGE_INSTALL:append = " \
164 firmware-app-name \
165 fpga-manager-script \
166 "
167```
1686. Follow [Building Instructions](../README.building.md) and continue from step 5.
1697. Once images are built firmware app files will be installed on target_rootfs.
170```
171# <target_rootfs>/lib/firmware/xilinx/firmware-app-name
172```
173---
174
175## Test Procedure on Target
176* Once Linux boots on target, use fpgautil command to load .bit or .pdi and
177 corresponding dt overlay as shown below.
178> **Note:** firmware can be loaded only with sudo or root permissions.
179---
180
181### Loading PL bitstream or pdi and dt overlay
182
183* ZynqMP
184```
185yocto-zynqmp-generic-20231:~$ sudo su
186yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts
187 CPU0 CPU1 CPU2 CPU3
188 11: 13309 13021 13673 14170 GICv2 30 Level arch_timer
189 14: 0 0 0 0 GICv2 67 Level zynqmp_ipi
190 15: 0 0 0 0 GICv2 175 Level arm-pmu
191 16: 0 0 0 0 GICv2 176 Level arm-pmu
192 17: 0 0 0 0 GICv2 177 Level arm-pmu
193 18: 0 0 0 0 GICv2 178 Level arm-pmu
194 19: 0 0 0 0 GICv2 58 Level ffa60000.rtc
195 20: 0 0 0 0 GICv2 59 Level ffa60000.rtc
196 21: 0 0 0 0 GICv2 42 Level ff960000.memory-controller
197 22: 0 0 0 0 GICv2 88 Level ams-irq
198 23: 0 0 0 0 GICv2 155 Level axi-pmon, axi-pmon
199 24: 327 0 0 0 GICv2 53 Level xuartps
200 27: 0 0 0 0 GICv2 156 Level zynqmp-dma
201 28: 0 0 0 0 GICv2 157 Level zynqmp-dma
202 29: 0 0 0 0 GICv2 158 Level zynqmp-dma
203 30: 0 0 0 0 GICv2 159 Level zynqmp-dma
204 31: 0 0 0 0 GICv2 160 Level zynqmp-dma
205 32: 0 0 0 0 GICv2 161 Level zynqmp-dma
206 33: 0 0 0 0 GICv2 162 Level zynqmp-dma
207 34: 0 0 0 0 GICv2 163 Level zynqmp-dma
208 35: 0 0 0 0 GICv2 109 Level zynqmp-dma
209 36: 0 0 0 0 GICv2 110 Level zynqmp-dma
210 37: 0 0 0 0 GICv2 111 Level zynqmp-dma
211 38: 0 0 0 0 GICv2 112 Level zynqmp-dma
212 39: 0 0 0 0 GICv2 113 Level zynqmp-dma
213 40: 0 0 0 0 GICv2 114 Level zynqmp-dma
214 41: 0 0 0 0 GICv2 115 Level zynqmp-dma
215 42: 0 0 0 0 GICv2 116 Level zynqmp-dma
216 43: 0 0 0 0 GICv2 154 Level fd4c0000.dma-controller
217 44: 5938 0 0 0 GICv2 47 Level ff0f0000.spi
218 45: 76 0 0 0 GICv2 95 Level eth0, eth0
219 46: 0 0 0 0 GICv2 57 Level axi-pmon, axi-pmon
220 47: 4802 0 0 0 GICv2 49 Level cdns-i2c
221 48: 501 0 0 0 GICv2 50 Level cdns-i2c
222 50: 0 0 0 0 GICv2 84 Edge ff150000.watchdog
223 51: 0 0 0 0 GICv2 151 Level fd4a0000.display
224 52: 548 0 0 0 GICv2 81 Level mmc0
225 53: 0 0 0 0 GICv2 165 Level ahci-ceva[fd0c0000.ahci]
226 54: 0 0 0 0 GICv2 97 Level xhci-hcd:usb1
227 55: 0 0 0 0 zynq-gpio 22 Edge sw19
228IPI0: 64 25 87 38 Rescheduling interrupts
229IPI1: 1933 6579 1096 5686 Function call interrupts
230IPI2: 0 0 0 0 CPU stop interrupts
231IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts
232IPI4: 0 0 0 0 Timer broadcast interrupts
233IPI5: 0 0 0 0 IRQ work interrupts
234IPI6: 0 0 0 0 CPU wake-up interrupts
235Err: 0
236yocto-zynqmp-generic-20231:/home/petalinux# tree /lib/firmware/
237/lib/firmware/
238`-- xilinx
239 `-- zcu111-pl-demo
240 |-- zcu111-pl-demo.bit.bin
241 `-- zcu111-pl-demo.dtbo
242
2432 directories, 2 files
244yocto-zynqmp-generic-20231:/home/petalinux# fpgautil -b /lib/firmware/xilinx/zcu111-pl-demo/zcu111-pl-demo.bit -o /lib/firmware/xilinx/zcu111-pl-demo/zcu111-pl-demo.dtbo
245[ 91.039773] fpga_manager fpga0: writing zcu111-pl-demo.bit to Xilinx ZynqMP FPGA Manager
246[ 91.528214] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/firmware-name
247[ 91.538354] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/pid
248[ 91.547598] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/resets
249[ 91.557087] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/uid
250[ 91.566804] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/afi0
251[ 91.576312] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/clocking0
252[ 91.586255] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_0
253[ 91.596280] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/misc_clk_0
254[ 91.606300] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_1
255[ 91.616325] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_2
256[ 91.626342] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_uartlite_0
257[ 91.636705] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/ddr4_0
258[ 91.661849] gpio gpiochip3: (a0000000.gpio): not an immutable chip, please consider fixing it!
259[ 91.662020] gpio gpiochip4: (a0010000.gpio): not an immutable chip, please consider fixing it!
260[ 91.863492] a0030000.serial: ttyUL0 at MMIO 0xa0030000 (irq = 58, base_baud = 0) is a uartlite
261[ 91.876674] uartlite a0030000.serial: Runtime PM usage count underflow!
262[ 91.906539] input: pl-gpio-keys as /devices/platform/pl-gpio-keys/input/input1
263Time taken to load BIN is 901.000000 Milli Seconds
264BIN FILE loaded through FPGA manager successfully
265yocto-zynqmp-generic-20231:/home/petalinux#
266```
267* Versal (DFx Static)
268```
269yocto-vck190-dfx-2023:~$ sudo su
270root@yocto-vck190-dfx-2023:~#
271root@yocto-vck190-dfx-2023:~# fpgautil -o /lib/firmware/xilinx/vck190-dfx-static/vck190-dfx-static.dtbo
272[ 257.555571] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/external-fpga-config
273[ 257.565879] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/pid
274[ 257.574670] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/uid
275[ 257.583599] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR0
276[ 257.593434] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR1
277[ 257.603268] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR2
278[ 257.613100] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_axi_bram_ctrl_0
279[ 257.624762] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp1
280[ 257.636589] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp2
281[ 257.648415] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp3
282[ 257.663234] of-fpga-region fpga:fpga-PR0: FPGA Region probed
283[ 257.669135] of-fpga-region fpga:fpga-PR1: FPGA Region probed
284[ 257.675022] of-fpga-region fpga:fpga-PR2: FPGA Region probed
285root@yocto-vck190-dfx-2023:~#
286```
287* Versal (DFx RP)
288```
289root@yocto-vck190-dfx-2023:~# fpgautil -b /lib/firmware/xilinx/vck190-dfx-static/rp1/vck190-dfx-rp1rm1-dipsw/vck190-dfx-rp1rm1-dipsw.pdi -o /lib/firmware/xilinx/vck190-dfx-static/rp1/vck190-dfx-rp1rm1-dipsw/vck190-dfx-rp1rm1-dipsw.dtbo -f Partial -n PR0
290[ 273.511455] fpga_manager fpga0: writing vck190-dfx-rp1rm1-dipsw.pdi to Xilinx Versal FPGA Manager
291[284052.461]Loading PDI from DDR
292[284052.566]Monolithic/Master Device
293[284055.847]3.365 ms: PDI initialization time
294[284059.809]+++Loading Image#: 0x0, Name: pl_cfi, Id: 0x18700002
295[284065.432]---Loading Partition#: 0x0, Id: 0x103
296[284069.829] 0.033 ms for Partition#: 0x0, Size: 1312 Bytes
297[284074.973]---Loading Partition#: 0x1, Id: 0x105
298[284079.344] 0.007 ms for Partition#: 0x1, Size: 160 Bytes
299[284084.430]---Loading Partition#: 0x2, Id: 0x205
300[284088.844] 0.049 ms for Partition#: 0x2, Size: 960 Bytes
301[284093.887]---Loading Partition#: 0x3, Id: 0x203
302[284098.280] 0.030 ms for Partition#: 0x3, Size: 688 Bytes
303[284103.342]---Loading Partition#: 0x4, Id: 0x303
304[284108.863] 1.156 ms for Partition#: 0x4, Size: 209440 Bytes
305[284113.052]---Loading Partition#: 0x5, Id: 0x305
306[284117.712] 0.296 ms for Partition#: 0x5, Size: 3536 Bytes
307[284122.594]---Loading Partition#: 0x6, Id: 0x403
308[284126.991] 0.034 ms for Partition#: 0x6, Size: 8096 Bytes
309[284132.136]---Loading Partition#: 0x7, Id: 0x405
310[284136.507] 0.007 ms for Partition#: 0x7, Size: 160 Bytes
311[284141.636]Subsystem PDI Load: Done
312[ 273.615503] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/firmware-name
313[ 273.627382] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/fpga-bridges
314[ 273.636953] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/partial-fpga-config
315[ 273.647241] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/rp1_axi_gpio_0
316[ 273.660826] gpio gpiochip1: (a4010000.gpio): not an immutable chip, please consider fixing it!
317[ 273.670490] input: pl-gpio-keys as /devices/platform/pl-gpio-keys/input/input0
318Time taken to load BIN is 171.000000 Milli Seconds
319BIN FILE loaded through FPGA manager successfully
320root@yocto-vck190-dfx-2023:~#
321```
322---
323
324### Testing PL functionality
325
326* This examples uses PL GPIO DIP switches and Push buttons to capture interrupts.
327* Verify PL GPIO DIP switches and Push buttons are registered.
328* Move the DIP Switches ON/OFF and verify the interrupt counts.
329```
330yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts
331 CPU0 CPU1 CPU2 CPU3
332 11: 23303 22971 24203 24990 GICv2 30 Level arch_timer
333 14: 0 0 0 0 GICv2 67 Level zynqmp_ipi
334 15: 0 0 0 0 GICv2 175 Level arm-pmu
335 16: 0 0 0 0 GICv2 176 Level arm-pmu
336 17: 0 0 0 0 GICv2 177 Level arm-pmu
337 18: 0 0 0 0 GICv2 178 Level arm-pmu
338 19: 0 0 0 0 GICv2 58 Level ffa60000.rtc
339 20: 0 0 0 0 GICv2 59 Level ffa60000.rtc
340 21: 0 0 0 0 GICv2 42 Level ff960000.memory-controller
341 22: 0 0 0 0 GICv2 88 Level ams-irq
342 23: 0 0 0 0 GICv2 155 Level axi-pmon, axi-pmon
343 24: 515 0 0 0 GICv2 53 Level xuartps
344 27: 0 0 0 0 GICv2 156 Level zynqmp-dma
345 28: 0 0 0 0 GICv2 157 Level zynqmp-dma
346 29: 0 0 0 0 GICv2 158 Level zynqmp-dma
347 30: 0 0 0 0 GICv2 159 Level zynqmp-dma
348 31: 0 0 0 0 GICv2 160 Level zynqmp-dma
349 32: 0 0 0 0 GICv2 161 Level zynqmp-dma
350 33: 0 0 0 0 GICv2 162 Level zynqmp-dma
351 34: 0 0 0 0 GICv2 163 Level zynqmp-dma
352 35: 0 0 0 0 GICv2 109 Level zynqmp-dma
353 36: 0 0 0 0 GICv2 110 Level zynqmp-dma
354 37: 0 0 0 0 GICv2 111 Level zynqmp-dma
355 38: 0 0 0 0 GICv2 112 Level zynqmp-dma
356 39: 0 0 0 0 GICv2 113 Level zynqmp-dma
357 40: 0 0 0 0 GICv2 114 Level zynqmp-dma
358 41: 0 0 0 0 GICv2 115 Level zynqmp-dma
359 42: 0 0 0 0 GICv2 116 Level zynqmp-dma
360 43: 0 0 0 0 GICv2 154 Level fd4c0000.dma-controller
361 44: 5938 0 0 0 GICv2 47 Level ff0f0000.spi
362 45: 110 0 0 0 GICv2 95 Level eth0, eth0
363 46: 0 0 0 0 GICv2 57 Level axi-pmon, axi-pmon
364 47: 4802 0 0 0 GICv2 49 Level cdns-i2c
365 48: 501 0 0 0 GICv2 50 Level cdns-i2c
366 50: 0 0 0 0 GICv2 84 Edge ff150000.watchdog
367 51: 0 0 0 0 GICv2 151 Level fd4a0000.display
368 52: 548 0 0 0 GICv2 81 Level mmc0
369 53: 0 0 0 0 GICv2 165 Level ahci-ceva[fd0c0000.ahci]
370 54: 0 0 0 0 GICv2 97 Level xhci-hcd:usb1
371 55: 0 0 0 0 zynq-gpio 22 Edge sw19
372 59: 0 0 0 0 gpio-xilinx 4 Edge PL_GPIO_PB_SW9_N
373 60: 0 0 0 0 gpio-xilinx 3 Edge PL_GPIO_PB_SW12_E
374 61: 0 0 0 0 gpio-xilinx 2 Edge PL_GPIO_PB_SW13_S
375 62: 0 0 0 0 gpio-xilinx 1 Edge PL_GPIO_PB_SW10_W
376 63: 0 0 0 0 gpio-xilinx 0 Edge PL_GPIO_PB_SW11_C
377 64: 0 0 0 0 gpio-xilinx 7 Edge PL_GPIO_DIP_SW7
378 65: 0 0 0 0 gpio-xilinx 6 Edge PL_GPIO_DIP_SW6
379 66: 0 0 0 0 gpio-xilinx 5 Edge PL_GPIO_DIP_SW5
380 67: 0 0 0 0 gpio-xilinx 4 Edge PL_GPIO_DIP_SW4
381 68: 0 0 0 0 gpio-xilinx 3 Edge PL_GPIO_DIP_SW3
382 69: 0 0 0 0 gpio-xilinx 2 Edge PL_GPIO_DIP_SW2
383 70: 0 0 0 0 gpio-xilinx 1 Edge PL_GPIO_DIP_SW1
384 71: 0 0 0 0 gpio-xilinx 0 Edge PL_GPIO_DIP_SW0
385IPI0: 64 25 87 38 Rescheduling interrupts
386IPI1: 2066 6747 1212 5791 Function call interrupts
387IPI2: 0 0 0 0 CPU stop interrupts
388IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts
389IPI4: 0 0 0 0 Timer broadcast interrupts
390IPI5: 0 0 0 0 IRQ work interrupts
391IPI6: 0 0 0 0 CPU wake-up interrupts
392Err: 0
393yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts
394 CPU0 CPU1 CPU2 CPU3
395 11: 28169 27725 29250 30190 GICv2 30 Level arch_timer
396 14: 0 0 0 0 GICv2 67 Level zynqmp_ipi
397 15: 0 0 0 0 GICv2 175 Level arm-pmu
398 16: 0 0 0 0 GICv2 176 Level arm-pmu
399 17: 0 0 0 0 GICv2 177 Level arm-pmu
400 18: 0 0 0 0 GICv2 178 Level arm-pmu
401 19: 0 0 0 0 GICv2 58 Level ffa60000.rtc
402 20: 0 0 0 0 GICv2 59 Level ffa60000.rtc
403 21: 0 0 0 0 GICv2 42 Level ff960000.memory-controller
404 22: 0 0 0 0 GICv2 88 Level ams-irq
405 23: 0 0 0 0 GICv2 155 Level axi-pmon, axi-pmon
406 24: 603 0 0 0 GICv2 53 Level xuartps
407 27: 0 0 0 0 GICv2 156 Level zynqmp-dma
408 28: 0 0 0 0 GICv2 157 Level zynqmp-dma
409 29: 0 0 0 0 GICv2 158 Level zynqmp-dma
410 30: 0 0 0 0 GICv2 159 Level zynqmp-dma
411 31: 0 0 0 0 GICv2 160 Level zynqmp-dma
412 32: 0 0 0 0 GICv2 161 Level zynqmp-dma
413 33: 0 0 0 0 GICv2 162 Level zynqmp-dma
414 34: 0 0 0 0 GICv2 163 Level zynqmp-dma
415 35: 0 0 0 0 GICv2 109 Level zynqmp-dma
416 36: 0 0 0 0 GICv2 110 Level zynqmp-dma
417 37: 0 0 0 0 GICv2 111 Level zynqmp-dma
418 38: 0 0 0 0 GICv2 112 Level zynqmp-dma
419 39: 0 0 0 0 GICv2 113 Level zynqmp-dma
420 40: 0 0 0 0 GICv2 114 Level zynqmp-dma
421 41: 0 0 0 0 GICv2 115 Level zynqmp-dma
422 42: 0 0 0 0 GICv2 116 Level zynqmp-dma
423 43: 0 0 0 0 GICv2 154 Level fd4c0000.dma-controller
424 44: 5938 0 0 0 GICv2 47 Level ff0f0000.spi
425 45: 134 0 0 0 GICv2 95 Level eth0, eth0
426 46: 0 0 0 0 GICv2 57 Level axi-pmon, axi-pmon
427 47: 4802 0 0 0 GICv2 49 Level cdns-i2c
428 48: 501 0 0 0 GICv2 50 Level cdns-i2c
429 50: 0 0 0 0 GICv2 84 Edge ff150000.watchdog
430 51: 0 0 0 0 GICv2 151 Level fd4a0000.display
431 52: 548 0 0 0 GICv2 81 Level mmc0
432 53: 0 0 0 0 GICv2 165 Level ahci-ceva[fd0c0000.ahci]
433 54: 0 0 0 0 GICv2 97 Level xhci-hcd:usb1
434 55: 0 0 0 0 zynq-gpio 22 Edge sw19
435 59: 2 0 0 0 gpio-xilinx 4 Edge PL_GPIO_PB_SW9_N
436 60: 4 0 0 0 gpio-xilinx 3 Edge PL_GPIO_PB_SW12_E
437 61: 2 0 0 0 gpio-xilinx 2 Edge PL_GPIO_PB_SW13_S
438 62: 2 0 0 0 gpio-xilinx 1 Edge PL_GPIO_PB_SW10_W
439 63: 2 0 0 0 gpio-xilinx 0 Edge PL_GPIO_PB_SW11_C
440 64: 2 0 0 0 gpio-xilinx 7 Edge PL_GPIO_DIP_SW7
441 65: 2 0 0 0 gpio-xilinx 6 Edge PL_GPIO_DIP_SW6
442 66: 4 0 0 0 gpio-xilinx 5 Edge PL_GPIO_DIP_SW5
443 67: 2 0 0 0 gpio-xilinx 4 Edge PL_GPIO_DIP_SW4
444 68: 2 0 0 0 gpio-xilinx 3 Edge PL_GPIO_DIP_SW3
445 69: 2 0 0 0 gpio-xilinx 2 Edge PL_GPIO_DIP_SW2
446 70: 2 0 0 0 gpio-xilinx 1 Edge PL_GPIO_DIP_SW1
447 71: 2 0 0 0 gpio-xilinx 0 Edge PL_GPIO_DIP_SW0
448IPI0: 64 26 87 38 Rescheduling interrupts
449IPI1: 2163 6791 1243 5866 Function call interrupts
450IPI2: 0 0 0 0 CPU stop interrupts
451IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts
452IPI4: 0 0 0 0 Timer broadcast interrupts
453IPI5: 0 0 0 0 IRQ work interrupts
454IPI6: 0 0 0 0 CPU wake-up interrupts
455Err: 0
456yocto-zynqmp-generic-20231:/home/petalinux#
457```
458---
459
460### Unloading PL bitstream or pdi and dt overlay
461* Zynq or ZynqMP
462```
463yocto-zynqmp-generic-20231:/home/petalinux# fpgautil -R
464```
465* Versal (DFx RP)
466```
467root@yocto-vck190-dfx-2023:~# fpgautil -R -n PR0
468```
469* Versal (DFx Static)
470```
471root@yocto-vck190-dfx-2023:~# fpgautil -R -n Full
472```
473---
474
475## References
476* https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841645/Solution+Zynq+PL+Programming+With+FPGA+Manager
477* https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841847/Solution+ZynqMP+PL+Programming
478* https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/1188397412/Solution+Versal+PL+Programming
diff --git a/docs/README.fw.package.md b/docs/README.fw.package.md
new file mode 100644
index 00000000..a7e54402
--- /dev/null
+++ b/docs/README.fw.package.md
@@ -0,0 +1,61 @@
1# How to package and depoly firmware elf or bin to linux root filesystem
2
3* [Introduction](#introduction)
4* [How to create and install firmware package recipe](#how-to-create-and-install-firmware-package-recipe)
5
6## Introduction
7This readme describes how to package and deploy firmware baremetal or freertos
8application elf or bin files to linux root filesystem under /lib/firmware directory.
9Packaging an firmware baremetal or freertos application elf or bin files to linux
10root filesystem is not automated from multiconfig baremetal or freertos recipes.
11Hence user has to create a linux recipe and inherit fw-package which provides
12infrastructure to package and deploy firmware elf or bin files to linux root
13filesystem.
14
15## How to create and install firmware package recipe
16
171. Follow [SDT Building Instructions](../meta-xilinx-standalone-experimental/README.md ) upto step 4.
18
192. Create recipes-firmware directory in distribution meta layer.
20```
21$ mkdir -p <meta-layer>/recipes-firmware/<firmware-package-name>/
22```
233. Now create the recipes firmware package using recipetool.
24```
25$ recipetool create -o <meta-layer>/recipes-firmware/<firmware-package-name>/firmware-package-name.bb
26```
274. Modify the recipe and inherit fw-package bbclass as shown below.
28
29> **Note:**
30> * **DESTDIR:** Variable to specify elf or bin directory path. Default is set to
31> /lib/firmware directory from fw-package,bbclass and user can
32> change this value to /boot directory depending on requirement.
33> * **FW_NAME:** Variable to define firmware baremetal or freertos application
34> recipe name.
35> * **TARGET_MC:** Variable to define one of the multiconfig target name
36> (ex: cortexr5-0-zynqmp-baremetal) from the BBMULTICONFIG list
37> generated at [SDT Building Instructions](../meta-xilinx-standalone-experimental/README.md )
38> step 4.
39
40```
41SUMMARY = "Recipe to package and deploy baremetal or freertos elf or bin to linux rootfs"
42LICENSE = "CLOSED"
43
44inherit fw-package
45
46FW_NAME = "hello-world"
47
48TARGET_MC = "cortexr5-0-zynqmp-baremetal"
49
50FW_MCDEPENDS := "mc::${TARGET_MC}:${FW_NAME}:do_deploy"
51FW_DEPLOY_DIR := "${TOPDIR}/tmp-${TARGET_MC}/deploy/images/${MACHINE}"
52```
535. Add firmware-package recipe to image to local.conf as shown below.
54
55```
56IMAGE_INSTALL:append = " \
57 firmware-package-name \
58 "
59```
606. Follow [SDT Building Instructions](../meta-xilinx-standalone-experimental/README.md ) and continue from
61 step 5.
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-05-30 23:50:36 +0000