| Commit message (Collapse) | Author | Age | Files | Lines |
... | |
| |
| |
| |
| |
| |
| |
| |
| | |
Add the workaround device tree node to reserve the bad block DDR memory.
so that we can boot linux on vek280 board.
Signed-off-by: Swagath Gadde <swagath.gadde@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Below are the updates:
d01a174 openamp: xlnx: Update Platform handling to use model property
c747581 base/phandle: add reset-gpios
4451694 tree: return a list of nodes matching an address
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| |
| |
| |
| |
| | |
arm64: versal-net: Align spi-max-frequency for ipp-rev1.9
mtd: spi-nor: Add SPI_NOR_MULTI_DIE flag
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Revert "sw_services: xilloader: Enhance Extract Metaheader command to get optional data"
plm: versal_net: Ack In-Place PLM Update request only after Done
sw_services:xilloader:Added Support for Infineon flash part
v_sdirxss: SDT flow kcu116/vck190 apps restructure
v_sditxss: Fix SDT flow pixco app name elaborate
scugic: Fix compilation errors reported by C++ compiler
i3c: Add Read/write FIFO depth config parameter
i3c: Remove repeated start check and update XI3c_MasterRecvPolled
i3c: Remove XI3c_ResetFifos from XI3C_BusInit and examples
sw_services:xilsecure:Added enable configuration for ECC curve.
qspips: src: Add missing parenthesis for macro expansions
xilpm: versal_common: server: Remove XPm_IdleRestartHandler
Warp Example App: Fix for interrupt callbacks
sw_apps: imgsel: Fix zynqmp image selector app hang in usleep
sw_services:xilocp:Add support for DME extension
sw_services:xilcert:Add support for DME extension
bsp:standalone: Add Xil_SChangeEndiannessAndCpy API
lib: xlnx: Avoid mapping in MPU for region mapped by bsp
sw_apps:versal_plm: Enabled PDI load status prints in debug level-0
sw_services: xilsecure: Update XPlmi_DmaXfr passing argument to word level
scripts: pyesw: utils: Add support for read-only embeddedsw usecase
sw_services: xilloader: Enhance Extract Metaheader command to get optional data
xpsmfw:versal_net: fix assertion on event
|
| |
| |
| |
| | |
chore(ctrlsw): update to revision d70f0d5674f9565dc8c62591ec569e64746809d0
|
| |
| |
| |
| | |
chore(firmware): update to revision d70f0d5674f9565dc8c62591ec569e64746809d0
|
| |
| |
| |
| |
| |
| |
| | |
examples: linux: zynqmp: Fix Typo in ZynqMP IPI Base address
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| |
| |
| |
| | |
sw_apps: zynqmp_fsbl: Add support to enable address mirroring
|
| |
| |
| |
| | |
This reverts commit 241e03c182b92760aef61c9c63c25b6efe5cf9b8.
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
fal: tests: utests: Remove reference to XAie_UserRsc in test cases
fal: src: Complete functionality of AIEFAL resource manager
fal: src: Port broadcast class to make requests to FAL resource manager
fal: src: Port Trace classes to make resource requests from FAL resource manager.
fal: src: rsc: Make sure to clear vRscs if request unsuccessful
fal: Port PC Events and PC Range classes to request from FAL resource manager
fal: src: rsc: Port performance counter classes to request from FAL resource manager
fal: Port Stream switch event port select to make resource requests from FAL.
fal: Port Group Event class to make resource requests to FAL resource manager
fal: Port Combo Events to request from FAL resource manager
fal: src: Port User Events to request from FAL resource manager
fal: Adds FAL resource manager
driver: src: io_backend: Add backend operation to get partition file descriptor
driver: src: interrupt: Remove internal resource requests from interrupt handling
driver: src: Remove resource manager requests for ECC
driver: src: Remove resource requests from XAie_TimerSync
|
| |
| |
| |
| | |
lib: multiconfigs.py: Update the get_domain_name to loop over all subsystems
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
arm64: zynqmp: Remove arm,cortex-a53-edac node
xilinx: Fix fpga region DT nodes name
arm64: zynqmp: Align nvmem-fw node with dt-schema
arm64: zynqmp: Disable DP on kd240
Revert "misc: xilinx-ai-engine: Added support to capture utilization."
Revert "misc: xilinx-ai-engine: Fix compilation warning"
v4l: xilinx: hdcp2xrx: Fix cppcheck warnings
v4l: xilinx: dprxss: Fix cppcheck warnings
ata: ahci_ceva: fix error handling for Xilinx GT PHY support
nvmem: Added eFuse provisioning support
firmware: xilinx: Efuse interface api support for Versal
drm: xlnx: drv: Check graphs presence before finding endpoint
drm: xlnx: hdcp: Limit stack frame size to 1024 bytes
|
| |
| |
| |
| |
| |
| |
| |
| | |
arm64: zynqmp: Remove arm,cortex-a53-edac node
xilinx: Fix fpga region DT nodes name
arm64: zynqmp: Align nvmem-fw node with dt-schema
arm64: versal-net: Setup correct addresses of GICR/GICD
arm64: zynqmp: Disable DP on kd240
|
| |
| |
| |
| | |
dp14rxss: Fix yaml for hdcp mmult configuration entry
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Below are the updates:
1bf6728 Revert "lopper: assists: gen_domain_dts: Remove dupe TCM node"
9173c4c openamp: xlnx: VHK158: clean up compatible string
7b8fafc lopper: assists: xlnx_overlay_dt: fixed the closing bracket missing issue
bfbd55b domain_access: reference count memory nodes
6937a27 Revert "openamp: xlnx: Clean up TCM handling"
4e8c9a4 assists/domain_access: keep all matched regions
8a936b8 openamp: xlnx: Clean up TCM handling
7a16db0 lopper: assists: gen_domain_dts: Remove dupe TCM node
17cc815 lopper: assists: domain_access: Fix typo vebose
033a78f lopper: assists: barmetal*: Fix race condition in the version driver handling
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| |
| |
| |
| |
| |
| |
| | |
The deploy directory path has been adjusted from BASE_TMPDIR to a
specific prefix MC_TMPDIR_PREFIX.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| |
| |
| |
| | |
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
mipicsiss: data: Update yaml file to support example designs
sw_apps:versal_plm: Restore secure state config after inplace update
sw_services:xilnvm:Extend secure state during efuse programming
sw_services:xilloader:Add support to extend secure state
sw_services:xilocp: Add support to extend secure state to SWPCR
sw_apps: memory_tests: Update memory rejectlist
xilpm:versal_common: xpm_device reset PendingReqm
v_hdmitxss1: Fix compilation error in sdt flow
v_hdmirxss1: Fix compilation error in sdt flow
v_hdmitxss: Update HDCP Repeater example to support SDT flow.
v_hdmirxss: Update HDCP Repeater example to support SDT flow.
hdcp22_tx: Fix Yaml entries for HDCP
hdcp22_rx: Fix Yaml entries for HDCP
|
| |
| |
| |
| |
| |
| |
| |
| | |
This reverts commit 794526e7b30bd43042f68c892ae8e63e14adcb3b.
XRT fails to build properly.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| |
| |
| |
| | |
zynqmp: gpu: Connect GPU to ZynqMP
|
| |
| |
| |
| | |
hw/display: Introduce ARM MALI-400 stub device
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
fal: tests: utests: Remove reference to XAie_UserRsc in test cases
fal: src: Complete functionality of AIEFAL resource manager
fal: src: Port broadcast class to make requests to FAL resource manager
fal: src: Port Trace classes to make resource requests from FAL resource manager.
fal: src: rsc: Make sure to clear vRscs if request unsuccessful
fal: Port PC Events and PC Range classes to request from FAL resource manager
fal: src: rsc: Port performance counter classes to request from FAL resource manager
fal: Port Stream switch event port select to make resource requests from FAL.
fal: Port Group Event class to make resource requests to FAL resource manager
fal: Port Combo Events to request from FAL resource manager
fal: src: Port User Events to request from FAL resource manager
fal: Adds FAL resource manager
driver: src: io_backend: Add backend operation to get partition file descriptor
driver: src: interrupt: Remove internal resource requests from interrupt handling
driver: src: Remove resource manager requests for ECC
driver: src: Remove resource requests from XAie_TimerSync
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Changelog:
Initial implementation of HIP apis and objects (#7940)
VITIS-11348 Refactor how the platform path is found per OS (#7953)
Vitis 6479 - Changing profiling to use correct clock frequencies for compute units and monitors (#7952)
VITIS-11415 Remove dynamic region report for Ryzen devices (#7950)
CR-1189595: Fixed issue where memory module events are not configured correctly (#7948)
Further support of memory module DMA events on Edge devices (#7947)
VITIS-11339 Remove AIE start column parameter from query. Remove AIE information query from alveo device shim
Support for memory module DMA events on client devices (#7928)
add tct all column test (#7942)
CR-1188254 Disable xbutil reset and program in RyzenAI 1.1 ARC2 (#7932)
Xcl Api Replacement (#7915)
Add iterations to df-bw to increase throughput (#7939)
Fix incorrect return value for xclRead (#7914)
Signed-off-by: saumya garg <saumya.garg@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
zynqmp_pmufw: Fix MISRA-C violation for rule 10.4
xpsmfw:versal_net: inline function calls for update manager code.
dfeprach: Support Baremetal SDT Yocto Flow
xilsem:Fixed IPI interrupt ID for PL MB Versal Net.
sw_services: xilpm: versal_net: Add PGGS/GGS permission for default subsystem
sw_services: xilpm: Refactor PGGS/GGS permissions feature
sysmonpsv: Support Baremetal SDT Yocto Flow
scripts:repo.py: Correct the logic to prioritize the latest versioned drivers
|
| |
| |
| |
| |
| |
| | |
hw/sd/sd: implement the sleep state
hw/misc/xlnx-versal-pmc-iou-slcr: implement the USB power state regs
hw/intc/arm_gicv3_redist: set the GICR_WAKER quiecent bit when asleep
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
update_buildconf: Ignore errors looking for bitbake-layers
project_config.py: Move all Kconfig generation to GenKconfigProj
multiconfigs.py: Replace BASE_TMPDIR with MC_TMPDIR_PREFIX
update_buildconf.py: No longer print the full BBMULTICONF list
project_config.py: Move configuration file generation here
multiconfigs: Adjust output to make it more clear
gen-machineconf: Refactor SDT and XSCT flows
sdt_flow.py: Use the hw_file path for args.psu_init_path default
update_buildconf.py: Always output local.conf info
update_buildconf.py: GenSdtConf use logger.plain for reference output
gen-machineconf: Add additional exceptions to traceback
yocto_machine.py:passing boot pdi
Sync hardware info printing
Make gen-machineconf capable of directly working with bitbake
Move from various sys.exit(x) to raising exceptions
lib: multiconfigs: Add support for domains generated by hardware design
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Below are the updates
ac63f30 openamp: xlnx: Add versal SOC's vhk158 and vek280
5b0289f lopper: assistes: Reduce dtb for sd-fec designs
6ce8ab4 lopper: assists: Enhance special proprety removal
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| |
| |
| |
| |
| |
| |
| | |
Fix SDT Building Instructions link in README.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| |
| |
| |
| |
| |
| |
| | |
dfeequ: Support Baremetal SDT Yocto Flow
mipicsiss: example: Fix bug in the selftest example
sw_services:xilplmi:Logic for DDRMC Calib Check Skip
dfeccf: Support Baremetal SDT Yocto Flow
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
EDAC/versal: Report the bit position of the error
EDAC/versal: Do not send the cumulative values
EDAC/versal: Add a NULL check for the user passed values
EDAC/versal: Do not register for the NOC errors
arm64: versal: Use iommu name for smmus
arm64: versal: Remove second interrupt property for qspi/ospi
arm64: versal: Remove unused xlnx,mc-id property
arm64: versal: Align dmas with dt schema
arm64: versal: Define 8 irqs for cci-500-pmu instead of 9
arm64: versal: Fix gic DT description
arm64: versal: Fix cpu-opp-table name
arm64: versal: Remove additional cpu property
xilinx: dts: Update the reg names for ddrmc edac
arm64: zynqmp: Fix kr260 clock wiring
arm64: zynqmp: Sync clock labels with kr260 revB
arm64: zynqmp: Describe 25MHz fixed clock for PL GEMs
arm64: versal-net: Align interrupts for ipp-rev1.9
drivers: crypto: Return fallback values as true/false in versal fallback
phy: xilinx-xhdmiphy: Disable dru_clk in error path
phy: xilinx-xhdmiphy: Fix function return types
media: i2c: Fix compilation issue for ap1302 isp driver
dt-bindings: remoteproc: zynqmp_r5: Make sram property required only for Versal and ZynqMP
remoteproc: zynqmp_r5: Versal NET: Enable R52 boot without TCM or OCM
drm: xlnx: dp: Reset DisplayPort IP
drivers: remoteproc: zynqmp: kick remote during detach
EDAC/versal: Make the bit position of injected errors configurable
dt-bindings: misc: xlnx,sd-fec: convert bindings to yaml
remoteproc: Make rproc_get_by_phandle() work for clusters
cdx: call of_node_put() on error path
cdx: create resource debugfs file for cdx device
cdx: add support for bus enable, disable and reset
cdx: register cdx bus as a device on cdx subsystem and create symbol namespaces for cdx subsystem
|
| |
| |
| |
| | |
Updated commit ID to latest HEAD
|
| |
| |
| |
| | |
Updated commit ID to latest HEAD
|
| |
| |
| |
| | |
Updated commit ID to latest HEAD
|
| |
| |
| |
| | |
Updated commit ID to latest HEAD
|
| |
| |
| |
| | |
Updated commit ID to latest HEAD
|
| |
| |
| |
| | |
Updated commit ID to latest HEAD
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Below are the updates
lopper: assists: Add special handling for xdma pcie
lopper:assists:baremetal*: Correct the steps to construct a 64 bit value from 2 32-bit cells
assists/domain_access: update start and size of memory
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| |
| |
| |
| |
| |
| |
| |
| | |
Ensure that IPI message buffers work for RPU application by using correct
destination buffer offsets
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| |
| |
| |
| | |
Updated commit ID to latest HEAD
|
| |
| |
| |
| | |
Updated commit ID to latest HEAD
|
| |
| |
| |
| | |
Updated commit ID to latest HEAD
|
| |
| |
| |
| | |
Updated commit ID to latest HEAD
|
| |
| |
| |
| | |
Updated commit ID to latest HEAD
|
| |
| |
| |
| | |
Updated commit ID to latest HEAD
|
| |
| |
| |
| | |
lib:gen-machineconf: Remove MEMORY configs if HW file changed
|
| |
| |
| |
| |
| |
| |
| | |
Construct buffers to be for PL1 on APU to RPU1 IPI
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| |
| |
| |
| |
| |
| |
| | |
apps: zynqmp_r5: Versal NET: Update linker script for booting
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| |
| |
| |
| |
| |
| |
| | |
Port openamp-fw recipes to use open-amp-xlnx MC recipe
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Below are the updates
assists: remove overly verbose output
assists/domain_access: count indirect references
assists/isospec: output cpu specific label
assists/domain_access: fix memory node -> address-map updating
yaml: update version check to use packaging module
assists: baremetal_xparameters_xlnx: Export MB V cpu parameters related defines
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Updated branch to master which has changes to support both boards
SC/Kria-SOM
Signed-off-by: Sharath Kumar Dasari <sharath.kumar.dasari@xilinx.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
(cherry picked from commit 83a5f29420bf7c2cf627ebfdd39b17aa73c8548d)
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
|