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* meta-xilinx-standalone: Move soc overrides from meta-xilinx-defaultMark Hatle2020-03-139-21/+20
| | | | | | | | | | | | | | | | | | | | Any soc overrides belong in the soc configuration files. Also move UBOOT_SUFFIX and UBOOT_ELF defaults into the meta-xilinx-default, as well as specific soc settings in each soc file. This results in the ability to override the value in multiple places based on load order: local.conf (user setting) machine.conf (machine setting) soc-....inc (soc setting) machine-xilinx-default.inc (the actual default) Each step uses ?=, so if the previous step hasn't set it that level will define it's default if necessary. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* meta-xilinx-bsp: rename machine-xilinx-override to xilinx-soc-family.incMark Hatle2020-03-1330-29/+5
| | | | | | | | | | The machine-xilinx-override is really just an extension to the standard soc-family.inc file. So rename this, move the include of soc-family.inc to this file, move the include to the soc includes to each soc file, and finally adjust the machines to remove machine-xilinx-override as it's no longer necessary. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* meta-xilinx-bsp: Update recipes to use SOC_FAMILY_ARCH and SOC_VARIANT_ARCHMark Hatle2020-03-137-7/+7
| | | | | | | Using the defaults will ensure that a machine or soc can override the default version. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* machine-xilinx-overrides: Make this genericMark Hatle2020-03-132-17/+7
| | | | | | | | | Move the soc specific contents into the soc configuration file. Adjust the PACKAGE_EXTRA_ARCHS append to a more generic method for setting the SOC_FAMILY and SOC_VARIANT package arch. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* meta-xilinx-bsp: Remove default valuesMark Hatle2020-03-1316-29/+1
| | | | | | Remove the default values, as they are already set by the soc include. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* meta-xilinx-bsp: Rename soc configuration masquerading as a tune fileMark Hatle2020-03-1329-26/+26
| | | | | | | The tune files were really soc configuration files. Tune files should only specify toolchain flags that affect optimiation and abi. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* linux-xlnx: Use new default defconfigsMark Hatle2020-03-131-2/+2
| | | | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* linux-xlnx: cleanup and make yocto-kernel-cache availableBruce Ashfield2020-03-132-3/+5
| | | | | | | | | | | | | | | | | | | The following cleanups are done: - remove the invalid KBRANCH setting of xlnx_rebase_v4.19, this doesn't belong below the LINUX_VERSION = "5.4" variable, since it confuses users - explicitly set the SRCREV_FORMAT to MACHINE, since we are not using the kernel-cache SRCREV as a rebuild trigger - make the yocto-kernel-cache avialable by default, since there are re-usable kernel features which can be exploited in its directory structure. We use the latest (v5.4) branch and set the SRCREV Signed-off-by: Bruce Ashfield <bruce.ashfield@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* Add older version of OpenCV 3.4.3Jaewon Lee2020-03-1010-0/+501
| | | | | | | | | | OpenCV 3.4.3 is not API compatible with OpenCV 4.1, so making the older 3.4.3 version available as needed. This version comes from meta-openembedded commit: 7b9f86ca792852e69a921b284fffaa1f942df96d Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com>
* libglu: Add build time dependency on glesv2 for zynqmpMadhurkiran Harikrishnan2020-03-091-0/+1
| | | | | | | | For ZynqMP, the KHR headers comes from the gles provider (Mali 400), hence add build time dependency on gles. Signed-off-by: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com>
* microblaze_dtb.py: Convert a dtb to one or more microblaze TUNE_FEATURESMark Hatle2020-03-091-0/+174
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because the microblaze is adjustable on the FPGA, we need a way for the system to adjust the TUNE_FEATURES for a given build. The device tree can specify the capabilities of the microblaze implementations defined in a specific design. If present, these can then be processed to provide a set of TUNE_FEATURES for each declared microblaze CPU. The output of the tool is formated in a way that it can be directly included in the user's local.conf, or placed in a file that is included by a machine or other file. The user will only have to declare the DEFAULTTUNE value that matches one of the generated tunes. General rules that are implemented: TUNE_FEATURE CONDITION ------------ ------------------------------- microblaze (all microblaze cpus) bigendian xlnx,endianness is not 1 64-bit xlnx,data-size is 64 barrel-shift xlnx,use-barrel is 1 pattern-compare xlnx,use-pcmp-instr is 1 reorder xlnx,use-reorder-instr is not 0 frequency-optimized xlnx,area-optimized is 2 multiply-low xlnx,use-hw-mul is 1 multiple-high xlnx,use-hw-mul is 2 divide-hard xlnx,use-div is 1 fpu-soft xlnx,use-fpu is not 1 or 2 fpu-hard xlnx,use-fpu is 1 fpu-hard-extended xlnx,use-fpu is 2 vX.YY model value of X.YY[.Z] Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* README.md: Add information about the new embeddedsw supportMark Hatle2020-03-091-1/+8
| | | | | | | Embeddedsw support is still in early proof of concept phase, so we want to make sure any users know this. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* README.md: revise README.md basedMark Hatle2020-03-091-8/+7
| | | | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* cortexa53-zynqmp/cortexa72-versal: Fix cortex based BSPsMark Hatle2020-03-092-22/+2
| | | | | | | The BSPs had defined their own internal tunes. Instead use the yocto project default tunes. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* lopper: Add runtime dependency of python3-dtcMark Hatle2020-03-091-0/+2
| | | | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* cairo: For ZynqMP enable glesv2 packageconfigMadhurkiran Harikrishnan2020-03-091-0/+2
| | | | | | | Enable glesv2 packageconfig for cairo and leverage mali400 in zynqmp Signed-off-by: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> Signed-off-by: Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com>
* mesa: Do not provide KHR headersMadhurkiran Harikrishnan2020-03-091-0/+3
| | | | | | | | | KHR headers should be provided by the egl provider for zynqmp, as the egl headers have dependencies on it, which otherwise causes compilation error. Signed-off-by: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> Signed-off-by: Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com>
* Revert "libmali-xlnx: Dont provide KHR headers"Madhurkiran Harikrishnan2020-03-091-0/+2
| | | | | | | | | | This reverts commit 9c2708913ab24d2697124b05bcb9d541a4903547. Mali EGL headers have dependencies on KHR headers and this should be coming from EGL provider rather than mesa. Because EGL application which have dependencies on EGL header, do not pull gl headers. Signed-off-by: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> Signed-off-by: Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com>
* meta-xilinx-standalone: Add support for versal cortexr5 processorAppana Durga Kedareswara rao2020-03-062-0/+4
| | | | | | | | | This patch updates the COMPATIBLE_MACHINE and DTBFILE variables to compile esw use cases for cortexr5 processor on versal platform. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* meta-xilinx-standalone: recipes-applications: lwip-echo-server: Add recipe ↵Appana Durga Kedareswara rao2020-03-031-0/+41
| | | | | | | | | for compiling lwip echo server application This recipe compiles the lwip echo server application. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* meta-xilinx-standalone: recipes-libraries: lwip: Add recipe for lwipAppana Durga Kedareswara rao2020-03-031-0/+22
| | | | | | | This recipe compiles the lwip library. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* meta-xilinx-standalone: recipes-libraries: xiltimer: Add task for generating ↵Appana Durga Kedareswara rao2020-03-031-1/+7
| | | | | | | | | | | | | | | | | | | | | | | cmake meta-data In the esw repo xiltimer library provides the abstarct API's for the timing implementation like sleep routines, tick handler etc... These wrapper API's has dependency on the h/w component drivers like axi_timer, ttcps to provide the required funcationality. In order to support these h/w dependencies there is a lib_paraser.py script in the esw repo which parses the dtb and generates the required config data in the form of cmake. The generated cmake file will be consumed by the library to support below features 1) To show list of available timer instances in the cmake-gui 2) Source code management based on the Timer instance available. This patch updates the recipe to call the lib_parser.py before do_configure. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* meta-xilinx-standalone: Add dependencies on python3-dtc-nativeAppana Durga Kedareswara rao2020-03-031-1/+1
| | | | | Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* xilinx-standalone.inc: Replace qemu dependency with mingw32 specific recipeMark Hatle2020-03-031-1/+2
| | | | | | | | | | | Commit fb62f071f94fc45444357865665fec6d4b11d1ca added a workaround for a mingw runtime issue, but did not label it as mingw32 specific. QEMU may cause failures in some non-linux configurations. Make this option mingw32 specific, and also avoid qemu making the dependency on the missing mingw32 component explicit. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* xilinx-standalone: sync distrosMark Hatle2020-03-032-8/+8
| | | | | | | | Both xilinx-standalone (w/ lto) and xilinx-standalone-nolto need to use a common set of system settings. A few settings were missed in the merge of the decoupling work. Move these to the common settings file. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* Correcting ':' placement for appending file pathsJaewon Lee2020-03-035-5/+5
| | | | | | | | | When appending file paths the ':' should be at the beginning of the path. The patched appending lines were still working because there was no paths added after the '__default:' Fixing typo to ensure no breakages later Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com>
* lopper: Add lopper utilityMark Hatle2020-03-021-0/+32
| | | | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* u-boot-xlnx:Updating defconfig for all zynq machinesJaewon Lee2020-03-028-12/+8
| | | | | | | Update UBOOT MACHINE defconfig to xilinx_zynq_virt_defconfig instead of using custom machine specifc defconfigs. Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com>
* meta-xilinx-standalone/device-tree: remove duplicate internal referencesMark Hatle2020-02-271-16/+4
| | | | | | Some of the components have been moved to internal configuration layers Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* meta-xilinx-standalone: Add dependencies on python3-dtcMark Hatle2020-02-274-3/+7
| | | | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* Remove hardcoded XILINX_RELEASE_VERSION in recipesMark Hatle2020-02-275-6/+0
| | | | | | | XILINX_RELEASE_VERSION is defined by the layer.conf, so we can and should use the version defined there. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* xlnx-compatible-os.bbclass: Class to allow recipes to list OS compatibilityMark Hatle2020-02-2714-1/+48
| | | | | | | | | | | | | | | | | | Following the example of base.bbclass in OE-Core, a new COMPATIBLE_OS variable is defined. Similar to COMPATIBLE_MACHINE, it is a regex that can be used to declare TARGET_OS string compatibility on a per-recipe basis. Either the distro configuration or the recipes themselves will need to inherit this class. By default the class assumes we're building a Linux based system, and thus any recipe who has not declared compatibility is compatible with Linux. The default compatible field was copied from bitbake.conf to ensure there are no surprised. Additionally, enable the usage of this class throughout meta-xilinx-standalone layer. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* Ensure that bbappends do not affect task hashesMark Hatle2020-02-273-7/+8
| | | | | | | | When the xilinx-standalone distribution is not enabled, we need to make sure that we do not affect various task hashes. This conforms to the Yocto Project Compliance requirements. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* python3-dtc: Add python3 dtc moduleMark Hatle2020-02-271-0/+27
| | | | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* newlib: Cleanup and merge the two newlib bbappends into a single appendMark Hatle2020-02-274-19/+15
| | | | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* newlib: Move microblaze supportMark Hatle2020-02-2716-44/+28
| | | | | | | | | meta-xilinx-standalone is only for baremetal work. Theoretically the newlib items can be used on other configurations, so move the microblaze newlib/libgloss work into meta-xilinx-bsp. This mirrors how other microblaze specific work has been handled. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* xilinx-standalone: When building for cortexr5, add -DARMR5 for CCARGSMark Hatle2020-02-271-0/+3
| | | | | | | | The embeddedsw expects -DARMR5 when building for a cortexr5. Enable this globally within the distribution configuration. This ensures that the tunings remain generic. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* cortex-r5: Add cortexr5f configurationMark Hatle2020-02-273-3/+8
| | | | | | cortexr5f includes vfp3-d16 support. Enable this and hard float. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* system-zcu102: Create heterogeneous machine configuration for ZCU102 ↵Alejandro Enedino Hernandez Samaniego2020-02-273-0/+77
| | | | | | | | | | | | | | | | | | | | evaluation board. Using the MACHINE=system-zcu102 should allow users to build the required artifacts for the several architectures inside a ZCU102 board. This machine along with the declared multiconfigs set up the wiring to do so, building Linux, PMU firmware and FSBL on a single bitbake invokation: $ bitbake core-image-minimal Three different TMP directories will be used, these depend both on the architecture for which packages are being generated and the C library that was used for that configuration. This should be used as an example that can easily be adapted to other boards. Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com>
* device-tree: Override repo for supported machinesAlejandro Enedino Hernandez Samaniego2020-02-271-1/+6
| | | | | | | | | | | | The deocupling device-tree repo does not currently work with machines like the zcu102-zynqmp, while the default repo does work fine. Set overrides for the decoupling working machines, while keeping the REPO as it was by default for other machines to avoid this error. Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com>
* xilinx-standalone: Add buildhistory to the DISTRO to avoid cooker errorsAlejandro Enedino Hernandez Samaniego2020-02-271-0/+2
| | | | | | | | | | | | | | | | There is a bug upstream, which explains this problem further [1], but basically when there are several multiconfigs they could be polluted with the events of each other, in this specific case, a multiconfig that uses the DISTRO=petalinux which itself inherits the buildhistory class will cause an error on the multiconfig that builds xilinx-standalone, while the correct fix is t fix this upstream I have not had the time to do that, and currently an easy and not very conflicting workaround is to simply inherit the builhistory class on the xilinx-standalone DISTRO as well. [1] https://bugzilla.yoctoproject.org/show_bug.cgi?id=13071 Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com>
* meta-xilinx: Add support for cortexr5 processorAppana Durga Kedareswara rao2020-02-272-2/+7
| | | | | | | | | | | This patch updates the COMPATIBLE_MACHINE and DTBFILE variables to compile esw use cases for cortexr5 processor on ZynqMP platform. This patch also updates the TUNE_CCARGS in the cortexr5-zynqmp.conf file as per baremetal requirements. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
* esw: Switch release version to 2020.1Alejandro Enedino Hernandez Samaniego2020-02-271-1/+1
| | | | Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com>
* libgloss: Dont install libgloss as libxil since we actually have libxilAlejandro Enedino Hernandez Samaniego2020-02-271-3/+4
| | | | Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com>
* cortexa72: Update cortexa72 machine variable namingAppana Durga Kedareswara rao2020-02-272-6/+5
| | | | | | | cortexa72 processor machine name changed from cortexa72 to coretexa72-versal update the naming convention in the recipes for the same. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
* meta-xilinx-standalone: recipes-libraries: Add recipe for xilmailboxAppana Durga Kedareswara rao2020-02-271-0/+6
| | | | | | This recipe compiles the mailbox library Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
* meta-xilinx-standalone: recipes-applications: hello-world: Remove dependency ↵Appana Durga Kedareswara rao2020-02-271-2/+32
| | | | | | | | | | | | | on esw_examples class Hello world recipe doesn't have any dependency on the do_generate_eglist task, It has dependency only on the linker generation. So the esw repo linker generation is moved to the liner_gen.py file, which needs to be called before do_configure. This patch updates the recipe for the same. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
* meta-xilinx-standalone: classes: cleanup the classAppana Durga Kedareswara rao2020-02-271-1/+6
| | | | | | | | | | | In the esw repo linker generation is moved to the liner_gen.py file, which needs to be called before do_configure. This patch updates the bbclass for the same. Also updated the DEPENDS variable list. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
* meta-xilinx-standalone: recipes-libraries: libxil: Cleanup the recipeAppana Durga Kedareswara rao2020-02-271-13/+6
| | | | | | | | | | | There is no need to create an additional task do_create_dtb. script mentioned in the do_generate_cmake needs to be called before do_configure(), we can use do_configure_prepend() for this instead of adding own task. This patch updates the recipe for the same. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
* meta-xilinx-standalone: recipes-libraries: xilstandalone: Cleanup the recipeAppana Durga Kedareswara rao2020-02-271-10/+1
| | | | | | | | | | | There is no need to create an additional task do_create_dtb. script mentioned in the do_generte_bspcfg_data needs to be called before do_configure(), we can use do_configure_prepend() instead of adding own task. This patch updates the recipe for the same. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
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