| Commit message (Collapse) | Author | Age | Files | Lines |
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With the previous version by default xen variables are included in
non xen use case, it would have been possible for kernel and devicetree
offset can be override from meta-virtualization layer. With the new
version add variables as addendum.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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The PLNX_SCRIPTS_PATH is being embedded into various hashes, but this
does not affect the output of the build in any way. Avoid including
this various in the hash for recipes.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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xrt API is stable, but we provide different versions if there is an ai-engine
or not. Skip the hash calculations to allow dependent packages to work with
both versions.
This resolves a problem where xrt w/ and w/o ai-engine support causes vart
and thus vitis-ai to rebuild multiple times.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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MALI_PACKAGE_ARCH depends MACHINE_ARCH depends on MACHINE
We can ignore MACHINE_ARCH, as only the resulting value matters, otherwise
the package now depends on MACHINE
PACKAGE_ARCH can ignore MALI_PACKAGE_ARCH, again only the
resulting value of PACKAGE_ARCH matters. Otherwise the value
of MALI_PACKAGE_ARCH will be used in the hash, even if the condition is
not true.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Changelog:
CR-1142089 - Improvements to AIE graph hierarchy and channel support (#7656)
Add support for LSP for use by emacs/eglot (#7665)
driver plug-in should support non-DRM based device node (#7664)
CR-1170456 Add NOT SUPPORTED string to all ps tests (#7663)
EDGEML-5898 Search windows PATH for xbutil directory to find loader (#7662)
Force xclbin won't impact if current xclbin in use (#7658)
moving to latest petalinux (#7661)
Vitis-8819 Elf parsing and patching (#7659)
add all reports to a sub-folder (#7651)
VITIS-8853 Refactor SubCmdValidate (#7643)
Moving to 2023.1 petalinux (#7657)
Zocl refactoring : Initial version (#7645)
Providing OS Support for RHEL_8_8 and RHEL_9_2 (#7655)
Fixing issue with incorrect assumption on system metadata (#7654)
Align DMA IP driver (#7653)
fixing edge compilation issue when cloned separately (#7650)
Move hwctx initializtion of module to xrt::run (#7647)
Vitis-8819 First-class execution buffer basic elf support (#7644)
Fixed multislot issues (#7631)
Changing the mapping of arguments to memory from kernel-based to compute unit based. Also adding support for host memory. (#7640)
Templatize internal utility aligned_alloc (#7641)
Signed-off-by: saumya garg <saumya.garg@amd.com>
Add workaround for gitsm failure with this repository.
git -c gc.autoDetach=false -c core.pager=cat submodule update --recursive --no-fetch failed with exit code 2
OSError: [Errno 8] Exec format error
.../xrt/202320.2.16.0-r0/recipe-sysroot-native/usr/bin/../libexec/git-core/git-submodule: 46: .: Can't open /git-sh-i18n
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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dm: core: ofnode: Change the log message to debug
clk: versal: Fix the function versal_clock_ref
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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IMAGE_BOOT_FILES is a whitespace-separated list of entries specifying
files to be installed into the boot partition. Entries can change the
installed filename by specifying the destination name after a semicolon (e.g.
u-boot.img;uboot). Make sure to use the installed filename when scanning
IMAGE_BOOT_FILES if one is provided, otherwise use the specified file as-is.
Signed-off-by: Trevor Woerner <trevor.woerner@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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xilpm: versal_net: skip rpu halt if core is powered down
xilpm: versal_net: do not skip core power down
versal_psmfw: remove PCIL configuration from requested pwr sequence
xilpm: versal_net: execute direct pwr down sequence for rpu
sw_apps:versal_plm: Added redundancy for XOcp_KeyInit
sdps: Fix code format issues
sdps: Reorder XSdPs_FrameCmd and XSdPs_Identify_UhsMode APIs
xilocp: Move SWPCR buffers in PCR example to shared memory
qspipsu: data: Update yaml to port missing examples
xilsecure:Remove TRNG driver from xilsecure library
lwip213: Update axi ethernet and dma code to support SDT and non SDT flows
lwip213: Update axi emaclite code in lwip adapter to support SDT and non SDT flows
sw_apps: srec_spi_bootloader: Update dependent drivers in yaml file
lib: sw_services: Update supported_processors list for psx_pmc and psx_psm processors
v_hdmitxss1: Added support for VEK280
v_hdmirxss1: Added support for VEK280
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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versal_psmfw: update usage of XPsmFw_Write32 and XPsmFw_RMW32
xilpm: versal: server: Check state of DDRMC in self-refresh operations
qspipsu: src: Fix code format issues with checkpatch tool
qspipsu: examples: Add status check for XQspiPsu_SetClkPrescaler API
qspipsu: Add support for feedback clock
lib: sw_apps: openamp: sdt: Ensure parity in build process for OpenAMP apps in VitisNG
ThirdParty: sw_services: OpenAMP: sdt: Enable BSP for A72, R52 Proxy information
ThirdParty: sw_services: OpenAMP: sdt: Enable BSP build in one-shot
lib: sw_apps: libmetal demo: sdt: Add parity with Vitis Classic
ThirdParty: sw_services: Libmetal: SDT: Enable BSP support for A53, A72, A78, R52
scripts: pyesw: open-amp: Pass OS to application
bram: Fix interrupt example compilation errors in sdt flow
Xilsecure: Error out disallowed CPU modes
sw_apps: versal_psmfw: Update PSMFW release version
sdps: Add description for Adma2_DescrTbl32/64
Revert "uartns550: Add support for peripheral test for uartns550 in SDT flow"
Revert "uartpsv: Add support for peripheral test for uartpsv in SDT flow"
Revert "iicps: Add support for peripheral test for iicps in SDT flow"
Revert "iic: Add support for peripheral test for iic in SDT flow"
Revert "uartlite: Add support for peripheral test for uartlite in SDT flow"
Revert "uartps: Add support for peripheral tests in SDT flow"
Revert "gpio: Disable peripheral test for gpio in SDT flow"
Revert "sw_apps: zynq_fsbl: fixed addresses issue in SDT flow"
drivers: emacps: Fix the order of clock parameters in _g.c
mipicsiss:Updated dependencies.props Updated dependencies.props with rc21008adrv file names
scripts: pyesw: create_bsp: Fix the family variable value for microblaze platform
axidma: Fix selftest example in yaml file for SDT flow
xilpm: versal: server: Update AIE1 memory zeroization routine
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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xilinx_mirrors.py: file:// is appending extra
Remove k24-kv as it is no longer required
Kconfig.part: Update the config string for parse threads
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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1. Add support for bin and single dts use case.
2. Skip reciep when both .bit and .bin files are used in SRC_URI.
3. Fix regular expression logic to handle .dts and .dtsi file search.
For example if the file name is user-dts.dtsi then dts search count
was set to one which results in build failures.
4. Skip devicetree do_compile task if input file is dtbo in SRC_URI for
ZynqMP and Zynq-7000.
5. Using bootgen tool "-o" option user can specify output file name.
Hence fix logic for .bin install as .bin file name doesn't have to be
<filename>.bit.bin always.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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versal:psmfw: Integrate PSM interrupt injection STL
axivdma: Add selftest example in yaml file
xilpm: Fix for DDR modeling implementation gaps for versal-net
xilpm: versal_net: Synchronize init node functions with Versal
xilpm: versal_common: Copy xpm_node.h and xpm_nodeid.h generated by the latest versal-topology repo
sw_apps: zynqmp_fsbl: Added protection macro for the prints at handoff
bsp: standalone: Do not assign coresight as stdout/stdin for non ARM based processors.
xilpm: versal_net: server: Remove redundant workaround
BSP:ARMv8:32bit: Fix Cortexa53 32 bit BSP compilation failure
trngpsv: Doxygen fixes
xilpdi: Doxygen fixes
xilloader: Doxygen fixes
sw_apps: zynq_fsbl: fixed addresses issue in SDT flow
uartns550: Add support for peripheral test for uartns550 in SDT flow
uartpsv: Add support for peripheral test for uartpsv in SDT flow
iicps: Add support for peripheral test for iicps in SDT flow
iic: Add support for peripheral test for iic in SDT flow
uartlite: Add support for peripheral test for uartlite in SDT flow
uartps: Add support for peripheral tests in SDT flow
gpio: Disable peripheral test for gpio in SDT flow
sw_services:xilnvm: Add redundnacy for XNvm_EfusePgmAndVerifyBit
sw_services:xilnvm:Removed XNvm_EfuseReadCacheRange
sw_services:xilnvm: Assign key clear status only when status is XST_SUCCESS
sw_services:xilnvm: Add missing else check in XNvm_EfuseReadPpkHash
sw_services:xilnvm: Clear AES keys
sw_apps: zynqmp_fsbl: Add forward declaration for config object
xilpm: Add forward declaration for config object
uartlite: Use Canonical form for base address in uartlite examples
scugic: Support PL to PS interrupts for VERSAL NET
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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fix(versal-net): make pmc ipi channel as secure
fix(versal): make pmc ipi channel as secure
fix(versal-net): add redundant call to avoid glitches
fix(versal-net): change flag to increase security
chore(zynqmp): remove unused configuration from TSP
fix(zynqmp): resolve runtime error in TSP
chore(xilinx): reorder headers in assembly files
chore(xilinx): correct kernel doc warnings for missing functions
fix(xilinx): add headers to resolve compile time issue
fix(xilinx): remove clock_setrate and clock_getrate api
feat(versal-net): ddr address reservation in dtb at runtime
feat(versal): ddr address reservation in dtb at runtime
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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Add variables for xen u-boot script and define in meta-virtualization
dynamic layer bbapends.
Variables are set wtih weak default assignment.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Variables set from dynamic layer bbappends will not take effect due
softer assignment defined in u-boot-xlnx-scr.bb.
Hence weak assignment should be set for variables in u-boot-xlnx-scr.bb
file so that pre-expansion values are properly handled. This way
variable value can be changed from dynamic layer bbapends or local.conf.
Also fix indentation.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Update license checksum and source revision for ai-engine recipes.
Signed-off-by: Gregory Williams <gregory.williams@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Previously XAUTHORITY location was detected by filtering Xorg process command
line, which is not available in busybox ps implementation.
Instead detect correct Xorg commnad line by grepping for the "Xorg :displaynum"
and extract -auth argument.
If no -auth argument present then Xorg is running without display manager, thus
XAUTHORITY env var should remain undefined.
Signed-off-by: Daniel Levin <daniel.levin@amd.com>
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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trngpsx: Removed example support for PKI instances
nandps: Fix syntax issues in driver CMakeLists.txt
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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lib: sw_apps: Update lwip BM apps to have additional SDT checks
lib: sw_apps: lwip_echo_server: Remove PPC platform file
Video drivers: Removed version number and added Overview.
spips: Fix data corruption issue at lower clock speed
lib: sw_apps: freert lwip*: Add custom heap size for freertos
scripts: pyesw: build_app: Update link libraries based on the available libraries in the bsp
xilpm: versal_net: add tcm device into prealloc list
mipicsiss : Updated XV_HdmiTxSs1_ReadEdid API
Updated changelog for axicdma and other componets
v_hdmitxss1: updated the API call for XV_HdmiTxSs1_ReadEdid
v_hdmirxss1: updated API call for XV_HdmiTxSs1_ReadEdid
sw_services:xilsem:Corrected XSEM_SSIT_MAX_SLR_CNT macro definition
ddrcpsu: Fix code formatting issues with checkpatch
ddrcpsu: Add support for system device-tree flow
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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pinctrl: zynqmp: Add support for output-enable and bias-high-impedance
pinctrl: zynqmp: Add version check for TRISTATE configuration
firmware: zynqmp: Add support to check feature
arm64: versal_net: Disable the lock option for mini ospi and qspi
arm64: zynqmp: Disable the lock option for mini qspi
arm64: versal: Disable the lock option for mini ospi and qspi
mtd: spi-nor: Add spi flash lock config option
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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VersalNet PLM: Updated MC mb and PMC handshake support source
xdmapcie: Fixed xdmapcie driver integration issue in SDT flow
pciepsu: Fixed Config structure issue in SDT flow
scripts: pyesw: Fix issues with the code intelliSense
lib: sw_apps: lwip*: Bump stack and heap size
scripts: pyesw: Add support for override os level params from the template app
XilinxProcessorIPLib: drivers: Fix syntax issues in the scutimer and scuwdt examples for peripheral test in system device-tree flow
cmake: toolchainfiles: microblaze_toolchain.cmake: Add gc-sections linker flags by default
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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arm64: versal-net: Add sysmon node entry
Revert "arm64: xilinx: Replace _ from clock node names by -"
drm: xlnx: hdmi: Fix kernel documentation for xlnx_hdmi_set_frl_tmds_mode()
drm: xlnx: hdcp: Fix kernel documentation for xlnx_hdcp_tx_init()
pinctrl: pinctrl-zynqmp: Add support for output-enable and bias-high impedance
dt-bindings: pinctrl-zynqmp: Add output-enable configuration
firmware: xilinx: Add version check for TRISTATE configuration
firmware: xilinx: Use GENMASK for Family and SubFamily macros
firmware: xilinx: remove clock_setrate and clock_getrate api
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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versal: Add support for xcvm2602
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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This reverts commit ee478e17a379f7609f848dbb19da3ddf67d8950d.
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aie-rt: Updated the license files
driver:src: Fixed transaction buffer generation
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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INSTALL_PATH variable name is imprecise, Hence rename INSTALL_PATH
to MCDI_PATH_EXAMPLES. Also use ${datadir} path variable.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Kept the .h files in the -dev package
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Linking now takes into account LDFLAGS, so the TARGET_CC_ARCH is no longer needed.
do_install was missing header file installation, this has been resolved in the
updated: make install
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Changelog:
Remove MCDI test app from README_CDX.md file
CDXBUS-230: CDX DPDK Documentation
CDXBUS-233: Delete MCDI library from DPDK code
bus/cdx: silence bus scan when CDX is unavailable
Add cdx_test application with PMD
Rename cdx_test aplication to cdx_exerciser_test
Add instructions to include DPDK packages in rootfs
Update README_CDX for June release
CDXBUS-224 bus/cdx: Provide a driver flag for optional resource mapping
CDXBUS-140: Add mc_driver_pcol_private.h file
CDXBUS-140: Add MSI test for VNX board
Update cdma_demo application as per upstream fixes
CDXBUS-224 Fix coverity errors
CDXBUS-222: Pull changes from upstream code
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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ddrpsv: Add VersalNet support
BSP: cortexr5: Enable LLPP for CortexR52
sw_services:xilsem: Add support for SDT flow
SDITXSS: Mismatch between config parameter and TCL parameter mapping.
sw_services: xilsecure: Remove duplicate code
sw_services: xilmailbox: Fix MISRA-C violations
xilpm: versal: server: Add clk_cpll in CPM clock list
xilpm: server: GtyHouseClean loop counter made volatile
Video Drivers: Modified drivers to remove version number
SDIRX: Register Read size is updated to 35.
lib: bsp: standalone: Remove PM_CLOCK_SET/GET_RATE APIs from versioning
xilpm: versal_common: server: Remove PM_CLOCK_SET/GET_RATE APIs from Featurecheck
xilpm: versal_common: client: remove PM_CLOCK_SET/GET_RATE APIs
xilpm: zynqmp: client: remove PM_CLOCK_SET/GET_RATE APIs
XilNvm: Remove gaps in NVM API IDs
gpio: Use Canonical form for base address in gpio examples
Deprecate video drivers
lib: bsp: Update GPIO and I2C interrupt Id macros for Versal Net
sw_services: xilsecure:Handling endianness in ECDSA examples
sw_services:xilplmi:Added redundant error check during update
sw_services:xilplmi:Added redundant check in Tamper Detect
sw_services:xilplmi:Added Redundant call for Sldstate check
sw_services:xilplmi:Added redundant write for SSS Config
sw_services:xilloader:Remove Additional PPK Check
sw_services:xilloader:Updated Image Store Error codes
lib: sw_apps: lwip_*: platform.c: Setup seperate timer function for SDT Flow
lib: sw_apps: lwip*: Add missing properties from mss
lwip213: Rename config params to generic names
xilpm:versal_net:server: XPm_Reqm save and restore dynamic fields
plm: versal_net: Reinitialize PsmToPlmEvent
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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spi: zynq: Clear flags to get updated value
spi: zynqmp_qspi: Clear flag to get updated value
xilinx: board: Add support to pick bootscr flash offset/size from DT
dm: core: ofnode: Add ofnode_read_bootscript_flash()
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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Revert "aie-rt : Updated SRCREV for 2023.2_7359"
This reverts commit 7cb03f64b9589083d4f4ee8d0554266abd691010.
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aie-rt: Updated the license files
driver:src: Fixed transaction buffer generation
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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drm: xlnx: scaler: fix kernel doc typo for function names
drm: xlnx: scaler: unused variables logic corrected
spi: spi-cadence: Fix transfer timeout issue
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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petalinux_hsm_bridge.tcl: Remove delete-node aliases
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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spi: zynqmp_qpsi: Enable invalidate_cache for ZynqMP and Versal
xilinx: board: Add support to pick bootscr address from DT
dm: core: ofnode: Add ofnode_read_bootscript_address()
Revert "arm64: xilinx: Replace _ from clock node names by -"
arm64: zynqmp: Get clock node name back with _
arm64: versal: Increase the number of DRAM banks to 36
spi: zynq: Configure lqspi register based on memory configuration
arm64: versal-net: Add sysmon node entry
xilinx: zynqmp: Do not setup boot_targets if driver is not enabled
xilinx: versal: Do not setup boot_targets if driver is not enabled
xilinx: versal-net: Do not setup boot_targets if driver is not enabled
arm64: xilinx: Do not use _ in DT node names
arm64: zynqmp: Use s/gtr_sel/gtr-sel/ for DT node name
arm64: zynqmp: Use s/heartbeat_led/heartbeat-led/ for DT node name
arm64: xilinx: Replace _ from clock node names by -
arm64: zynqmp: Rename xlnx,mio_bank to xlnx,mio-bank for DLC21
arm64: versal-net: Remove xlnx,device_id property from VNX
arm64: versal-net: Remove ref_clk node from VNX board
mtd: spi-nor: Update block protection flags for flash parts
net: zynq_gem: Add missing newline (upstream sync)
xilinx: versal-net: Remove additional newline in board.c
spi: spi-uclass: Dont return error for single cs
spi: spi-uclass: Move restricting multi_cs_cap code
dm: core: Remove debug print from of_read_u64_index
mtd: spi-nor: Add support for locking on Spansion nor flashes
mtd: spi-nor: Add support for locking on GIGADEVICE nor flashes
mtd: spi-nor: Add support for locking on ISSI nor flashes
mtd: spi-nor: Add support for locking on Macronix nor flashes
clk: zynqmp: Add gem rx and tsu clocks to return register
clk: zynqmp: Add set_rate support for gem rx and tsu clks
arm64: zynqmp: Add resets property for CAN nodes
spi: zynq: Add support for parallel-memories and stacked-memories
spi: zynqmp_qspi: Add parallel memories support in GQSPI driver
spi: spi-uclass: Read chipselect and restrict capabilities
mtd: spi-nor: Add parallel and stacked memories support in spi-nor
dm: core: support reading a single indexed u64 value
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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xilpm: versal_common: server: Fixed PLM compilation warning
esw: Add support for stack and heap configuration in sdt flow
axidma: Fix base address in examples for SDT flow
vphy: added Dir for clock primitive
v_hdmitxss1: added compliance related changes
v_hdmirxss1: added compliance related changes
v_hdmiphy1: added Dir for clock primitive
VersalNet: Trng: Fix compilation warning
Revert "sw_apps: zynq_fsbl: fixed addresses issue in SDT flow"
sysmonpsv: Add support for SDT
sw_services:xilsecure:Initialize KeySizeInWords to avoid invalid value incase of glitch
sw_services:xilsecure:Rename XSecure_AesDpaCmDecryptKat to XSecure_AesDpaCmDecryptData
sw_services:xilsecure:Add volatile keyword for SStatus variable
mcdma: Fix canonical definiton in interupt example
mcdma: Fix interrupt ids in interrupt example
v_hdmirx1: Handle Rx data when there is delay between Rx clock and data
BSP: fix style issues
BSP: Remove XPAR_CPU_ID dependency
scugic: Fix style issues.
scugic: Remove XPAR_CPU_ID dependency
sw_apps: zynq_fsbl: fixed addresses issue in SDT flow
VPROCSS: Added Overview to addtogroup instead of driver version
VPROCSS: Driver version is incremented to v2_12
VPROCSS: Error correction in tcl file
xilpm: versal: server: Validate PwrDomain pointer
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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driver: src: Add missing header file dependency
driver: src: Added Support for Status Dump
driver: src: io_backend: Set bitmap for partitionInitialize
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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libxil warnings are obversed in multiconfig builds.
WARNING: mc:cortexa53-0-zynqmp-fsbl-baremetal:libxil-2023_sdt_experimental+gitAUTOINC+742a608800-r0 do_configure: QA Issue: libxil: invalid PACKAGECONFIG: rtc [invalid-packageconfig]
WARNING: mc:cortexa53-0-zynqmp-fsbl-baremetal:libxil-2023_sdt_experimental+gitAUTOINC+742a608800-r0 do_configure: QA Issue: libxil: invalid PACKAGECONFIG: qemu-usermode [invalid-packageconfig]
This is due to rtc and qemu-usermode was enabled for all targets in
MACHINE_FEATURES_BACKFILL, Hence disable rtc and qemu-usermode for
multiconfig targets by adding to MACHINE_FEATURES_BACKFILL_CONSIDERED
list in inclusion file.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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sw_apps: zynqmp_fsbl: added SDT support
dfeofdm: Antenna interleave delay reorder
ipipsu: Update the target count
sw_services:xilsecure:Fix HMAC security review comments
scripts: linker_files: Add bootdata section to R5 linker scripts
xilpm: versal_net: server: Fix incorrect PSM RAM size
xilpm: versal: server: Fix incorrect PSM RAM size
Export each of the memory_order enumerators
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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hw-description.tcl: add proper check for axi_emc
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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drivers: tmr_inject: Fix example compilation issue
v_hdmitxss1: Fix code indentation of XV_HdmiTxSs1_ReadEdid function
v_hdmitxss1: Add support for reading 4 block EDID
rfdc: Add NCO frequency paramater
rfdc: Add properties to yaml
sw_services:xilloader:Set status variables as Volatile
sw_services:xilplmi:Added temporal check for Sld Notification
sw_services:xilplmi:Added redundant check for PlmUpdate
sw_services:xilplmi:Added redundant write in plmupdate
sw_services:xilplmi:Added redundant call for Tamper Detect
sw_services:xilplmi:Added redundancy for SlrType Check
sw_services: xilsecure: Check StatusTmp instead of Status
sw_services:xilocp:Add redundancy for key generation APIs
sw_services:xilocp: Remove clearing personalization string
dfeofdm: Output delay in ccid slots
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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drivers: iio: adc: xadc: Correct Write edge in CFG
mtd: spi-nor: Avoid writing EAR register for flashes less than 16MB
mtd: spi-nor: Use nor->info->id[0] for manufacturer id
arm64: xilinx: Do not use _ in DT node names
arm64: zynqmp: Use s/gtr_sel/gtr-sel/ for DT node name
arm64: zynqmp: Use s/heartbeat_led/heartbeat-led/ for DT node name
arm64: xilinx: Replace _ from clock node names by -
arm64: zynqmp: Rename xlnx,mio_bank to xlnx,mio-bank for DLC21
arm64: versal-net: Remove xlnx,device_id property from VNX
arm64: versal-net: Remove ref_clk node from VNX board
staging: xilinx-tsn: Remove duplicated linux/clk.h
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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Build and install the mcdi library components independently from DPDK
and remmove these components from the original dpdk recipe.
Signed-off-by: John Toomey <john.toomey@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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xilpm: versal: server: SRST support for xcvp1902
xilpm: versal: server: SRST support for xcvp1902
lib: sw_services: xilpm: Auto generate device specific macro for xcvp1902
sw_services:xilsecure:Updated PCIE IDE KAT macro names
sw_services:xilloader:Added example for LoadPDI from IS
freertos10_xilinx: ARM_CR5: Invoke XTimer_ReleaseTickTimer to release tick timer
lib: sw_services: xiltimer: Add xiltimer release support
ttcps: Invoke XTtcPs_Release to release ttc node
ttcps: Add support for ttc release node
gpio: Use proper base address macro in xgpio_low_level_example for non-sdt flow
ipipsu: Fix MISRA-C violations
cmake: UserConfig.cmake: Remove the quotes around variable initialization
dp21rxss: Enable HDCP2X Timer handler calling function only when HDCP2X is enabled.
dp21rxss: dp21rxss: Added AMD copyright under the Xilinx copyright for the 2023.1 modified files
dp21rxss: Added AMD copyright.
sw_services: xilmailbox: Fix code formatting issues with checkpatch
sw_services: xilmailbox: Restructure the code for more modularity
xadcps: Add SDT Support
cmake: toolchainfiles: microblaze_toolchain.cmake: Add no-relax linker flags by default
sw_services:xilplmi: Add XilStl SW triggered error events
BSP:standalone: Add XilStl errors to SW errors list
xilpm: versal_net: increase byte buffer size
xilpm: versal_net: power down core only if it powered up
versal_psmfw: enable IEN during pwr down
rfdc: Remove duplicate from yaml
lib: sw_apps: Update the hello_world and empty_application to support all c++ file extensions
drivers: tmr_inject: Fix compilation issue
qspipsu: Fix code format issue
qspipsu: Fix wrong init sequence
dmaps: Remove arm,primecell compatible string
qspips: Generate BUS_WIDTH define in xparameters.h in sdt flow
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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xlnx-versal-aes: Fix 128 bit key loads
Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
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rfdc: Remove Dead Code
sysmon: Add SDT Support
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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lib: xiltimer: Adding default value for XSLEEPTIMER_FREQ for Zynq APU
Revert "sw_apps: zynqmp_fsbl: added SDT support"
Revert "xiplmi: Remove Error Action while disabling error"
Xilfpga: Avoid compiler optimization for function pointer validation check
lib: sw_apps: libmetal demo: sdt: Add size for heap
emaclite: Fix doxygen documentation
lib: sw_apps: openamp: sdt: matrix multiply: Specify correct demo as output
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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driver: src: Added support to check the tile DM overflow.
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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