| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Update the dpdk recipe to work with the internal forked version of dpdk
- dpdk version set to 22.11
- remove unnecesasry patch
- remove CVE_CHECK_IGNOREs as these CVEs appear to have been patched
- modify the meson settings to build the correct target
- install the correct files
Signed-off-by: John Toomey <john.toomey@amd.com>
Restructed to match the current langdale version
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Add a copy of meta-dpdk, for the langdale branch from
git://git.yoctoproject.org/meta-dpdk as of commit:
bd1b4f10262f12dd66a91383757ccba4eeda0b08
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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xilloader: Fix for compilation error when PLM_SECURE_EXCLUDE enabled
versal_common: xpm_common: Make XPm_Out32 honor WPROT bit
xilloader: SWPCR support in xilloader
xilocp: Add SWPCR support in OCP library
xilplmi: Add SWPCR related error codes
xilsecure: Add Sha2-384 start, update and finish support
OCP: Key generation and attestation endianness fix
sw_services: xilsecure: Add KAT in client examples
sw_services: xilpuf: Add KAT in examples
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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arm64: zynqmp: Fix lockstep mode cpu release functionality
arm64: zynqmp: Fix tcminit mode param
arm64: versal-net: spi: Update boot sequence dynamically
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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freertos10_xilinx: Fix tick interrupt clearing logic
freertos10_xilinx: Update copyright
freertos10_xilinx: Fix checkpatch issues
freertos10_xilinx: Update the standalone BSP dependency version
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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test: py: tests: Add test case for loading RPU apps
test: py: tests: Add test case for saveenv command
arm64: zynqmp: Fix the memory node for k26/k24 kria som boards
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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arm64: zynqmp: Fix the memory node for k26/k24 kria som boards
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Kconfig.part:gen_plnx_machine.py: Add menu config option in petalinux to enable only dtg generated aliases in dtb
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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This reverts commit d1da4b1b2312034282c96963c9d115a3ce485fb7.
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driver: src: Disabled dump logs
driver: src: global: Fix incorrect number of resources
driver: src: stream_switch: Fix port verify for AIEML
driver: src: fixed build error for decoupling flow
driver: src: lite: Implemented lite version of _XAie_PmIsTileRequested() for AIE
driver: src: Add support for system device-tree flow
driver: src: Added Runtime clock gating Add runtime clock gating ioctl calls
fal: src: rsc: Fix getEvent broadcast logic to support memtiles
fal: data: Update version to 1.4
driver: src: Update minor version for 2023.1
driver: src: Compiler warning fix
driver: src: io_backend: Work around to fix infinite loop
driver: src: perfcnt: Add API to get counter offest
driver: src: Cleaned up the driver of ToDo/FixMe comments. fal:src: Cleaned up the fal of ToDo/FixMe comments.
driver: src: Add API to read DMA Bd metadata
driver: src: io_backend: Add workaround to fix trace timeline
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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sw_services: xilpuf: Check if IRO frequency update is required
sw_services:xilocp:Fix circular buffer issues during HWPCR logging
xilplmi:Fixed doxygen warnings
lib: bsp: standalone: Document the PM_IOCTL API version bumpup changes
sw_services: xilpm: versal: Zeroization of AIE2 data memory separately
sw_services: xilpm: versal: Zeroization of AIE1 data memory separately
sw_services: xilpm: versal: Zeroization of AIE data memory separately.
qspipsu: Fix code format issue
qspipsu: Update sector calculation logic
sw_services: xilnvm: Support to read HWTSTBITS_DIS and PMC_SC_EN bits
sw_services: xilcert: Modified logic for storing user configuration
ttcps: Update check for MatchValue and IntervalValue as per platform
ttcps: Fix code formatting issues with checkpatch
emacps: example: Add Clock settings to Versal Net
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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When processing all of the entries in CC_DTBS_DUP an error should be
thrown if the target dtb file is not found.
Signed-off-by: John Toomey <john.toomey@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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changelog:
VITIS-8128 Update help Menu generator for SubCmds (#7568)
updating XRT as per changed metadata field (#7565)
Added check for cfg_cu payload_size to be within MAX_CQ_SLOT_SIZE in xocl_kds.c (#7552)
Fix out of order output for hardware contexts in memory report (#7559)
device process unable to connect to XRT (#7569)
CR-1162610 - Add V80's PCIe device ID to xocl driver (#7567)
Added changes to AIE Trace flushing for PCIe devices (#7554)
Vitis-7922 Synchronization of run objects between devices and processes (#7561)
Minor profiling refactoring, and fix issue with identifying AIE applications (#7553)
VITIS-8748 Improve format of configuration JSON (#7547)
Rename and expand AIE status (#7545)
Signed-off-by: saumya garg <saumyag@xilinx.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Remove the biffunc dict which was used to map arch to a specific bif
creation function and replace with simple if/elif/else logic. The
default bif file functions are defined for zynq/zynqmp and versal as
well as and empty default function which could be redefined in a
bbappend with new logic or mapped back to one of the existing
functions.
Signed-off-by: John Toomey <john.toomey@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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fix(zynqmp): make zynqmp_devices structure smaller
feat(versal-net): add support for SMCC ARCH SOC ID
feat(versal): add support for SMCC ARCH SOC ID
refactor(versal-net): move macros to common header
feat(xilinx): add support to get chipid
fix(versal-net): fix BLXX memory limits for user defined values
fix(versal): fix BLXX memory limits for user defined values
fix(zynqmp): fix BLXX memory limits for user defined values
feat(xilinx): fix IPI calculation for Versal/NET
feat(xilinx): setup local/remote id in header
feat(xilinx): clean macro names
fix(zynqmp): do not export apu_ipi
fix(zynqmp): remove unused headers
feat(xilinx): move IPI related macros to plat_ipi.h
feat(versal-net): add the IPI CRC checksum macro support
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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The recipe has not been updated since originally created. This was triggering
a dependency loop since it has not been updated to the current format.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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and srcrev for 2023.2 release
Below are the updates:
742a608800e7 create_bsp: Remove references to /dev/null
826fcc503554 settings.sh: Changing version from 2023.1 to 2023.2
51adc44151e7 scripts: rigel_scripts: regen_linker: Add script for regenerating linker
b5e2f5e9b887 dmaps: Remove arm,primecell compat string from compatible list
89767030a151 rigel_scripts: copy psu_init* files for zynqmp_fsbl app
2a448b31f000 scripts: rigel_scritps: build_app: Remove unneeded repo handling from build_app
1d85f3d87ffd scripts: rigel_scripts: Handle drivers which are part of sdt folder
23891dfcfdad scripts: rigel_scripts: create_example: Add support for compiling library or driver examples
88b749d8e8c6 scripts: rigel_scripts: Update get_high_precedence_path API to use concatenate paths
cade1b610ba4 scripts: rigel_scripts: Add support for library examples meta-data
49df9535433a scripts: rigel_scripts: load_example: Add support for driver example meta-data
3169cabf8576 scripts: rigel_scripts: Update the bsp.yaml domain drv_info with hardware instance instead of driver
f81d03153a45 create_bsp: Adding libsrc subdir properly by correcting cmake syntax
1ede8254fb6e *.py: Fixing the timing issues with library addition and configuration
787efbe8dd0f sw_services:xilsecure:Fix passing device id to xilmailbox library
27d8798fb1f0 scripts: rigel_scripts: Workaround for windows support enablement
3a2ce07f49ed scripts: rigel_scripts: Use GNU Makefile generator
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Fix an issue that results in:
Traceback (most recent call last):
File "Var <DEPENDS>", line 1, in <module>
bb.data_smart.ExpansionError: Failure expanding variable DEPENDS, expression was pkgconfig-native glib-2.0-native zlib-native ninja-native meson-native pixman-native qemu-xilinx-native bison-native ninja-native meson-native qemu-xilinx-multiarch-helper-native${@' pmu-rom-native' if 'xilinx' in d.getVar('LICENSE_FLAGS_ACCEPTED').split() else ''} alsa-lib-native dtc-native libgcrypt-native libslirp-native which triggered exception AttributeError: 'NoneType' object has no attribute 'split'
The variable dependency chain for the failure is: DEPENDS
This only occurs if no LICENSE_FLAGS_ACCEPTED is defined. This should not be
a blocking error. Instead the user is warned of reduced functionality and we
continue the build.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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feat(zynqmp): make stack size configurable
feat(zynqmp): add hooks for custom runtime setup
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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QEMU PLM error code are observed as shown below.
[21148.520]XPlmi_MaskPoll: Addr: 0xF6D1010C, Mask: 0x1, ExpVal: 0x1, Timeout: 1000000 ...ERROR
[21149.542]CMD: 0x00040101 execute failed, Processed Cdo Length 0x468
[21150.294]CMD Payload START, Len:0x00000004
0x00000000F200048C: 0xF6D1010C 0x00000001 0x00000001 0x00001000
0x00000000F2000498:
[21151.698]CMD Payload END
[21152.876]PLM Error Status: 0x21010001
[21153.347]============Register Dump============
[21153.885]PMC_TAP_IDCODE: 0x00000000
[21154.325]EFUSE_CACHE_IP_DISABLE_0(EXTENDED IDCODE): 0x00000000
[21155.023]PMC_TAP_VERSION: 0x03000000
[21155.450]CRP_BOOT_MODE_USER: 0x00000005
[21155.902]CRP_BOOT_MODE_POR: 0x00000005
[21156.354]CRP_RESET_REASON: 0x00000202
[21156.815]PMC_GLOBAL_PMC_MULTI_BOOT: 0xF0000000
[21157.351]PMC_GLOBAL_PWR_STATUS: 0x00000000
[21157.849]PMC_GLOBAL_PMC_GSW_ERR: 0x00000000
[21158.358]PMC_GLOBAL_PLM_ERR: 0x00000000
[21158.842]PMC_GLOBAL_PMC_ERR1_STATUS: 0x00000000
[21159.409]PMC_GLOBAL_PMC_ERR2_STATUS: 0x00000000
[21159.976]PMC_GLOBAL_GICP0_IRQ_STATUS: 0x20000000
[21160.542]PMC_GLOBAL_GICP1_IRQ_STATUS: 0x00000000
[21161.115]PMC_GLOBAL_GICP2_IRQ_STATUS: 0x00000000
[21161.695]PMC_GLOBAL_GICP3_IRQ_STATUS: 0x00000000
[21162.271]PMC_GLOBAL_GICP4_IRQ_STATUS: 0x00000000
[21162.852]PMC_GLOBAL_GICP_PMC_IRQ_STATUS: 0x00000000
[21163.439]============Register Dump============
This is due to incorrect QEMU_HW_DTB_PS is set for VEK280 machine conf file.
1. Fix QEMU PLM boot issue by setting the right QEMU_HW_DTB_PS to
board-versal-ps-vek280.dtb.
2. Update YAML_DT_BOARD_FLAGS to use versal-vek280-revb.
3. Set QB_MEM to 12G as VEK280 board has 12GB memory.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Each of these dependencies need to be based on preferred_provider.
A hard dependency on u-boot-xlnx-uenv is not required to use qemu.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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changelog:
Moved from 2023.1 branch to master for 2023.2 release
Signed-off-by: rbramand <rbramand@xilinx.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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update the generic boot script to support xspi1 for versal-net platform.
Signed-off-by: Swagath Gadde <swagath.gadde@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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gen_plnx_machine.py: Use :linux override for EXTRA_DT_FILES
Kconfig-aarch64.part:rootfsconfig_zynqmp: Remove watchdog-init menu config entry in rootfs config
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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plm:versal: Add STL invocation in hook after PMC CDO
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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A missing space was causing:
Unable to get checksum for device-tree SRC_URI entry system.dtsizynqmp-openamp.dtsi: file could not be found
Switch from expanding the value to using the variable. This ensure checksums
are preserved.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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The SRC_URI setting is automatic with usage of EXTRA_OVERLAYS, plus
the SRC_URI should have been an append. This could have brokenprevious
SRC_URI settings so remove it and revert to default behavior.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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