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* Updated SRCREV of dts for 2023.2_4067Sivaprasad Addepalli2023-05-061-1/+1
| | | | | | | | | | | versal: Add support for xcvc1502 versal: Add support for xcvm1302 versal: Add support for xcvm1402 versal: Add support for xcvp1502 versal: Add support for xcvm2302 versal: Add support for xcvm2902 device versal: Add support for xcvp1702 device Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV of qemu for 2023.2_5147Sivaprasad Addepalli2023-05-061-1/+1
| | | | | | | hw/nvram: Add get_u32 abstraction to Xilinx eFuse xlnx-efuse: Add get_u32 abstraction Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV of qemu for 2023.2_9715Sivaprasad Addepalli2023-05-051-1/+1
| | | | | | | | | mdio: handle 16 bit mdio writes versal: efuse: Block reset from setting 2 registers hw/nvram: Fix incorrect guest-error log from Xilinx Zynqmp eFuse hw/nvram: Fix incorrect guest-error log from Xilinx Versal eFuse Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated Commit IDSiva Addepalli2023-05-051-0/+0
| | | | | | | | | | | | | | gen_config.py: Generate TUNE_FEATURES based on XSA params gen_plnx_machine.py: regenerating the configs gen_config.py: adding new type to get_config_value gen_plnx_machine.py: Reformat using autopep8 gen-machineconf: Update --menuconfig arg gen_config.py: Generate the multi config targets dynamically config_zynqmp:remove the default muticonfig targets config_versal:remove the default muticonfig targets Kconfig.part:remove static yocto multiconfigs Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV of embeddedsw for 2023.2_6171Sivaprasad Addepalli2023-05-031-1/+1
| | | | | | | | | sw_services:xilloader:Add partial pdi loading from Image Store BSP: cortexr5: Separate out CortexR52 MPU APIs asm_vectors: fix kernel boot header sw_apps: zynqmp_pmufw: Add support of parallel build Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* u-boot-xlnx-2023.2.inc:update branch and SRCREV for 2023.2Varalaxmi Bingi2023-05-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes from 2023.1 branch: arm64: dts: versal-net: Fix msi controller node name arm64: zynqmp: remove snps,enable_guctl1_resume_quirk quirk for usb arm64: xilinx: Fix indentation and trailing spaces in dts arm64: zynqmp: Assign TSU clock frequency for KV and KD boards arm64: zynqmp: Assign TSU clock frequency for KR260 arm64: zynqmp: Remove interrupt/reg-names for AMS arm64: zynqmp: Rename ams_ps/pl node names arm64: zynqmp: Remove ltc2954 node from DT arm64: zynqmp: Fix gpio comment about No of gpios Revert "spi: zynqmp_qspi: Remove enabling interrupts code" arm64: zynqmp: Update the i2c0 node for zcu1285 arm64: versal_net: Update RMII property arm64: versal-net: Update spi-tx-bus-width to 4 arm64: versal-net: Update spi-max-freq to 150Mhz arm64: versal-net: Add new parallel DT binding for tenzing se9 board arm64: zynqmp: Add new parallel DT binding for ZC1751+DC1 board arm64: versal: Enable ADIN ethernet phy arm64: zynqmp: Enable ADIN ethernet phy arm64: versal-net: dts: add cpuidle node cmd: sf/nand: Print and return failure when 0 length is passed arm64: zynqmp: Fix User MTD partition size xilinx: dts: Fix open drain warning on Zynq, ZynqMP and Versal arm: xilinx: Setting default i2c clock frequency to 400kHz arm: dts: versal-net: add usb-wakeup interrupt in dwc-xilinx core arm: dts: versal-net: add ref_clk property for REFCLKPER calculation test: py: tests: Add test case for USB device test: py: tests: Add dhcp abort test test: py: tests: Add pxe command test Signed-off-by: Varalaxmi Bingi <varalaxmi.bingi@amd.com> Added changelog above. Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* Updated Commit IDSiva Addepalli2023-04-291-0/+0
| | | | | gen-machineconf: decode has been removed in python 3.10 Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV of embeddedsw for 2023.2_7755Sivaprasad Addepalli2023-04-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | lib: bsp: standalone: Include bspconfig.h in boot.S for system device-tree flow lib: bsp: standalone: Use XScuGic_LookupConfigBaseAddr() API for xsct flow Update addtogroup to Overview and AMD copyright versal_rpu_bsp: Fixed some MISRA-C violations. xilpm: versal_net: client: add idle call back support zynqmp_pmufw: bypass smmu during suspend Updated change logs for plm & its libraries lib: sw_services: xiltimer: Fix ifdef check in the microblaze_sleep.c lib: bsp: standalone: Fix race conditions in the versal r5 mpu.c lib: bsp: standalone: Fix race conditions in the A72 translation table update Embedded SW license file for 2023.1 Revert "XilinxProcessorIPLib: drivers: aiengine: Add support for system device-tree flow" freertos: gicv3: check group 1 IAR in NS EL1 irq handler iomodule: Updated data types for few variables. iomodule: Typecasting condition expressions with bool. iomodule: Added parentheses to Expressions. iomodule: Added U to Numericals. sw_services: xilplmi: Address third party review comments sw_services: xilplmi: Fix third party review comments xilsem: Add support for psxl IP name sw_services:xilloader:updated examples to support versalnet XilNvm:Voltage, Temp Monitoring before efuse program lib: sw_apps: freertos_hello_world: Add support for system device-tree flow ThirdParty: bsp: freertos10_xilinx: Add support for system device-tree flow lib: sw_apps: memory_tests: Add support for system device-tree flow XilinxProcessorIPLib: drivers: iomodule: Add support for system device-tree flow XilinxProcessorIPLib: drivers: ipipsu: Add support for system device-tree flow XilinxProcessorIPLib: drivers: common: Add meta-data required for system device-tree flow XilinxProcessorIPLib: drivers: tmrctr: Add support for system device-tree flow XilinxProcessorIPLib: drivers: scugic: Add support for system device-tree flow XilinxProcessorIPLib: drivers: csudma: Add support for system device-tree flow XilinxProcessorIPLib: drivers: ttcps: Add support for system device-tree flow XilinxProcessorIPLib: drivers: uartpsv: Add support for system device-tree flow XilinxProcessorIPLib: drivers: uartps: Add support for system device-tree flow lib: sw_services: xiltimer: Add support for system device-tree flow scripts: Add linker template and processor spec files cmake: Add required cmake meta-data lib: bsp: standalone: src: common: Much needed improvements in xinterrupt_wrap.c lib: bsp: standalone: Add meta-data for the system device-tree flow lib: bsp: standalone: Update common code to support system device-tree flow lib: bsp: standalone: Add support for microblaze in system device-tree flow lib: bsp: standalone: Add support for cortexr5 in system device-tree flow lib: bsp: standalone: Add support for ARMv8 in system device-tree flow Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updating VCU license file checksum Updating checksum due to changes in legal ↵Neel Gandhi2023-04-283-6/+6
| | | | | | | | | | | | | | | | | | name libomxil-xlnx change: chore: update to revision d20230406 libvcu-xlnx changes: Update name of ctrlsw level test application binaries chore: update to revision d20230406 Revert "Update name of ctrlsw level test application binaries" vcu-firmware changes: chore: update to revision d20230405 Signed-off-by: Neel Gandhi <neel.gandhi@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* xlnx-embeddedsw: Move to release branch and commitMark Hatle2023-04-281-3/+3
| | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com> (cherry picked from commit 2ba0c89b9aae7459b3d9e3c328c1db3fea4dc617) Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* Updated SRCREV of qemu for 2023.2_6499Sivaprasad Addepalli2023-04-271-1/+1
| | | | | | | hw/nvram: Avoid unnecessary Xilinx eFuse backstore write xlnx-efuse: Avoid unnecessary backstore write Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* meta-xilinx-core: Update aiefal versionGregory Williams2023-04-241-0/+0
| | | | | | | Update aiefal version to match what is present in Vitis tools. Signed-off-by: Gregory Williams <gregory.williams@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* Updated SRCREV of linux-xlnx for 2023.2_1411Sivaprasad Addepalli2023-04-241-1/+1
| | | | | | | usb: dwc3: otg: Enable OTG support in dwc3-core driver usb: dwc3: fixed OTG feature failure for xilinx platform usb: dwc3: core: disable 3.0 clock when operating in 2.0 device mode Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Update xrt, zocl commit idrbramand2023-04-201-1/+1
| | | | | | | | | changelog : CR-1150767 Fix for clock throttling documentation. (#7502) (#7505) reporting 1 or 2 MEM tile channels (#7497) Signed-off-by: rbramand <rbramand@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* Updated SRCREV of embeddedsw for 2023.2_8743Sivaprasad Addepalli2023-04-201-1/+1
| | | | | | | | | | | | rfdc: Enable workaround for a specific version of libidn.so needed by cmake XilinxProcessorIPLib: drivers: aiengine: Add support for system device-tree flow plm: versal: Remove xplm_modules from PPU1 RAM XilinxProcessorIPLib: drivers: CMakeLists.txt: Add required cmake meta-data for libxil xilpuf: Fix PUF auxiliary convergence error versal_psmfw: versal_net: reduce partition count xilpm: versal: server: Update BFR-B pre-config sequence Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV of linux-xlnx for 2023.2_1711Sivaprasad Addepalli2023-04-201-1/+1
| | | | | mtd: spi-nor: Fix flash lock failure in Macronix flashes Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV of dts for 2023.2_5559Sivaprasad Addepalli2023-04-191-1/+1
| | | | | Makefile: Add auto-gen-dts target Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV of qemu for 2023.2_6067Sivaprasad Addepalli2023-04-191-1/+1
| | | | | versal-pmx-iou-slcr: Init the mux configuration Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV of aie-rt for 2023.2_3835Sivaprasad Addepalli2023-04-181-1/+1
| | | | | fal: data: Update version to 1.4 Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV of qemu for 2023.2_6027Sivaprasad Addepalli2023-04-181-1/+1
| | | | | | xlnx_dp: fetch data after vertical sync Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated Commit IDSiva Addepalli2023-04-181-0/+0
| | | | | | | Kconfig.part: Add config option for BB_NUMBER_PARSE_THREADS in tool Kconfig-aarch64.part:Kconfig-arm.part: Update help section for package_feeds Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Update xrt, zocl commit idrbramand2023-04-171-1/+1
| | | | | | | | | changelog : fix for channel numbers in MEM tiles (#7496) CR-1159385: Finished BD event is missing for memtile trace for AIE-ML designs for input_channels (#7495) Signed-off-by: rbramand <rbramand@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* Updated SRCREV of embeddedsw for 2023.2_4219Sivaprasad Addepalli2023-04-171-1/+1
| | | | | | | versal_psmfw: versal_net: set local power state at last emacps: example: Fix GEM1 base address check. Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV of linux-xlnx for 2023.2_5543Sivaprasad Addepalli2023-04-141-1/+1
| | | | | | mtd: spi-nor: Fix flash protection failure on Winbond 16MB flash parts net: axienet: Fix memory leak issue Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* xilinx-standalone.inc: Remove security_flags.incMark Hatle2023-04-131-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Inclusion of security_flags.inc lead to a number of problems with the baremetal distributions: *ARM v8* aarch64-xilinx-elf-ld: testA53.elf: error: PHDR segment not covered by LOAD segment aarch64-xilinx-elf-ld: warning: testA53.elf has a LOAD segment with RWX permissions *ARM v7* arm-xilinx-eabi-ld: .../aarch32-xilinx-eabi/usr/lib/thumb/v7-a+fp/hard/crtbegin.o: relocation R_ARM_THM_MOVW_ABS_NC against `a local symbol' can not be used when making a shared object; recompile with -fPIC The configuration that works: export CFLAGS=" -O2 -pipe -g -feliminate-unused-debug-types " export CXXFLAGS=" -O2 -pipe -g -feliminate-unused-debug-types " export LDFLAGS="-Wl,-O1 -Wl,--hash-style=gnu -Wl,--as-needed -Wl,-z,relro,-z,now" export CPPFLAGS="" Configuration that provides the warnings/errors: export CFLAGS=" -O2 -pipe -g -feliminate-unused-debug-types " export CXXFLAGS=" -O2 -pipe -g -feliminate-unused-debug-types " export LDFLAGS="-Wl,-O1 -Wl,--hash-style=gnu -Wl,--as-needed " export CPPFLAGS="" The LDFLAGS was introdued by the security_flags.inc, the SECURITY_CFLGAS:class-target ?= "" and SECURITY_LDFLAGS:class-target ?= "" was supposed to prevent this, however the cross compiler is built in the cross or canadian-cross or other context and NOT target. Additionally the SDK environment is configured in the nativesdk environment, so the default values may not match the configured (target) compiler and CFLAGS. Removing security_flags.inc resolves both of these issues, as the security flags don't really do anything on a baremetal configuration, by default, anyway. Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* meta-xilinx-core: Version bump ai-engine-driver and aiefal for 2023.1 releaseGregory Williams2023-04-132-1/+1
| | | | | | | | | | | | | Add version bump for 2023.1 release to ai-engine-driver and aiefal Changelog: driver: src: Update minor version for 2023.1 Signed-off-by: Gregory Williams <gregory.williams@amd.com> Added SRCREV update Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* Updated SRCREV of aie-rt for 2023.2_9111Sivaprasad Addepalli2023-04-131-1/+1
| | | | | driver: src: Update minor version for 2023.1 Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* README.md: Fix Board Device tree for vpk180Sandeep Gundlupet Raju2023-04-121-1/+1
| | | | | Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* Updated SRCREV of linux-xlnx for 2023.2_4983Sivaprasad Addepalli2023-04-121-1/+1
| | | | | | | Revert "firmware: xilinx: znqmp_pm_init_finalize as late_initcall" Revert "soc: xilinx: znqmp_pm_init_finalize as late_initcall of PM driver" Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV of embeddedsw for 2023.2_7003Sivaprasad Addepalli2023-04-121-1/+1
| | | | | | | dfeofdm: Update documentation lib: sw_apps: memory_tests: Update copyright year lib: bsp: Added support to- use ttc as sleeptimer for cortexR52 Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV of embeddedsw for 2023.2_9251Sivaprasad Addepalli2023-04-111-1/+1
| | | | | | | | sdps: Fix doxygen warnings freertos10_xilinx: ARM_CR5: Use group 1 interrupts for CortexR52 scugic: Use IRQ for CortexR52 interrupts by default Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV of linux-xlnx for 2023.2_9795Sivaprasad Addepalli2023-04-111-1/+1
| | | | | mtd: spi-nor: Fix Flash protection failure on ISSI 1G flash parts Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* xrt: Move aie config libmetal dependency to dynamic layerMark Hatle2023-04-112-13/+17
| | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* meta-microblaze: packagegroup-core-tools-testapps: Disable packagesMark Hatle2023-04-111-0/+9
| | | | | | Disable items that don't work on microblaze Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* linux-xlnx: Add special systemd configuration for microblazeMark Hatle2023-04-113-0/+53
| | | | | | | | While systemd is not recommended for use on microblaze, it does work. However, additional configuration items are requried in this case. So enable the minimum options, as defined from the systemd README file. Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* systemd: rebase microblaze patchesMark Hatle2023-04-114-111/+121
| | | | | | Rebase/rework microblaze patches for the latest systemd version Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* meta-xilinx-contrib: linux-firmware: Update protocol to httpsMark Hatle2023-04-111-3/+3
| | | | | | github.com no longer supports git protocol, enable https protocol Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* meta-xilinx-bsp: kc705-microblazeel: YAML_DT_BOARD_FLAGS for kc705-fullMark Hatle2023-04-111-1/+1
| | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* meta-xilinx-contrib: Update zybo-linux-bd integrationsMark Hatle2023-04-112-8/+15
| | | | | | | | | | Disable standard bitstream-extraction, the zybo-linux-bd recipe handles this task. Zybo-linux-bd is used to provide the reference files, but needs to provide the files in the matching locations to other components. Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* meta_%.bbappend: Avoid contaminating mesa-native PACKAGECONFIGMark Hatle2023-04-111-1/+1
| | | | | | | | Adding meta-xilinx-core was contaminating the PACKAGECONFIG hash when building mesa-native. Workaround this by only adjusting the value when class-target is defined. Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* Updated SRCREV of bootgen for 2023.1_7143Siva Addepalli2023-04-111-1/+1
| | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* Update xrt and zocl commit idrbramand2023-04-111-1/+1
| | | | | | | | | Memory manger issue fixed for xbtest (#7492) (#7494) Fixed CU context related issue. (#7487) (#7493) 2023.1 : Use correct BO handle to export and use the exported bo handle for AIE APIs for GMIO AIE Trace offload (#7491) Signed-off-by: rbramand <rbramand@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* README.building.md: Update instructions on adding layersSandeep Gundlupet Raju2023-04-111-3/+20
| | | | | Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* Updated Commit IDSiva Addepalli2023-04-111-0/+0
| | | | | | | gen_config.py: Enabling ro for EXT4 boot u-boot_bsp.tcl:processor.yaml: Remove config.mk from PetaLinux Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV of fsbl-firmware for 2023.2_5443Sivaprasad Addepalli2023-04-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | updated for xilsem changelog xilpm: versal_net: server: add power rail checks for LPD domain xilpm: versal_net: server: add power rail checks for FPD domain xilpm: versal_net: server: add power rail checks for pl domain xilpm: versal_net: server: add power rail checks for np domain xilpm: versal_net: server: add power rail checks for cpm domain xilpm: versal_net: server: Update rail status for PMC xilpm: versal_net: server: add support to check and control power rail status xilpm: versal_net: server: Add pmc global and sysmon registers xilpm: server: Remove unnecessary validation of arguments xilpm: versal_commom: server: Add power rail support for Versal NET Updated changelog updated for license and copyright Doxygen fixes - xilpdi Doxygen fixes - xilplmi Doxygen fixes - xilloader Doxygen fixes - versal_plm xilplmi: updated algorithm & return values xilloader: updated algorithm & return values xilpdi: updated algorithm & return values xilpm:versal_net: enable isolation during system reset xilpki: Update examples notes description Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV of fsbl-firmware for 2023.2_5575Sivaprasad Addepalli2023-04-091-1/+1
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV of ai-engine-driver for 2023.2_8811Sivaprasad Addepalli2023-04-091-1/+1
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* u-boot-xlnx-blob.inc:Add IMPORT_CC_UBOOT_DTBS variableTejas Bhumkar2023-04-061-0/+12
| | | | | | | | | Added IMPORT_CC_UBOOT_DTBS variable in blob generate function to generate reselected dtb using uboot-device-tree.dtb when this is set to 1. This is needed in case like VEK280-revB,because here we are using ADI-PHY ethernet which is included in uboot-device-tree.dtb. Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* u-boot-xlnx-blob.inc:add SYSTEM_DTB_BLOB variableTejas Bhumkar2023-04-061-2/+7
| | | | | | | | | | | Add SYSTEM_DTB_BLOB variable in blob generate function to generate fit-dtb.blob using system.dtb when this is set to 1. This is needed in case like Versal SC build, where some modification like bootargs or user node additions. should be reflected in system.dtb and fit-dtb.blob. Signed-off-by: Swagath Gadde <swagath.gadde@amd.com> Tested-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* xrt and zocl commitidrbramand2023-04-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changelogs : Move to 2023.1 branch Fix for CR-1150166 & CR-1150159: add checks to handle out of bound heap access (#7479) CR-1150547: Disable events are missing for AIE tile trace in runtime mode for AIE-ML (#7476) Revert back vck5000's aie-pl test xclbin name (#7482) CR-1158565 update_access_mode: Operation not supported (#7484) Update dynamic regions to better display PL and PS kernels (#7477) set aie clock rate correctly (#7481) Fix for CR-1124404 Remove ctypes bindings from python tests (#7480) Update codeql-analysis.yml moving petalinux to 0329 (#7483) Fixed aie metadat sysfs and reset DFX platform (#7474) Add changes to support xbutil reset on Edge Platforms (#7472) CR 1139245: Flush trace when windowing on PCIe devices (#7473) Update CHANGELOG.rst VITIS-6990: xrt::xclbin API to obtain interface_uuid (#7403) CR-1158428 xbmgmt examine -r cmc has misleading output (#7468) Added PL Reset support from ZOCL driver (#7455) Fixed ps kernel load issue (#7469) CR-1153585 - Fix Mpd msd binaries seg faults with latest XRT (#7463) CR-1158312 XRT regression : xclRegRW: can't map CU (#7470) fixing aie only check (#7467) Modified AIE status to report relative row numbers (#7466) flush trace when windowing in AIE1 (#7465) CR-1144075 Compile time warnings read_register/write_register for xrt::kernel (#7461) Move to latest petalinux build for Edge platforms (#7462) Remove http references per Palamida request (#7364) Update CHANGELOG.rst Signed-off-by: rbramand <rbramand@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-08-04 11:07:43 +0000