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* linux-xlnx.inc: Fix reference to kernel branchMark Hatle2021-09-281-1/+1
| | | | | | | The reference was not used in any xilinx code, however external recipes may have relied on this value and loaded the wrong kernel. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-282-2/+2
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* xrt_git:zocl_git:update commitidrbramand2021-09-281-1/+1
| | | | | Signed-off-by: rbramand <rbramand@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* bootgen: Update SRCREV to 2021.2 versionMark Hatle2021-09-281-2/+2
| | | | | | | | It appears the previous SRCREV is no longer present, update to latest srcrev. License change just updates the year. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-283-3/+3
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-281-1/+1
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-282-2/+2
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-281-1/+1
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-281-1/+1
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* gcc: Fix performance degradation on Microblaze 64Mark Hatle2021-09-282-0/+52
| | | | | | | | | | | | Issue: TSR-974519 Added zero_extendqidi2 and zero_extendhidi2 patterns in GCC 10.2,commit 0a237a9: Do not propagate results from inner REGS to paradoxical SUBREGs and this commit is causing the MB 64 compiler to generate extra instructions. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* xrt: adding libffi and elfutils dependency for ps kernel supportch vamshi krishna2021-09-281-1/+1
| | | | | Signed-off-by: ch vamshi krishna <chvamshi@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-281-1/+1
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-282-2/+2
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-282-2/+2
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* xrt_git:zocl_git:update commitidrbramand2021-09-281-1/+1
| | | | | Signed-off-by: rbramand <rbramand@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-281-1/+1
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-282-2/+2
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-282-2/+2
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-281-1/+1
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* ivas: Update SRC_URI and SRCREV for 2021pankajd2021-09-284-14/+11
| | | | | Signed-off-by: pankajd <pankajd@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* vcu: Updated SRCREV for 2021Mark Hatle2021-09-283-3/+3
| | | | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* xlnx-embeddedsw: Updated SRCREV for 2021Mark Hatle2021-09-281-1/+1
| | | | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* xlnx-embedded: embeddedsw has branched, switch to xlnx_rel_v2021.2-next branchMark Hatle2021-09-281-5/+5
| | | | | | Select the last common ancestor with master as the starting commit. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-281-1/+1
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* lopper: Move to AUTOREV to fixed revMark Hatle2021-09-281-2/+1
| | | | | | Set to the latest maste rev Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-281-3/+3
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-282-2/+2
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-282-2/+2
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* u-boot-zynq-scr: Remove fdt_high env from boot.scrRaju Kumar Pothuraju2021-09-281-21/+0
| | | | | | | | | | | As per the U-boot fdt_high and initrd_high got deprecated and need to use the bootm_low/bootm_size instead. to increase bootm_low address use the config value(CONFIG_SYS_BOOTMAPSZ) or define bootm_low in the boot script since this is a boot time generated values. Signed-off-by: Raju Kumar Pothuraju <raju.kumar-pothuraju@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* kernel-simpleimage.bbclass: Use proper variable to get the kernel image.Ashwini Lomate2021-09-281-2/+2
| | | | | | | This patch will use proper variable to get kernel image Signed-off-by: Ashwini Lomate <ashwini.lomate@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-282-2/+2
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-281-1/+1
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-283-3/+3
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-281-1/+1
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* vcu: Updated SRCREV for 2021Mark Hatle2021-09-281-1/+1
| | | | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-281-1/+1
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-281-1/+1
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* ivas: Updated IVAS Repo path and SRCREV for 2021pankajd2021-09-284-6/+6
| | | | | Signed-off-by: pankajd <pankajd@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* boot.cmd.ubifs: Rename QSPI_FIT_IMAGE_LOADADDRESS to FIT_IMAGE_LOADADDRESSRaju Kumar Pothuraju2021-09-281-3/+2
| | | | | Signed-off-by: Raju Kumar Pothuraju <raju.kumar-pothuraju@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-272-2/+2
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* qemu: Updated SRCREV for 2021Mark Hatle2021-09-272-2/+2
| | | | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* u-boot-zyqn-uenv: Update KERNEL LOAD ADDRESS for zynqmpSandeep Gundlupet Raju2021-09-271-1/+1
| | | | | | | | | | | | | While booting aarch64 kernel it warns with below message. Firmware Bug]: Kernel image misaligned at boot, please fix your bootloader! Update KERNEL LOAD ADDRESS for zynqmp to 0x200000. There is a 2MB enforcement for aarch64 boot images. Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* u-boot-zyqn-scr: Update KERNEL OFFSET for versalSandeep Gundlupet Raju2021-09-271-2/+2
| | | | | | | | | | | | | While booting aarch64 kernel it warns with below message. [Firmware Bug]: Kernel image misaligned at boot, please fix your bootloader! Update KERNEL OFFSET for versal to 0x200000. There is a 2MB enforcement for aarch64 boot images. Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* Updated SRCREV for 2021Sivaprasad Addepalli2021-09-273-3/+3
| | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* meta-xilinx-standalone-experimental: conf: dtb-embeddedsw.inc: Update repo ↵Appana Durga Kedareswara rao2021-09-271-2/+2
| | | | | | | | | for preview release Update repo for preview release. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* meta-xilinx-standalone-experimental: recipes-applications: peripheral-tests: ↵Appana Durga Kedareswara rao2021-09-271-3/+3
| | | | | | | | | | Update deploy task to sync with other application recipe Update the peripheral test deploy taks to sync with other esw application recipes. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* meta-xilinx-standalone-experimental: Move away from DATETIMEMark Hatle2021-09-2713-26/+39
| | | | | | | | Instead of using DATETIME to IMAGE_VERSION_SUFFIX. This uses image-artifact-names class to sync all of the recipes with a reproducible output version. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* meta-xilinx-standalone-experimental: recipes-drivers: uartpsv: Add recipe ↵Raviteja Narayanam2021-09-271-0/+6
| | | | | | | | for examples Added recipes for compiling examples. Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com>
* meta-xilinx-standalone-experimental: recipes-drivers: trafgen-example: Add ↵Appana Durga Kedareswara rao2021-09-271-0/+5
| | | | | | | | recipe for compiling trafgen driver example This recipe compiles the trafgen driver examples. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
* meta-xilinx-standalone-experimental: recipes-drivers: trafgen: Add recipe ↵Appana Durga Kedareswara rao2021-09-271-0/+13
| | | | | | | | for compiling trafgen source code This recipe compiles the trafgen source code. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>