| Commit message (Collapse) | Author | Age | Files | Lines |
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* Remove the qemumicroblaze device-tree as instead of using a in layer
device tree the device tree that is provided as part of QEMU is used
* Update device-tree recipe removing the need for the runqemu
compatiblity for qemumicroblaze
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
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* Update the compatible strings in the device tree to have the dummy
'm25p80' string, the valid component string as well as adding the
generic 'jedec,spi-nor' string for future use.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
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* Update the bindings to match upstream definitions for the PHY
* The macb driver does not follow the phy-handle property and relies on
the PHY being located as the first child node of the ethernet device
* Remove the MDIO node and update all boards to nest the PHY as the
first child node of the ethernet device, this change is backward
compatible with the bindings for the linux-xlnx xemacps driver which
follows the phy-handle definition
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Added information about the GPIO/MIO reset pin so that the USB can be
reset by the kernel
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Update the bindings so that the USB devices are probed as matching the
mainline chipidea driver
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Add a fixed 125 MHz clock to trick the ethernet driver into thinking
the reference clock is at the correct frequency
* This masks the 'macb e000b000.ps7-ethernet eth0: unable to generate
target frequency: 125000000 Hz' message from the macb driver
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Add the device tree includes for the picoZed SOM
* Add machine config for the picoZed SOM
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Add machine config for the microZed board
* Add device tree includes for the microZed board
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Add the device tree includes for the ZYBO board
* Add machine config for the ZYBO board
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* udev can overwhelm microblaze systems due to its processing of events
in seperate processes, limit the number of child processes that udev
launches to 1
* This is a issue with the older version of udev, and has since been
resolved in systemd udev
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Use the xlnx,phy-reset-gpio property to specify the USB PHY's reset
signal
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* the "xlnx,fb-clk" and "xlnx,qspi-mode" properties are not used
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Removed use of very outdated 'gpio-mask-high' and 'gpio-mask-low'
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Added USB PHY reset binding
* Updated Ethernet PHY compat and init values
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Add the 3.10 compatiblity string for the OCM node
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Kernel config fragments are now handled within the
recipes-kernel/linux/config caches
* Remove the configs from the conf/machine/boards as they are no longer
in use by any of the machines
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* XADC driver now uses clock framework, add clock binding
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Re-arranged all compatible and clock orderings, so that the
mainline expected strings are before any linux-xlnx strings
* Added newer mainline compatible strings, properties, etc.
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Update the bindings for the si570 attached to the I2C bus
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Update bindings for I2C
* Comment out non-secure DMA (PL330) node
* Add CPU voltage regulator node (fixed voltage, resolved 'failed to get
cpu0 regulator error')
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Add configs for Zynq USB OTG functionality, these config options are
required for the OTG dual role to function correctly.
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* The new line at the end of the file is needed for cfg fragments in
order for the kernel merge scripts to work correctly
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Update QSPI, SPI, devcfg and GPIO node bindings
* Flash node properties for boards
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* This kernel version is outdated and has been superseded by the 3.10
and 3.14 kernels
* This change mirrors the dropping of the 3.8 linux-yocto kernel in the
1.6 yocto release
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* The macb mainline driver for GEM is non-functional in 3.10, disable
the driver in the kernel
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Update SD controller nodes
* Add ocmc node
* Add additional compatible values
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Add the recipe for the public linux-xlnx xlnx_3.14 branch
* Update defconfig for zynq for 3.14
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* These changes have been merged into the base dtsi for zynq
* Clean up and remove non-required *-yocto.dts
* Update machine confs
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Merge the contents of zynq7-mainline-gem.dtsi into the base
* Default to the macb driver by default
* Backwards compatible with emacps (linux-xlnx only driver)
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Common dtsi's did not match the expected naming convention, renamed
them to match.
* zynq-7-base.dtsi -> zynq7-base.dtsi
* zynq-7-mainline-gem.dtsi -> zynq7-mainline-gem.dtsi
* Updated all inclusions of renamed files
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Make sure that cfg fragments have newlines at the end of the file
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Move the defconfig into machine-xilinx-default.inc, so that the
defconfigs can be completely overridden from machine configs
* Add 3.14 defconfigs
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Added clock nodes for newer kernel common clock framework
compatibility for microblaze
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Remove axi pcie node (it is invalid)
* Added clock nodes for newer kernel common clock framework
compatibility for microblaze
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Fix inclusion of zynq-7-mainline-gem.dtsi so that nodes properties in
the board level are not overwritten
* Add the *-yocto.dts to the machine configurations
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* In QEMU GEM has the phy address of 23, not 7, it also does not respond
to address 0
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Add missing clocking properties to various devices
* Add additional compatible strings for various devices
* Fix up some missing interrupt information
* Update the slcr node
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* This include is for setting up the zynq-7-base.dtsi to be compatible
with linux-yocto and mainline drivers.
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Move to linux/<arch> sub directories
* Update machine and kernel paths
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Cleaned up device trees, refactored the dts per boot args setup
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Cleaned up device trees, refactored the dts per boot args setup
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Cleaned up device trees, refactored the dts per boot args setup
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Interrupt type was incorrect for second ethernet device
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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The MicroBlaze kernel uses device tree boot args before it attempts to
use the arguments provided by the bootloader (e,g, u-boot/qemu).
This change expects that the qemumicroblaze machine is always loaded
with a initrd.
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* The Ethernet PHY on the ZedBoard is not guaranteed to be on address 7,
instead use the phy broadcast address of 0 which is acceptable as no
other devices are on the MDIO bus for the ZedBoard.
Reported-by: Philip Balister <philip@balister.org>
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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* Added additional node properties for board specific setup
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
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