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* meta-vitis-tc: riscv-tc: Enable medany memory modelMark Hatle2025-03-301-0/+3
| | | | | | Per request, enable medany memory model with riscv 64-bit and newlib tclibc. Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* meta-vitis-tc: riscv-tc: Enable 'b' extension multilibsMark Hatle2025-03-301-33/+92
| | | | | | | | | 'b' extensions require binutils 2.43 or newer. Update the generation script to correctly identify and set the TUNE_FEATURE for riscv 32-bit and 64-bit. This may be needed in the future. Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* meta-vitis-tc: Update RISCV baremetal multiconfigMark Hatle2024-08-081-95/+109
| | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* meta-vitis-tc: riscv-tc: _ is no longer permittedMark Hatle2024-07-171-20/+20
| | | | | | | | | | The multilib name will be promoted into package names. Package names no longer permit the use of a '_' in the name. So strip this from the multilib name, everything else remains the same. Signed-off-by: Mark Hatle <mark.hatle@amd.com> (cherry picked from commit f452a4f639bf4e714df8f07d8c8ac85d88541794) Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* meta-vitis-tc: Create new layer from meta-petalinux as of 2024.1Mark Hatle2024-07-171-0/+303
These components are used to build SDKs that are often shipped with the AMD Vitis and Vivado products. Signed-off-by: Mark Hatle <mark.hatle@amd.com> (cherry picked from commit 5f481ae55aa646b334e15e16ef826b8d42792edf) Signed-off-by: Mark Hatle <mark.hatle@amd.com>
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-08-08 02:28:28 +0000