linux/meta-xilinx.git - Mirror of git.yoctoproject.org/meta-xilinx.git

	Commit message (Collapse)	Author	Age	Files	Lines
*	tune-zynqmp.inc: Set default SOC_VARIANT to eg	Vineeth Chowdary Karumanchi	2018-06-11	1	-0/+7
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	UltraScale MPSoC is shipped in 3 device variants. https://www.xilinx.com/products/silicon-devices/soc/zynq-ultrascale-mpsoc.html#productTable Available SOC_VARIANT's for zynqmp: "cg" - Zynq UltraScale+ CG Devices "eg" - Zynq UltraScale+ EG Devices (MALI 400) "ev" - Zynq UltraScale+ EV Devices (MALI 400 + VCU) This will extend MACHINEOVERRIDES for each device variant as: cg --> zynqmpcg eg --> zynqmpeg ev --> zynqmpev This patch sets the default value of SOC_VARIANT to eg. This can be overriden in machine configuration to match the intended FPGA device. Signed-off-by: Vineeth Chowdary Karumanchi <vineethchowz.chowdary@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
*	meta-xilinx: Restructuring meta-xilinx to support multiple layers	Manjukumar Matha	2017-12-13	1	-0/+11
	As discussed previously on mailing list, we are proceeding with layer restructuring. For rocko release we will have the following layers meta-xilinx ->meta-xilinx-bsp (current meta-xilinx) ->meta-xilinx-contrib In the subsequent releases we will add other layers from Xilinx meta-xilinx ->meta-xilinx-bsp (current meta-xilinx) ->meta-petalinux ->meta-xilinx-tools ->meta-xilinx-contrib This will provide one clone to get all the required meta layers from Xilinx for a complete solution, and the users can blacklist any layer which they don't want to use using bblayer.conf. This will enables us to help our vendors/partners to add their reference designs, board definitions etc. Recipe changes : * Move reference design zybo-linux-bd.bb to meta-xilinx-contrib * Move kernel patches realted to zybo-linux-bd-zynq7 board to meta-xilinx-contrib * Update README Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>