summaryrefslogtreecommitdiffstats
path: root/meta-xilinx-core/recipes-bsp/arm-trusted-firmware
Commit message (Collapse)AuthorAgeFilesLines
* Merge remote-tracking branch 'origin/rel-v2023.2' into nanbieldMark Hatle2023-10-231-0/+8
|\ | | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * arm-trusted-firmware : Updated SRCREV for 2023.2_8051Sivaprasad Addepalli2023-09-071-1/+1
| | | | | | | | | | | | | | fix(xilinx): update dtb when dtb address and tf-a ddr flow is used fix(versal): use correct macro name for ocm base address Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * arm-trusted-firmware : Updated SRCREV for 2023.2_3455Sivaprasad Addepalli2023-08-241-1/+1
| | | | | | | | | | | | | | fix(versal-net): dont clear pending interrupts fix(zynqmp): validate clock_id to avoid OOB variable access Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * arm-trusted-firmware : Updated SRCREV for 2023.2_7919Addepalli, Siva2023-08-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix(versal-net): make pmc ipi channel as secure fix(versal): make pmc ipi channel as secure fix(versal-net): add redundant call to avoid glitches fix(versal-net): change flag to increase security chore(zynqmp): remove unused configuration from TSP fix(zynqmp): resolve runtime error in TSP chore(xilinx): reorder headers in assembly files chore(xilinx): correct kernel doc warnings for missing functions fix(xilinx): add headers to resolve compile time issue fix(xilinx): remove clock_setrate and clock_getrate api feat(versal-net): ddr address reservation in dtb at runtime feat(versal): ddr address reservation in dtb at runtime Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
| * arm-trusted-firmware : Updated SRCREV for 2023.2_8823Sivaprasad Addepalli2023-07-101-1/+1
| | | | | | | | | | | | | | fix(versal-net): correct device node indexes chore(xilinx): reorder include files as per TF-A guidelines Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * arm-trusted-firmware : Updated SRCREV for 2023.2_8891Sivaprasad Addepalli2023-07-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | chore(xilinx): update warning message feat(versal-net): add cluster check in handoff parameters feat(versal-net): get the handoff params using IPI chore(xilinx): replace fsbl with xbl chore(xilinx): follow kernel doc format for functional documentation fix(zynqmp): type cast addresses to fix overflow issue fix: integer suffix macro definition fix(versal): add missing irq mapping for wakeup src fix(zynqmp): fix prepare_dtb() memory description Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Updated SRCREV of arm-trusted-firmware for 2023.2_5007Sivaprasad Addepalli2023-06-121-1/+1
| | | | | | | | | | | | | | fix(zynqmp): fix sdei arm_validate_ns_entrypoint() chore(xilinx): replace ATF with TFA Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Updated SRCREV of arm-trusted-firmware for 2023.2_6375Sivaprasad Addepalli2023-06-101-1/+1
| | | | | | | | | | | | fix(zynqmp): handling of type el3 interrrupts Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Updated SRCREV of arm-trusted-firmware for 2023.2_8755Sivaprasad Addepalli2023-06-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix(zynqmp): make zynqmp_devices structure smaller feat(versal-net): add support for SMCC ARCH SOC ID feat(versal): add support for SMCC ARCH SOC ID refactor(versal-net): move macros to common header feat(xilinx): add support to get chipid fix(versal-net): fix BLXX memory limits for user defined values fix(versal): fix BLXX memory limits for user defined values fix(zynqmp): fix BLXX memory limits for user defined values feat(xilinx): fix IPI calculation for Versal/NET feat(xilinx): setup local/remote id in header feat(xilinx): clean macro names fix(zynqmp): do not export apu_ipi fix(zynqmp): remove unused headers feat(xilinx): move IPI related macros to plat_ipi.h feat(versal-net): add the IPI CRC checksum macro support Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Updated SRCREV for 2023.2_1891Sivaprasad Addepalli2023-05-281-1/+1
| | | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Updated SRCREV of arm-trusted-firmware for 2023.2_5395Sivaprasad Addepalli2023-05-191-1/+1
| | | | | | | | | | | | | | feat(zynqmp): make stack size configurable feat(zynqmp): add hooks for custom runtime setup Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Updated SRCREV for 2023.2_4771Sivaprasad Addepalli2023-04-031-1/+1
| | | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * arm-trusted-firmware: Update SRCREV due to rebaseMark Hatle2023-03-301-1/+1
| | | | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * Updated SRCREV for 2023.2_3407Sivaprasad Addepalli2023-03-301-1/+1
| | | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Updated SRCREV for 2023.2_5907Sivaprasad Addepalli2023-03-291-1/+1
| | | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Merge remote-tracking branch 'xilinx/2023.1' into 2023Mark Hatle2023-03-151-1/+1
| |\ | | | | | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * | Start 2023.2 developmentMark Hatle2023-03-081-0/+8
| | | | | | | | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* | | Merge remote-tracking branch 'origin/rel-v2023.1'Mark Hatle2023-05-181-0/+8
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | Resolved conflicts Preserved 2022* versions Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * | | Updated SRCREV for 2023.1_4563Sivaprasad Addepalli2023-04-141-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * | | Updated SRCREV for 2023.1_7339Sivaprasad Addepalli2023-04-041-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * | | Updated SRCREV for 2023.1_8447Sivaprasad Addepalli2023-03-291-1/+1
| | |/ | |/| | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * | Updated SRCREV for 2023.1_7019Sivaprasad Addepalli2023-03-091-1/+1
| | | | | | | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * | Updated SRCREV for 2023.1_4307Sivaprasad Addepalli2023-03-081-1/+1
| |/ | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Remove obsolete 2022 versionsMark Hatle2023-03-052-16/+0
| | | | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * Updated SRCREV for 2023.1_4591Sivaprasad Addepalli2023-03-041-1/+1
| | | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * arm-trusted-firmware: Disable buildpaths QA check for versalSandeep Gundlupet Raju2023-03-031-0/+3
| | | | | | | | | | | | | | | | | | | | | | TMPDIR buildpaths warning are observed. WARNING: arm-trusted-firmware-2.8-xilinx-v2023.1+gitAUTOINC+a03759e829-r0 do_package_qa: QA Issue: File /boot/arm-trusted-firmware--2.8-xilinx-v2023.1+gitAUTOINC+a03759e829-r0-20230302182530.elf in package arm-trusted-firmware contains reference to TMPDIR [buildpaths] Hence disable buildpaths QA check for versal. Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * Updated SRCREV for 2023.1_8783Sivaprasad Addepalli2023-02-081-1/+1
| | | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Updated SRCREV for 2023.1_7999Sivaprasad Addepalli2023-01-261-1/+1
| | | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * arm-trusted-firmware.inc: Use softer assignmentRaju Kumar Pothuraju2023-01-061-6/+8
| | | | | | | | | | | | | | | | | | | | | | Use softer assignemnt for ATF_CONSOLE zynqmp to override from .conf file. Signed-off-by: Raju Kumar Pothuraju <rajukumar.pothuraju@amd.com> Adjusted to use an intermediate default, so no override is required. Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * arm-trusted-firmware: Add BL33 preloadded base addressSandeep Gundlupet Raju2023-01-061-0/+3
| | | | | | | | | | | | | | | | | | Add BL33 preloadded base address to EXTRA_OEMAKE for ZynqMP and Versal. In machine or local configuration file user can set TFA_BL33_LOAD value. Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * arm-trusted-firmware: Sync packaged and deploy filesMark Hatle2022-12-021-2/+13
| | | | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * arm-trusted-firmware_2023.1: Update to latest SRCREVMark Hatle2022-12-011-1/+1
| | | | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * Updated SRCREV for 2023.1_9279Sivaprasad Addepalli2022-11-181-1/+1
| | | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Updated SRCREV for 2023.1_5851Sivaprasad Addepalli2022-11-161-1/+1
| | | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * arm-trusted-firmware: Add initial 2023.1 branchMark Hatle2022-11-021-0/+8
| | | | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* | arm-trusted-firmware: Disable buildpaths QA check for versalSandeep Gundlupet Raju2023-04-101-0/+3
| | | | | | | | | | | | | | | | | | | | | | TMPDIR buildpaths warning are observed. WARNING: arm-trusted-firmware-2.6-xilinx-v2022.2+gitAUTOINC+a03759e829-r0 do_package_qa: QA Issue: File /boot/arm-trusted-firmware--2.6-xilinx-v2022.2+gitAUTOINC+a03759e829-r0-20230302182530.elf in package arm-trusted-firmware contains reference to TMPDIR [buildpaths] Hence disable buildpaths QA check for versal. Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* | arm-trusted-firmware.inc: Use softer assignmentRaju Kumar Pothuraju2023-04-101-6/+8
| | | | | | | | | | | | | | | | | | | | | | Use softer assignemnt for ATF_CONSOLE zynqmp to override from .conf file. Signed-off-by: Raju Kumar Pothuraju <rajukumar.pothuraju@amd.com> Adjusted to use an intermediate default, so no override is required. Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* | arm-trusted-firmware: Add BL33 preloadded base addressSandeep Gundlupet Raju2023-04-101-0/+3
| | | | | | | | | | | | | | | | | | Add BL33 preloadded base address to EXTRA_OEMAKE for ZynqMP and Versal. In machine or local configuration file user can set TFA_BL33_LOAD value. Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* | arm-trusted-firmware: Sync packaged and deploy filesMark Hatle2023-04-071-2/+13
|/ | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
* Merge branch 'kirkstone-next'Mark Hatle2022-09-201-1/+1
|\ | | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * Merge branch 'honister' into kirkstone-nextMark Hatle2022-09-201-1/+1
| |\ | | | | | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| | * Merge remote-tracking branch 'origin/rel-v2022.2' into honisterMark Hatle2022-09-201-1/+1
| | |\ | | | | | | | | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| | | * Updated SRCREV for 2022.2Sivaprasad Addepalli2022-09-131-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
* | | | Merge branch 'kirkstone-next'Mark Hatle2022-09-132-2/+14
|\| | | | | | | | | | | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * | | Merge branch 'honister' into kirkstone-nextMark Hatle2022-09-122-2/+14
| |\| | | | | | | | | | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| | * | various: Use recipe version instead of XILINX_RELEASE_VERSION in PVMark Hatle2022-09-121-2/+1
| | | | | | | | | | | | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| | * | Merge remote-tracking branch 'origin/rel-v2022.2' into honisterMark Hatle2022-09-122-1/+6
| | |\| | | | | | | | | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| | | * arm-trusted-firmware: Enable versal-net platformMark Hatle2022-09-061-0/+5
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com> Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
| | | * Updated SRCREV for 2022.2Sivaprasad Addepalli2022-09-061-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| | | * Updated SRCREV for 2022.2Sivaprasad Addepalli2022-09-031-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-07-24 07:41:29 +0000