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* Merge remote-tracking branch 'origin/rel-v2023.2' into nanbieldMark Hatle2023-10-2318-49/+394
|\ | | | | | | Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * aie-rt : Updated SRCREV for 2023.2_6187Sivaprasad Addepalli2023-10-051-1/+1
| | | | | | | | | | driver:src: AIE decoupling build bsp & build app failed Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * aie-rt : Updated SRCREV for 2023.2_2687Sivaprasad Addepalli2023-09-231-1/+1
| | | | | | | | | | driver:src: xaiengine directory & include files are missing Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_3243Sivaprasad Addepalli2023-09-221-1/+1
| | | | | | | | | | net: zynq_gem: Update the MDC clock divisor in the probe function Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_8535Sivaprasad Addepalli2023-09-191-1/+1
| | | | | | | | | | net: phy: xilinx-gmii2rgmii: Removed hardcoded phy address 0 for bridge Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_2643Sivaprasad Addepalli2023-09-141-1/+1
| | | | | | | | | | | | arm64: versal-net: Add dts files for mini u-boot qspi and ospi configurations mtd: spi-nor: Update block protection flags for spansion flash Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_2883Sivaprasad Addepalli2023-09-131-1/+1
| | | | | | | | | | | | | | | | mtd: spi-nor: Fix the issi_get_locked_range api arm64: zynqmp: Add output-enable pins to SOMs cmd: sf: Fix the flash_is_unlocked api size parameter mtd: spi-nor: Fix the giga_get_locked_range api Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Updated SRCREV of bootgen for 2023.2_4079Siva Addepalli2023-09-111-1/+1
| | | | | | | | | | | | | | | | | | 2023.2 Updates 1. Support for replace/append use cases based of include bif 2. Fix build on machines with modern flex 2023.2_ksb Updates 1. Support for Authentication Optimization 2. Support for User Optional Data 3. Support for TCM Boot Flag 4. Add set_ipi_access Command 5. Add Sub Marker Support 6. Bug Fix for Deterministic Builds 2023.2_ksb Updates Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * boot.cmd.generic.root: Add kernel command line param supportSandeep Gundlupet Raju2023-09-071-6/+6
| | | | | | | | | | | | | | | | | | Add kernel command line parameters support in boot.scr, With this user can append additional kernel command line parameters to existing bootargs. Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * arm-trusted-firmware : Updated SRCREV for 2023.2_8051Sivaprasad Addepalli2023-09-071-1/+1
| | | | | | | | | | | | | | fix(xilinx): update dtb when dtb address and tf-a ddr flow is used fix(versal): use correct macro name for ocm base address Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * aie-rt : Updated SRCREV for 2023.2_7699Sivaprasad Addepalli2023-09-061-1/+1
| | | | | | | | | | driver:src: fixe the BD iteration value boundary check Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * aie-rt : Updated SRCREV for 2023.2_4663Sivaprasad Addepalli2023-09-061-1/+1
| | | | | | | | | | | | | | | | driver:src: Added the new transaction bufffer header to include dir driver: src: dma: Convert DMA WriteBD operations to BlockWrite operations for shim DMA BD driver:src:Add consistant way to access custom Opearator driver: src: global: Minor fixes to doxygen documentation Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Updated SRCREV of dfx-mgr for 2023.2_2207Siva Addepalli2023-09-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | README.md: AIE and graph notes README.md: add libdfx, XRT, kria-dfx-hw links dfx_mgr: avoid reading Clear-On-Read register client: API to set Data-Mover configuration client: list or set Data-Mover configuration dfx_mgr: display or configure Data-Movers dfx-mgr: get Inter-RP address from shell.json accel: Use sbustring match to get VA address dfx-mgrd: add uid, pid checks Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_1791Sivaprasad Addepalli2023-09-051-1/+1
| | | | | | | | | | arm64: versal-net: Fix sysmon interrupt number Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * aie-rt : Updated SRCREV for 2023.2_1763Sivaprasad Addepalli2023-08-311-1/+1
| | | | | | | | | | | | | | driver: src: global: Correct documentation driver: src: Fixed MisraC mandatory violations driver: src: rsc: Fix resource (file descriptor) leak Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * bootgen: Update branch to xlnx_rel_v2023.2Mark Hatle2023-08-291-0/+31
| | | | | | | | | | | | | | Changelog: (none) Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * libdfx: Update branch to xlnx_rel_v2023.2John Toomey2023-08-291-1/+1
| | | | | | | | | | | | | | | | Changelog: (none) Signed-off-by: John Toomey <john.toomey@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * dfx-mgr: Update branch to xlnx_rel_v2023.2John Toomey2023-08-291-1/+1
| | | | | | | | | | | | | | | | Changelog: (none) Signed-off-by: John Toomey <john.toomey@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * ai-engine-driver: Update branch to xlnx_rel_v2023.2John Toomey2023-08-291-2/+2
| | | | | | | | | | | | | | | | | | | | Changelog: driver: src: global: Correct documentation driver: src: Fixed MisraC mandatory violations driver: src: rsc: Fix resource (file descriptor) leak Signed-off-by: John Toomey <john.toomey@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * aie-rt : Updated SRCREV for 2023.2_3691Sivaprasad Addepalli2023-08-291-1/+1
| | | | | | | | | | | | | | driver: src: global: Correct documentation driver: src: Fixed MisraC mandatory violations driver: src: rsc: Fix resource (file descriptor) leak Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_3579Sivaprasad Addepalli2023-08-241-1/+1
| | | | | | | | | | arm64: zynqmp: Enable the config CMD_KASLRSEED Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * arm-trusted-firmware : Updated SRCREV for 2023.2_3455Sivaprasad Addepalli2023-08-241-1/+1
| | | | | | | | | | | | | | fix(versal-net): dont clear pending interrupts fix(zynqmp): validate clock_id to avoid OOB variable access Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_4615Sivaprasad Addepalli2023-08-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arm64:versal_net: Add jedec compatible string for SPI flash spi: spi-uclass: Add dev_read_u32() if reg property is not an array arm64: zynqmp: Update ECAM size to discover up to 256 buses dm: core: ofnode: Change the log message to debug clk: versal: Fix the function versal_clock_ref pinctrl: zynqmp: Add support for output-enable and bias-high-impedance pinctrl: zynqmp: Add version check for TRISTATE configuration firmware: zynqmp: Add support to check feature arm64: versal_net: Disable the lock option for mini ospi and qspi arm64: zynqmp: Disable the lock option for mini qspi arm64: versal: Disable the lock option for mini ospi and qspi mtd: spi-nor: Add spi flash lock config option spi: zynq: Clear flags to get updated value spi: zynqmp_qspi: Clear flag to get updated value Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * u-boot-xlnx-scr: Refactor boot scr variables to make it easier to overrideSandeep Gundlupet Raju2023-08-191-15/+3
| | | | | | | | | | | | | | | | | | | | With the previous version by default xen variables are included in non xen use case, it would have been possible for kernel and devicetree offset can be override from meta-virtualization layer. With the new version add variables as addendum. Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_3191Addepalli, Siva2023-08-181-1/+1
| | | | | | | | | | | | dm: core: ofnode: Change the log message to debug clk: versal: Fix the function versal_clock_ref Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
| * arm-trusted-firmware : Updated SRCREV for 2023.2_7919Addepalli, Siva2023-08-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix(versal-net): make pmc ipi channel as secure fix(versal): make pmc ipi channel as secure fix(versal-net): add redundant call to avoid glitches fix(versal-net): change flag to increase security chore(zynqmp): remove unused configuration from TSP fix(zynqmp): resolve runtime error in TSP chore(xilinx): reorder headers in assembly files chore(xilinx): correct kernel doc warnings for missing functions fix(xilinx): add headers to resolve compile time issue fix(xilinx): remove clock_setrate and clock_getrate api feat(versal-net): ddr address reservation in dtb at runtime feat(versal): ddr address reservation in dtb at runtime Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
| * u-boot-xlnx-scr: Add variables for xen bootSandeep Gundlupet Raju2023-08-141-0/+16
| | | | | | | | | | | | | | | | | | | | Add variables for xen u-boot script and define in meta-virtualization dynamic layer bbapends. Variables are set wtih weak default assignment. Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * u-boot-xlnx-scr: Set weak assignment for variablesSandeep Gundlupet Raju2023-08-141-101/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Variables set from dynamic layer bbappends will not take effect due softer assignment defined in u-boot-xlnx-scr.bb. Hence weak assignment should be set for variables in u-boot-xlnx-scr.bb file so that pre-expansion values are properly handled. This way variable value can be changed from dynamic layer bbapends or local.conf. Also fix indentation. Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * meta-xilinx-core: Update SRCREV and license checksum for ai-engineGregory Williams2023-08-141-2/+2
| | | | | | | | | | | | | | Update license checksum and source revision for ai-engine recipes. Signed-off-by: Gregory Williams <gregory.williams@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_8499Addepalli, Siva2023-08-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | pinctrl: zynqmp: Add support for output-enable and bias-high-impedance pinctrl: zynqmp: Add version check for TRISTATE configuration firmware: zynqmp: Add support to check feature arm64: versal_net: Disable the lock option for mini ospi and qspi arm64: zynqmp: Disable the lock option for mini qspi arm64: versal: Disable the lock option for mini ospi and qspi mtd: spi-nor: Add spi flash lock config option Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
| * Revert "aie-rt : Updated SRCREV for 2023.2_1163"Manikanta Sreeram2023-08-091-1/+1
| | | | | | | | This reverts commit ee478e17a379f7609f848dbb19da3ddf67d8950d.
| * aie-rt : Updated SRCREV for 2023.2_1163Addepalli, Siva2023-08-091-1/+1
| | | | | | | | | | | | aie-rt: Updated the license files driver:src: Fixed transaction buffer generation Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_3819Addepalli, Siva2023-08-081-1/+1
| | | | | | | | | | | | | | | | spi: zynq: Clear flags to get updated value spi: zynqmp_qspi: Clear flag to get updated value xilinx: board: Add support to pick bootscr flash offset/size from DT dm: core: ofnode: Add ofnode_read_bootscript_flash() Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
| * revert as it is causing LIC checksum issueManikanta Sreeram2023-08-081-1/+1
| | | | | | | | | | | | Revert "aie-rt : Updated SRCREV for 2023.2_7359" This reverts commit 7cb03f64b9589083d4f4ee8d0554266abd691010.
| * aie-rt : Updated SRCREV for 2023.2_7359Addepalli, Siva2023-08-081-1/+1
| | | | | | | | | | | | aie-rt: Updated the license files driver:src: Fixed transaction buffer generation Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_6015Addepalli, Siva2023-08-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi: zynqmp_qpsi: Enable invalidate_cache for ZynqMP and Versal xilinx: board: Add support to pick bootscr address from DT dm: core: ofnode: Add ofnode_read_bootscript_address() Revert "arm64: xilinx: Replace _ from clock node names by -" arm64: zynqmp: Get clock node name back with _ arm64: versal: Increase the number of DRAM banks to 36 spi: zynq: Configure lqspi register based on memory configuration arm64: versal-net: Add sysmon node entry xilinx: zynqmp: Do not setup boot_targets if driver is not enabled xilinx: versal: Do not setup boot_targets if driver is not enabled xilinx: versal-net: Do not setup boot_targets if driver is not enabled arm64: xilinx: Do not use _ in DT node names arm64: zynqmp: Use s/gtr_sel/gtr-sel/ for DT node name arm64: zynqmp: Use s/heartbeat_led/heartbeat-led/ for DT node name arm64: xilinx: Replace _ from clock node names by - arm64: zynqmp: Rename xlnx,mio_bank to xlnx,mio-bank for DLC21 arm64: versal-net: Remove xlnx,device_id property from VNX arm64: versal-net: Remove ref_clk node from VNX board mtd: spi-nor: Update block protection flags for flash parts net: zynq_gem: Add missing newline (upstream sync) xilinx: versal-net: Remove additional newline in board.c spi: spi-uclass: Dont return error for single cs spi: spi-uclass: Move restricting multi_cs_cap code dm: core: Remove debug print from of_read_u64_index mtd: spi-nor: Add support for locking on Spansion nor flashes mtd: spi-nor: Add support for locking on GIGADEVICE nor flashes mtd: spi-nor: Add support for locking on ISSI nor flashes mtd: spi-nor: Add support for locking on Macronix nor flashes clk: zynqmp: Add gem rx and tsu clocks to return register clk: zynqmp: Add set_rate support for gem rx and tsu clks arm64: zynqmp: Add resets property for CAN nodes spi: zynq: Add support for parallel-memories and stacked-memories spi: zynqmp_qspi: Add parallel memories support in GQSPI driver spi: spi-uclass: Read chipselect and restrict capabilities mtd: spi-nor: Add parallel and stacked memories support in spi-nor dm: core: support reading a single indexed u64 value Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
| * aie-rt : Updated SRCREV for 2023.2_6899Addepalli, Siva2023-08-041-1/+1
| | | | | | | | | | | | | | driver: src: Add missing header file dependency driver: src: Added Support for Status Dump driver: src: io_backend: Set bitmap for partitionInitialize Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
| * aie-rt : Updated SRCREV for 2023.2_8403Sivaprasad Addepalli2023-07-281-1/+1
| | | | | | | | | | driver: src: Added support to check the tile DM overflow. Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * aie-rt : Updated SRCREV for 2023.2_9355Sivaprasad Addepalli2023-07-271-1/+1
| | | | | | | | | | driver:src: Added a macro to avoid compiler error. Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * aie-rt : Updated SRCREV for 2023.2_1671Sivaprasad Addepalli2023-07-261-1/+1
| | | | | | | | | | fal: src: Fix bug in getEvent logic Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * u-boot-xlnx-scr: Add PRE_BOOTENV variable for boot cmd filesSandeep Gundlupet Raju2023-07-254-0/+8
| | | | | | | | | | | | | | | | | | Based on github Pull Request #34. While that pull request is no longer valid with other changes, the actual bug still exists. Originally reported by Felix S(ubfx). Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
| * Add a check for uboot-device-tree dtbTejas Bhumkar2023-07-251-2/+2
| | | | | | | | | | | | | | | | | | Added below changes: 1)Updated operator in if condition from `==` to `=` as it is used for string comparison in both Bash and Dash, making the script compatible with both shells. 2)Checking for uboot-device-tree.dtb file in RECIPE_SYSROOT path before applying fdtoverlay. Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * aie-rt : Updated SRCREV for 2023.2_5135Sivaprasad Addepalli2023-07-251-1/+1
| | | | | | | | | | driver: src: io_backend: Clear bitmap Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * aie-rt : Updated SRCREV for 2023.2_5223Sivaprasad Addepalli2023-07-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | driver: src: Add xlnx-aie-engine.h file to xaiengine driver: src: Fixed MisraC violations driver: src: Fixed MisraC Violations driver: src: Remove implicit conversions Fixed Cmake build compilation error for aie-rt driver:src: Added support to capture core utilization. driver: src: io_backend: Blocked access to gated tiles driver: src: AIE-driver header clean up Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_2183Sivaprasad Addepalli2023-07-141-1/+1
| | | | | | | | | | | | | | arm64: zynqmp: Remove USB description from SC revB/C test: py: tests: Add qspi negative tests test: py: tests: Add qspi flash lock/unlock test Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_5375Sivaprasad Addepalli2023-07-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | clk: Dont return error when assigned-clocks is empty or missing xilinx: zynq: Enable fdt apply utility for zynq env: Fix default environment saving issue zynqmp: config: Add proper dependencies for USB cmd: thordown: Add proper dependency for CMD_THOR_DOWNLOAD dfu: Add proper dependency for CONFIG_DFU_MMC usb: xhci: Fix the missing return statement Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * arm-trusted-firmware : Updated SRCREV for 2023.2_8823Sivaprasad Addepalli2023-07-101-1/+1
| | | | | | | | | | | | | | fix(versal-net): correct device node indexes chore(xilinx): reorder include files as per TF-A guidelines Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Revert "aie-rt : Updated SRCREV for 2023.2_3099"Manikanta Sreeram2023-07-071-1/+1
| | | | | | | | This reverts commit 6cbe9d87e3bcebb5fc7e59fe5139eb5eada46169.
| * aie-rt : Updated SRCREV for 2023.2_3099Sivaprasad Addepalli2023-07-071-1/+1
| | | | | | | | | | | | driver: src: io_backend: Blocked access to gated tiles driver: src: AIE-driver header clean up Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * aie-rt : Updated SRCREV for 2023.2_7159Sivaprasad Addepalli2023-07-071-1/+1
| | | | | | | | | | driver:src: Trancsation buffer logging fixed. Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-07-19 22:32:33 +0000