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| * u-boot-xlnx-scr: Set weak assignment for variablesSandeep Gundlupet Raju2023-08-141-101/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Variables set from dynamic layer bbappends will not take effect due softer assignment defined in u-boot-xlnx-scr.bb. Hence weak assignment should be set for variables in u-boot-xlnx-scr.bb file so that pre-expansion values are properly handled. This way variable value can be changed from dynamic layer bbapends or local.conf. Also fix indentation. Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * meta-xilinx-core: Update SRCREV and license checksum for ai-engineGregory Williams2023-08-141-2/+2
| | | | | | | | | | | | | | Update license checksum and source revision for ai-engine recipes. Signed-off-by: Gregory Williams <gregory.williams@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_8499Addepalli, Siva2023-08-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | pinctrl: zynqmp: Add support for output-enable and bias-high-impedance pinctrl: zynqmp: Add version check for TRISTATE configuration firmware: zynqmp: Add support to check feature arm64: versal_net: Disable the lock option for mini ospi and qspi arm64: zynqmp: Disable the lock option for mini qspi arm64: versal: Disable the lock option for mini ospi and qspi mtd: spi-nor: Add spi flash lock config option Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
| * Revert "aie-rt : Updated SRCREV for 2023.2_1163"Manikanta Sreeram2023-08-091-1/+1
| | | | | | | | This reverts commit ee478e17a379f7609f848dbb19da3ddf67d8950d.
| * aie-rt : Updated SRCREV for 2023.2_1163Addepalli, Siva2023-08-091-1/+1
| | | | | | | | | | | | aie-rt: Updated the license files driver:src: Fixed transaction buffer generation Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_3819Addepalli, Siva2023-08-081-1/+1
| | | | | | | | | | | | | | | | spi: zynq: Clear flags to get updated value spi: zynqmp_qspi: Clear flag to get updated value xilinx: board: Add support to pick bootscr flash offset/size from DT dm: core: ofnode: Add ofnode_read_bootscript_flash() Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
| * revert as it is causing LIC checksum issueManikanta Sreeram2023-08-081-1/+1
| | | | | | | | | | | | Revert "aie-rt : Updated SRCREV for 2023.2_7359" This reverts commit 7cb03f64b9589083d4f4ee8d0554266abd691010.
| * aie-rt : Updated SRCREV for 2023.2_7359Addepalli, Siva2023-08-081-1/+1
| | | | | | | | | | | | aie-rt: Updated the license files driver:src: Fixed transaction buffer generation Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_6015Addepalli, Siva2023-08-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi: zynqmp_qpsi: Enable invalidate_cache for ZynqMP and Versal xilinx: board: Add support to pick bootscr address from DT dm: core: ofnode: Add ofnode_read_bootscript_address() Revert "arm64: xilinx: Replace _ from clock node names by -" arm64: zynqmp: Get clock node name back with _ arm64: versal: Increase the number of DRAM banks to 36 spi: zynq: Configure lqspi register based on memory configuration arm64: versal-net: Add sysmon node entry xilinx: zynqmp: Do not setup boot_targets if driver is not enabled xilinx: versal: Do not setup boot_targets if driver is not enabled xilinx: versal-net: Do not setup boot_targets if driver is not enabled arm64: xilinx: Do not use _ in DT node names arm64: zynqmp: Use s/gtr_sel/gtr-sel/ for DT node name arm64: zynqmp: Use s/heartbeat_led/heartbeat-led/ for DT node name arm64: xilinx: Replace _ from clock node names by - arm64: zynqmp: Rename xlnx,mio_bank to xlnx,mio-bank for DLC21 arm64: versal-net: Remove xlnx,device_id property from VNX arm64: versal-net: Remove ref_clk node from VNX board mtd: spi-nor: Update block protection flags for flash parts net: zynq_gem: Add missing newline (upstream sync) xilinx: versal-net: Remove additional newline in board.c spi: spi-uclass: Dont return error for single cs spi: spi-uclass: Move restricting multi_cs_cap code dm: core: Remove debug print from of_read_u64_index mtd: spi-nor: Add support for locking on Spansion nor flashes mtd: spi-nor: Add support for locking on GIGADEVICE nor flashes mtd: spi-nor: Add support for locking on ISSI nor flashes mtd: spi-nor: Add support for locking on Macronix nor flashes clk: zynqmp: Add gem rx and tsu clocks to return register clk: zynqmp: Add set_rate support for gem rx and tsu clks arm64: zynqmp: Add resets property for CAN nodes spi: zynq: Add support for parallel-memories and stacked-memories spi: zynqmp_qspi: Add parallel memories support in GQSPI driver spi: spi-uclass: Read chipselect and restrict capabilities mtd: spi-nor: Add parallel and stacked memories support in spi-nor dm: core: support reading a single indexed u64 value Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
| * aie-rt : Updated SRCREV for 2023.2_6899Addepalli, Siva2023-08-041-1/+1
| | | | | | | | | | | | | | driver: src: Add missing header file dependency driver: src: Added Support for Status Dump driver: src: io_backend: Set bitmap for partitionInitialize Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
| * aie-rt : Updated SRCREV for 2023.2_8403Sivaprasad Addepalli2023-07-281-1/+1
| | | | | | | | | | driver: src: Added support to check the tile DM overflow. Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * aie-rt : Updated SRCREV for 2023.2_9355Sivaprasad Addepalli2023-07-271-1/+1
| | | | | | | | | | driver:src: Added a macro to avoid compiler error. Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * aie-rt : Updated SRCREV for 2023.2_1671Sivaprasad Addepalli2023-07-261-1/+1
| | | | | | | | | | fal: src: Fix bug in getEvent logic Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * u-boot-xlnx-scr: Add PRE_BOOTENV variable for boot cmd filesSandeep Gundlupet Raju2023-07-254-0/+8
| | | | | | | | | | | | | | | | | | Based on github Pull Request #34. While that pull request is no longer valid with other changes, the actual bug still exists. Originally reported by Felix S(ubfx). Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
| * Add a check for uboot-device-tree dtbTejas Bhumkar2023-07-251-2/+2
| | | | | | | | | | | | | | | | | | Added below changes: 1)Updated operator in if condition from `==` to `=` as it is used for string comparison in both Bash and Dash, making the script compatible with both shells. 2)Checking for uboot-device-tree.dtb file in RECIPE_SYSROOT path before applying fdtoverlay. Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * aie-rt : Updated SRCREV for 2023.2_5135Sivaprasad Addepalli2023-07-251-1/+1
| | | | | | | | | | driver: src: io_backend: Clear bitmap Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * aie-rt : Updated SRCREV for 2023.2_5223Sivaprasad Addepalli2023-07-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | driver: src: Add xlnx-aie-engine.h file to xaiengine driver: src: Fixed MisraC violations driver: src: Fixed MisraC Violations driver: src: Remove implicit conversions Fixed Cmake build compilation error for aie-rt driver:src: Added support to capture core utilization. driver: src: io_backend: Blocked access to gated tiles driver: src: AIE-driver header clean up Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_2183Sivaprasad Addepalli2023-07-141-1/+1
| | | | | | | | | | | | | | arm64: zynqmp: Remove USB description from SC revB/C test: py: tests: Add qspi negative tests test: py: tests: Add qspi flash lock/unlock test Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_5375Sivaprasad Addepalli2023-07-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | clk: Dont return error when assigned-clocks is empty or missing xilinx: zynq: Enable fdt apply utility for zynq env: Fix default environment saving issue zynqmp: config: Add proper dependencies for USB cmd: thordown: Add proper dependency for CMD_THOR_DOWNLOAD dfu: Add proper dependency for CONFIG_DFU_MMC usb: xhci: Fix the missing return statement Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * arm-trusted-firmware : Updated SRCREV for 2023.2_8823Sivaprasad Addepalli2023-07-101-1/+1
| | | | | | | | | | | | | | fix(versal-net): correct device node indexes chore(xilinx): reorder include files as per TF-A guidelines Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Revert "aie-rt : Updated SRCREV for 2023.2_3099"Manikanta Sreeram2023-07-071-1/+1
| | | | | | | | This reverts commit 6cbe9d87e3bcebb5fc7e59fe5139eb5eada46169.
| * aie-rt : Updated SRCREV for 2023.2_3099Sivaprasad Addepalli2023-07-071-1/+1
| | | | | | | | | | | | driver: src: io_backend: Blocked access to gated tiles driver: src: AIE-driver header clean up Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * aie-rt : Updated SRCREV for 2023.2_7159Sivaprasad Addepalli2023-07-071-1/+1
| | | | | | | | | | driver:src: Trancsation buffer logging fixed. Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * u-boot-xlnx-scr: Add support to use uboot env variable at builtRaju Kumar Pothuraju2023-07-051-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In current boot.scr recipe implementation supports the fixed offsets. Add support to use the uboot env variables to load the images. If offsets starts from '$' sign considering it as a uboot env. Example for SC BSPs(using fitblob) uboot will redirect the dtb to $fdtcontroladdr, so our boot script DT address also should point to the same. In .conf: DEVICETREE_OFFSET:<soc> = "$fdtcontroladdr" In boot.scr: <bootcmd> 0x00200000 0x04000000 $fdtcontroladdr Remove the DEVICETREE_OVERLAY_ADDRESS dependency with DEVICETREE_ADDRESS as it may fail if you point uboot env variables(reserved memory). Adding new variables DEVICETREE_OVERLAY_OFFSET - To specify DTB overlay offset which will add to DDR base address. DEVICETREE_OVERLAY_PADSIZE - To specify the offset from overlay_offset to load dtbo file. Signed-off-by: Raju Kumar Pothuraju <rajukumar.pothuraju@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_1639Sivaprasad Addepalli2023-07-051-1/+1
| | | | | | | | | | | | arm64: versal-net: add usb-wakeup interrupt in dwc3 core arm64: versal: Add no-wp DT property in OSPI flash node Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * arm-trusted-firmware : Updated SRCREV for 2023.2_8891Sivaprasad Addepalli2023-07-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | chore(xilinx): update warning message feat(versal-net): add cluster check in handoff parameters feat(versal-net): get the handoff params using IPI chore(xilinx): replace fsbl with xbl chore(xilinx): follow kernel doc format for functional documentation fix(zynqmp): type cast addresses to fix overflow issue fix: integer suffix macro definition fix(versal): add missing irq mapping for wakeup src fix(zynqmp): fix prepare_dtb() memory description Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * boot.cmd.generic: Update bootargs with launch_ramdisk_initRaju Kumar Pothuraju2023-06-291-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Map uboot env variable launch_ramdisk_init with bootargs to stop at tiny rootfs. If user specified bootargs at uboot skip appending auto bootargs. Using fdtcontroladdr uboot variable instead of hardcoded value in boot.scr. If DTB loads from FAT to DDR from uboot fdtcontroladdr points to old dtb(loaded from boot.bin or uboot.elf) so updating it with the dtb load address. Signed-off-by: Raju Kumar Pothuraju <rajukumar.pothuraju@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * u-boot-xlnx : Updated SRCREV for 2023.2_1551Sivaprasad Addepalli2023-06-261-1/+1
| | | | | | | | | | | | arm64: versal_net: Update SPI node for se7 mtd: spi-nor: Add support for w25q256jwm Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * meta-xilinx-core: Add virtual/bitstream provider for non XSCT caseMark Hatle2023-06-231-0/+59
| | | | | | | | | | | | | | This is modeled after the pmufw and provides a non-default virtual/bitstream provider. Other boards and workflows will provider their own providers. Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * aie-rt : Updated SRCREV for 2023.2_9031Sivaprasad Addepalli2023-06-231-1/+1
| | | | | | | | | | | | | | | | | | driver:src: Fixed transaction buffer error msg driver: src: Fix compiler warnings fal: Update driver version for 2023.2 release driver: Update xaiengine version for 2023.2 release driver: src: Add API to configure edge detection events Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Revert "Updated SRCREV of aie-rt for 2023.2_6779"Manikanta Sreeram2023-06-221-1/+1
| | | | | | | | This reverts commit 1f370d5111c2e29ede37eafeff4f865408627479.
| * Updated SRCREV of aie-rt for 2023.2_6779Sivaprasad Addepalli2023-06-221-1/+1
| | | | | | | | | | | | | | | | | | fal: data: Update version to 1.4 driver: src: Update minor version for 2023.1 driver: src: global: Defined type for XAieDevType driver: src: Add API to read DMA Bd metadata driver: src: io_backend: Add workaround to fix trace timeline Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * ai-engine-driver & aiefal: Fix ai-edge PACKAGE_ARCHMark Hatle2023-06-212-0/+4
| | | | | | | | | | | | This was missed by the original commit that added ai-edge support. Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * meta-xilinx-core: Update ai-engine-driver and aiefal versionsGregory Williams2023-06-213-2/+2
| | | | | | | | | | | | | | | | Updates ai-engine-driver and aiefal versions for 2023.2 release. Source revision is updated to latest commit of main-aie branch. Signed-off-by: Gregory Williams <gregory.williams@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * Updated SRCREV of u-boot-xlnx for 2023.2_8771Sivaprasad Addepalli2023-06-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | net: zynq_gem: Don't hardcode the MDC clock divisor spi: zynqmp_qspi: Workaround for small data cache issue spi: zynqmp_qspi: Change flush cache to invalidate cache arm64: versal-net: Add LPD-WWDT to versal-net.dtsi include: dt-bindings: power: Add TCM,RPU nodes for Versal NET arm64: versal: Add DT description for CPM5 Root port for Versal Premium arm64: versal: Add missing DT properties to cpm_pciea arm64: versal: rename CPM interrupt-controller arm64: versal-net: Add support for VNX board arm64: versal: Switch to new wwdt DT binding Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * meta-xilinx-core: Enable full O2 optimizations for ai-engine-driverGregory Williams2023-06-191-1/+1
| | | | | | | | | | | | | | | | Remove -fno flags to enable full O2 optimizations for ai-engine-driver build. Signed-off-by: Gregory Williams <gregory.williams@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * u-boot-xlnx-scr: Add KERNEL_COMMAND_APPENDJohn Toomey2023-06-191-0/+4
| | | | | | | | | | | | | | Allow appending to the kernel command line in boot.scr Signed-off-by: John Toomey <john.toomey@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * Updated SRCREV of dfx-mgr for 2023.2_3555Siva Addepalli2023-06-191-1/+1
| | | | | | | | | | | | | | | | README: update and fix errors dfx-mgr: fix flags for external-fpga-config dfx-mgr: check if slot_regs are initialized Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * Updated SRCREV of u-boot-xlnx for 2023.2_5419Sivaprasad Addepalli2023-06-141-1/+1
| | | | | | | | | | | | | | | | | | watchdog: versal: Use new compatible xlnx,versal-wwdt arm64: zynqmp: In sc-revB dts add mtd partition for secure OS storage area mtd: spi-nor: Send write enable cmd before write to SR2 usb: xhci: Workaround to fix the USB halted endpoint issues arm64: dts: zynqmp: make hw-ecc as the default ecc mode Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Updated SRCREV of arm-trusted-firmware for 2023.2_5007Sivaprasad Addepalli2023-06-121-1/+1
| | | | | | | | | | | | | | fix(zynqmp): fix sdei arm_validate_ns_entrypoint() chore(xilinx): replace ATF with TFA Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Updated SRCREV of arm-trusted-firmware for 2023.2_6375Sivaprasad Addepalli2023-06-101-1/+1
| | | | | | | | | | | | fix(zynqmp): handling of type el3 interrrupts Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Updated SRCREV of u-boot-xlnx for 2023.2_6275Sivaprasad Addepalli2023-06-081-1/+1
| | | | | | | | | | | | | | arm64: zynqmp: Fix lockstep mode cpu release functionality arm64: zynqmp: Fix tcminit mode param arm64: versal-net: spi: Update boot sequence dynamically Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Updated SRCREV of u-boot-xlnx for 2023.2_5115Sivaprasad Addepalli2023-06-061-1/+1
| | | | | | | | | | | | | | test: py: tests: Add test case for loading RPU apps test: py: tests: Add test case for saveenv command arm64: zynqmp: Fix the memory node for k26/k24 kria som boards Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Revert "Updated SRCREV of aie-rt for 2023.2_2495"Manikanta Sreeram2023-06-051-1/+1
| | | | | | | | This reverts commit d1da4b1b2312034282c96963c9d115a3ce485fb7.
| * Updated SRCREV of aie-rt for 2023.2_2495Sivaprasad Addepalli2023-06-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | driver: src: Disabled dump logs driver: src: global: Fix incorrect number of resources driver: src: stream_switch: Fix port verify for AIEML driver: src: fixed build error for decoupling flow driver: src: lite: Implemented lite version of _XAie_PmIsTileRequested() for AIE driver: src: Add support for system device-tree flow driver: src: Added Runtime clock gating Add runtime clock gating ioctl calls fal: src: rsc: Fix getEvent broadcast logic to support memtiles fal: data: Update version to 1.4 driver: src: Update minor version for 2023.1 driver: src: Compiler warning fix driver: src: io_backend: Work around to fix infinite loop driver: src: perfcnt: Add API to get counter offest driver: src: Cleaned up the driver of ToDo/FixMe comments. fal:src: Cleaned up the fal of ToDo/FixMe comments. driver: src: Add API to read DMA Bd metadata driver: src: io_backend: Add workaround to fix trace timeline Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * u-boot-xlnx-blob: Error if CC_DTBS_DUP file missingJohn Toomey2023-06-011-0/+2
| | | | | | | | | | | | | | | | When processing all of the entries in CC_DTBS_DUP an error should be thrown if the target dtb file is not found. Signed-off-by: John Toomey <john.toomey@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * xilinx-bootbin: Refactor create_bif functionsJohn Toomey2023-06-011-4/+17
| | | | | | | | | | | | | | | | | | | | | | | | Remove the biffunc dict which was used to map arch to a specific bif creation function and replace with simple if/elif/else logic. The default bif file functions are defined for zynq/zynqmp and versal as well as and empty default function which could be redefined in a bbappend with new logic or mapped back to one of the existing functions. Signed-off-by: John Toomey <john.toomey@amd.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| * Updated SRCREV of arm-trusted-firmware for 2023.2_8755Sivaprasad Addepalli2023-06-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix(zynqmp): make zynqmp_devices structure smaller feat(versal-net): add support for SMCC ARCH SOC ID feat(versal): add support for SMCC ARCH SOC ID refactor(versal-net): move macros to common header feat(xilinx): add support to get chipid fix(versal-net): fix BLXX memory limits for user defined values fix(versal): fix BLXX memory limits for user defined values fix(zynqmp): fix BLXX memory limits for user defined values feat(xilinx): fix IPI calculation for Versal/NET feat(xilinx): setup local/remote id in header feat(xilinx): clean macro names fix(zynqmp): do not export apu_ipi fix(zynqmp): remove unused headers feat(xilinx): move IPI related macros to plat_ipi.h feat(versal-net): add the IPI CRC checksum macro support Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Updated SRCREV of u-boot-xlnx for 2023.2_8447Sivaprasad Addepalli2023-05-311-1/+1
| | | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| * Updated SRCREV of u-boot-xlnx for 2023.2_6211Sivaprasad Addepalli2023-05-311-1/+1
| | | | | | | | Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-08-08 03:59:03 +0000