| Commit message (Collapse) | Author | Age | Files | Lines |
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mtd: spi-nor: Add support for S28HS02GT Infineon OSPI flash
soc: xilinx: Fix logic to check sub_family_code
mtd: spi-nor: issi: Add support for is25lx512m OSPI flash
misc: xilinx-ai-engine: release the dma_buf assigned to pmem
crypto: xilinx: Updated fallback checks to call hardware AES
drivers: soc: xilinx: check return status of get_api_version()
drm: xlnx: hdcp: Fix memcpy argument in hdcp2x_tx_wait_for_pairing_info()
tty: serial: uartps: Add rs485 support to uartps driver
tty: serial: uartps: Relocate cdns_uart_tx_empty to facilitate rs485
dt-bindings: Add reference to rs485.yaml
serial: core: Provide port lock wrappers
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ps/psx: parent the GIC under the FPD memory region
versal-net: wire the rpu wakeup signals
versal-net: wire the rpu powerdown signals
psx-rpu: Increase the gic num irqs
versal: psx: macro-ify the rpu_ctrl creation
versal: psx: rpu: macro-ify the amba stream creation
versal: psx: rpu: macro-ify the rpu timer creation
versal: psx: rpu: macro-ify the gic creation
versal: psx: rpu: macro-ify the cpu cluster creation
versal: psx: rpu: rename cluster rpu macro
versal-psx: fix a typo for gpio-controller
versal-psm: Conditionally compile few psm blocks
versal-ps-pl-remoteport: Add SERBS support for AFI0/2
versal: add lpd & fpd interconnect config regs
versal-ddrmc: Remove HAS_DDRMCx macros
psx-memmap-aliases: Conditionally define DDRMC aliases
versal: Move DDRMC npi nodes
versal-net: Rename board names to have es1 tagged
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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hw/misc/reset-domain: walk sub-MRs when resetting
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kconfig_syshw.py: Update range for memory
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hw/misc/xlnx-versal-pmc-global: dont reset persistent storages
hw/intc/arm_gicv3: adds wake-request fdt gpio
hw/intc/arm_gicv3: implements wakerequest
hw/misc/xlnx-versal-net-psmx-global: implement rpu wakeup request
hw/misc/xlnx-versal-net-psmx-global: implement rpu powerdown request
hw/misc/xlnx-versal-net-psmx-global: fix gpio set name
hw/misc/xlnx-versal-net-rpu-pcil: introduce rpu shutdown request gpios
hw/misc/xlnx-versal-net-rpu_pcil: dont set gpio during reset enter
hw/core/fdt_generic_util: fix the logic to get gpio inputs
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Add specific --help to better userstand how to call the wrapper.
Add additional diagnostic messages in case of an APU failure.
Change the way the variables are processed, this will make it easier
to add additional switches in the future.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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chore!: update to revision d20240111
chore: update to revision d20231213
Added missing header files for Yocto project master(gcc 13.2)
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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chore!: update to revision d20240111
chore: update to revision d20231213
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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chore: update to revision d20240111
chore: update to revision d20231213
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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chore: update to revision d20240111
chore: update to revision d20231213
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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1. If SRC_URI has only one file without any space as shown below
SRC_URI = "file://vck190-dfx-static.pdi"
With this it fails to detect input entries. This is due to current
search logic doesn't work unless there is a space after end of file
name or new line for each entry as shown below.
SRC_URI = "file://vck190-dfx-static.pdi "
or
SRC_URI = " \
file://vck190-dfx-static.pdi \
"
So rewrite the logic to split the SRC_URI enteries and then
search key w/o the trailing space.
2. Remove get_dt_count function to avoid duplication.
3. Add docs for *_PATH variables.
4. Add warn message when multiple dtbo or bit or bin or pdi file is
found.
5. Fix DTSI_PATH, BIT_PATH build issue when input files are absolute
path.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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remote-port: Fix full house check
versal: Add SERBS support on AFIFS for LPD & FPD
remote-port-memory-master: Implement timed response waits
versal: Add the SERBS interface
remote-port: Add timed wait for responses
versal: Add LPD & FPD interconnect config regs
hw/core: remove the dma-ctrl interface
hw: remove OSPI and DMA CSU legacy models
hw/ssi/xlnx-versal-ospi: align GPIO declaration with the legacy model
hw/dma/xlnx_csu_dma: add support for 128 bits CRC
hw/dma/xlnx_csu_dma: fix the dma-width property comment
hw/dma/xlnx_csu_dma: add support for unaligned accesses
hw/dma/xlnx_csu_dma: split endianness swapping logic in its own function
hw/dma/xlnx_csu_dma: split CRC computation in its own function
hw/dma/xlnx_csu_dma: change is-dst property default value to false
hw/dma/xlnx_csu_dma: add memattr and memattr-write legacy properties
hw/dma/xlnx_csu_dma: add legacy stream-connected-dma[01] properties
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qdev-core.h: Add docs to AMD/Xilinx extensions
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Pass CFLAG to Libmetal Repo for Xilinx-AMD build of Libmetal AMP Demo
from meta-openamp file libmetal-xlnx.inc
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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lopper: assists: baremetal_xparameters_xlnx: Fix subnode_phandle property generation
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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apps: zynqmp_r5: Enable build with latest SDT BSP
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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examples: linux: zynqmp: Add Versal-NET IPI Values
lib: generic: xlnx: Use CMAKE_C_FLAGS to determine if SDT symbol is present
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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The commit 738df8cc6819 (yaml: support ruamel versions > 0.17.x) of github
lopper repo introduced a new dependency for lopper over "packaging" module. Add
the same in Yocto workflow.
Signed-off-by: Onkar Harsh <onkar.harsh@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Below are the updates
lopper: assists: xlnx_overlay_dt: Fix wrong gic_node referencing
setup.py: Add "packaging" module under YAML related requirements of Lopper
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Sync integration to Yocto Project master as of commit:
25868ee2cc3fdcbf4bff1ff4f66465e8aeef744d
Note, we remain on 8.1.x version to match the AMD version.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Backport the tune files from poky master as of commit:
dd4c941e9fe9e0f1b73a934d9ecd0d165ee85474
This adds support for cortex-r5 and cortexr-r52 hard float ABI, as well
as cortex-a78.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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tty: serial: uartps: Add rs485 support to uartps driver
tty: serial: uartps: Relocate cdns_uart_tx_empty to facilitate rs485
dt-bindings: Add reference to rs485.yaml
serial: core: Provide port lock wrappers
v4l: xilinx: dprx: Fix lane count allowed range of values
drm: xlnx: dptx: Fix unannotated fall-through between switch labels in xlnx_dp_check_clock_recovery api()
drm: xlnx: dptx: Fix xlnx_dp_hdcp_exit() return value
drm: xlnx: scaler: Initialize variable nr_rds
arm64: versal: Configure reset gpio as active low
arm64: versal: Add support for Versal Embedded+ VE2302-revA
arm64: configs: Enable DisplayPort driver
mmc: core: Do not force a retune before RPMB switch
v4l: xilinx: vipp: Fix searching in the correct list while enabling streaming
arm64: zynqmp: Add silabs, skip-recall to all si570 clk nodes
soc: xilinx: Add cb event for subsystem restart
firmware: xilinx: Export function to use in other module
Revert "OF: overlay: Perform RCU callback barrier before releasing overlay memory resources"
misc: xilinx-ai-engine: add dma_buf_get for each aie mem dmabuf created
drivers: misc: xilinx-ai-engine: Remove use of uninitialized variables
phy: xilinx-xhdmiphy: Fix GT pll-selection allowed range of values
misc: xilinx-ai-engine: support for partitioned AIE address segments
arm64: xilinx: Define bootscript address
arm64: versal: Move reset-gpios property from controller node to flash node
dt-bindings: xilinx: Fix all downstream bindings with latest schema
dt-bindings: nvmem: Update xlnx,versal-sec-cfg description
arm64: zynqmp: Remove unused zynqmp-clk.dtsi
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README.md: Update parse-sdt command help usage
Kconfig.dtgsettings: Rename dfx-static to dfx in kconfig
sdt_flow.py: Remove dfx-static and dfx-partial references
sdt_ipinfo.yaml: Update compatibility strings for ethernet
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versal-net: remove hardcoded ADMA addresses
zynqmp: set correct revidr value one the Cortex-A
board-versal-xcve2802: Add 2Gib OSPI flash
versal: Add vhk158 es1 board
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hw/arm/smmuv3: add support for the AFFD bit in context descriptors
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Pick up latest commits for build
examples: linux: zynqmp: Add Versal-NET IPI Values
lib: generic: xlnx: Use CMAKE_C_FLAGS to determine if SDT symbol is present
examples: generic: zynqmp_r5: Add symbols for System Device Flow flow
lib: generic: xlnx: Enable CMake handling for System Device Tree Flow
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Changelogs:
lops: lop-microblaze-riscv: Fix handling of use-muldiv and use-fpu
lopper: assists: Remove domain specific code from the assist
xlnx_overlay_dt.py: Rename dfx-static to dfx
asists/subsystem: make processing more robust
isospec: ensure that memory and cpus are always lists
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Mingw compilation does not support libcap-ng which is requird by the
virtfs configuration. Change this to match the previous 7.1
implementation where virtfs is only enabled on the target version of qemu.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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hw-description.tcl:kconfig_syshw.py: Rename Serial DTB to U-boot/Linux
sdt_flow.py: Rename dfx-static to dfx
plnx_machine.py: add xen support for plnx in sdt flow.
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target/arm: add the revidr property to the CPU
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This reverts commit 121edde2e704900a7b4e24b260167614705297aa.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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This reverts commit 6f7a824d505115a01dd49386aa47b079598fc07c.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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libdfx: Add document for dfx_cfg_init_file() API
Src: Add new API dfx_cfg_init_file() to provide more flexibility to the user
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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lopper: assists: baremetal*: Add provision to pass float numbers from SDT as is
yaml: support ruamel versions > 0.17.x
lopper: assists: gen_domain_dts: Fix syntax issue in the code
lopper: assists: baremetal_xparams: Done generate interruptIDs for PS peripherals
isospec: refactor for speed and tracking
tree: fix property iteration for json
isospec. WIP2. cleanedup prints
WIP: v2 unassigned devices and memory
WIP: unreferenced devices can be addded, lots of address warnings
assist:baremetalconfig: Avoid the error when there is no serial mapped to the processor
xlnx_overlay_dt.py: Update script to support partial use cases
openamp: xlnx: Enable Linux generated Device Tree to work for OpenAMP use cases
Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: John Toomey <john.toomey@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
(cherry picked from commit fe1fee9a45076aab2e39e38b5705d1ad0aa06de5)
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Last SRCREV update added support for kv260 rev2 which we are now tagging,
releasing for canonical, hence incrementing the version to 1.1
Signed-off-by: Sharath Kumar Dasari <sharathk@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
(cherry picked from commit 57b22cc33a24b32c4f3cef364378c5216d2fda87)
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
(cherry picked from commit 79335c2a8a9a6cfef521a3bddb24865def036050)
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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versal-vek280: Add es1 board varient
versal: Add vmk180 board
versal-net: Add REVA version for vn-p-b2197-00-x-prc
Update AMD Copyright
versal: Add support for xqvp1702
versal-ps-pl-remoteport: Add NPI IRQs
versal: Add support for xave1752
versal-xcvp1802: Add CPM5
zynqmp: Add KV260 board dts
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fix(xilinx): deprecate SiP service count query
feat(versal): extend platform address space sizes
fix(xilinx): add console_flush() before shutdown
fix(xilinx): fix sending sgi to linux
feat(xilinx): add new state to identify cpu power down
feat(xilinx): request cpu power down from reset
feat(xilinx): power down all cores on receiving cpu pwrdwn req
feat(xilinx): add handler for power down req sgi irq
feat(xilinx): add wrapper to handle cpu power down req
fix(versal-net): use arm common GIC handlers
fix(xilinx): rename macros to align with ARM
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driver: src: lite: Missing end quotation mark
driver/src: Revert removed TilesInUse code in PartitionInit.
driver:src:lite: Initialize NumRows to Default Value
driver: src: Clock ungate only the requested tiles
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driver: src: close memtile fd & unmapped memory associated with memtile
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net: macb: Fix missing wakeup attribute on zu+ and versal
media: dt-bindings: ov8856: decouple lanes and link frequency from driver
dt-bindings: serial: rs485: Add rs485-rts-active-high
media: dt-bindings: ti,ds90ub960: Add missing type for "i2c-alias"
ASoC: dt-bindings: Simplify port schema
dt-bindings: display: panel: one file of all simple LVDS panels with dual ports
ASoC: dt-bindings: Simplify referencing dai-params.yaml
dt-bindings: Drop kernel copy of common reserved-memory bindings
dt-bindings: iio: honeywell,mprls0025pa: drop ref from pressure properties
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driver: src: Mark TilesInUse bitmap in PartitionInit
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Rework the meta-virtualization qemu extensions implemented in the
meta-xilinx-core layer. It was found that is a bug in the langdale
meta-virtualization. Due to this, we need to use BBMASK to exclude
the changes from that layer, and then repeat them, but only for
qemu 7.1. qemu 8.1 work is taken from the current master version
of meta-virtualization.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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