| Commit message (Collapse) | Author | Age | Files | Lines |
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driver: src: Disabled dump logs
driver: src: global: Fix incorrect number of resources
driver: src: stream_switch: Fix port verify for AIEML
driver: src: fixed build error for decoupling flow
driver: src: lite: Implemented lite version of _XAie_PmIsTileRequested() for AIE
driver: src: Add support for system device-tree flow
driver: src: Added Runtime clock gating Add runtime clock gating ioctl calls
fal: src: rsc: Fix getEvent broadcast logic to support memtiles
fal: data: Update version to 1.4
driver: src: Update minor version for 2023.1
driver: src: Compiler warning fix
driver: src: io_backend: Work around to fix infinite loop
driver: src: perfcnt: Add API to get counter offest
driver: src: Cleaned up the driver of ToDo/FixMe comments. fal:src: Cleaned up the fal of ToDo/FixMe comments.
driver: src: Add API to read DMA Bd metadata
driver: src: io_backend: Add workaround to fix trace timeline
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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When processing all of the entries in CC_DTBS_DUP an error should be
thrown if the target dtb file is not found.
Signed-off-by: John Toomey <john.toomey@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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changelog:
VITIS-8128 Update help Menu generator for SubCmds (#7568)
updating XRT as per changed metadata field (#7565)
Added check for cfg_cu payload_size to be within MAX_CQ_SLOT_SIZE in xocl_kds.c (#7552)
Fix out of order output for hardware contexts in memory report (#7559)
device process unable to connect to XRT (#7569)
CR-1162610 - Add V80's PCIe device ID to xocl driver (#7567)
Added changes to AIE Trace flushing for PCIe devices (#7554)
Vitis-7922 Synchronization of run objects between devices and processes (#7561)
Minor profiling refactoring, and fix issue with identifying AIE applications (#7553)
VITIS-8748 Improve format of configuration JSON (#7547)
Rename and expand AIE status (#7545)
Signed-off-by: saumya garg <saumyag@xilinx.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Remove the biffunc dict which was used to map arch to a specific bif
creation function and replace with simple if/elif/else logic. The
default bif file functions are defined for zynq/zynqmp and versal as
well as and empty default function which could be redefined in a
bbappend with new logic or mapped back to one of the existing
functions.
Signed-off-by: John Toomey <john.toomey@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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fix(zynqmp): make zynqmp_devices structure smaller
feat(versal-net): add support for SMCC ARCH SOC ID
feat(versal): add support for SMCC ARCH SOC ID
refactor(versal-net): move macros to common header
feat(xilinx): add support to get chipid
fix(versal-net): fix BLXX memory limits for user defined values
fix(versal): fix BLXX memory limits for user defined values
fix(zynqmp): fix BLXX memory limits for user defined values
feat(xilinx): fix IPI calculation for Versal/NET
feat(xilinx): setup local/remote id in header
feat(xilinx): clean macro names
fix(zynqmp): do not export apu_ipi
fix(zynqmp): remove unused headers
feat(xilinx): move IPI related macros to plat_ipi.h
feat(versal-net): add the IPI CRC checksum macro support
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Fix an issue that results in:
Traceback (most recent call last):
File "Var <DEPENDS>", line 1, in <module>
bb.data_smart.ExpansionError: Failure expanding variable DEPENDS, expression was pkgconfig-native glib-2.0-native zlib-native ninja-native meson-native pixman-native qemu-xilinx-native bison-native ninja-native meson-native qemu-xilinx-multiarch-helper-native${@' pmu-rom-native' if 'xilinx' in d.getVar('LICENSE_FLAGS_ACCEPTED').split() else ''} alsa-lib-native dtc-native libgcrypt-native libslirp-native which triggered exception AttributeError: 'NoneType' object has no attribute 'split'
The variable dependency chain for the failure is: DEPENDS
This only occurs if no LICENSE_FLAGS_ACCEPTED is defined. This should not be
a blocking error. Instead the user is warned of reduced functionality and we
continue the build.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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feat(zynqmp): make stack size configurable
feat(zynqmp): add hooks for custom runtime setup
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Each of these dependencies need to be based on preferred_provider.
A hard dependency on u-boot-xlnx-uenv is not required to use qemu.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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changelog:
Moved from 2023.1 branch to master for 2023.2 release
Signed-off-by: rbramand <rbramand@xilinx.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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update the generic boot script to support xspi1 for versal-net platform.
Signed-off-by: Swagath Gadde <swagath.gadde@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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gen_plnx_machine.py: Use :linux override for EXTRA_DT_FILES
Kconfig-aarch64.part:rootfsconfig_zynqmp: Remove watchdog-init menu config entry in rootfs config
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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A missing space was causing:
Unable to get checksum for device-tree SRC_URI entry system.dtsizynqmp-openamp.dtsi: file could not be found
Switch from expanding the value to using the variable. This ensure checksums
are preserved.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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The SRC_URI setting is automatic with usage of EXTRA_OVERLAYS, plus
the SRC_URI should have been an append. This could have brokenprevious
SRC_URI settings so remove it and revert to default behavior.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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BASE_DTS, and DTB_FILE_NAME default based on BASE_DTS, synced with
u-boot-xlnx. This will unify the default configuration and ensure
we get consistent results.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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If the WORKDIR == DT_FILES_PATH the copy operations will fail. Identify when
this case happens and skip the copy as unnecessary. (This is the default
configuration.)
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
Copy the EXTRA_DT_FILES and EXTRA_OVERLAYS files in prepend operation so
that it can be preprocessed.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Match the variable naming used in device-tree recipe, functionality
remains the same.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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KERNEL_INCLUDE implies a virtual/kernel dependency. Disable this, as our
device-tree recipe does not use the Linux kernel. This greatly speeds up
the build process.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Move from declaring DT_FILES_PATH to the CONFIG_DTFILE dirname, to the
default where it is set to S. This adds the requirement that CONFIG_DTFILE
_must_ be self contained (or preprocessed).
This prevents the system from compiling any other dts (or dtsi) files
located in that directory, to only the ones we've specifically requested.
Additionally this simplifies the check_devicetree_variables, as hashing
and file validation are now done for us by the fetchers.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Add documentation for SYSTEM_DTFILE, CONFIG_DTFILE, EXTRA_DT_FILE.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Move common dt implementation from meta-xilinx-tools to
meta-xilinx-core layer. With this using extra dtsi and overlays
feature can be used in both SDT and XSCT builds.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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versal: Add support for xqvm1502
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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gen_yocto_machine.py: Add config option for INCLUDE_MACHINE_NAME
gen-machineconf: Update Copyright year
gen_yocto_machine.py: Include SOC_VARIANT specific machine file
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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The xrt_git.bbappend was in the wrong directory and was not applying the
correct changes to enable the AI Engine. Move the bbappen into the xrt
subdirectory will correct this.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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get_config.py: Display stdout in run_cmd
Remove unused IMAGE_FSTYPES assignment
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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versal: Add support for xcvc1502
versal: Add support for xcvm1302
versal: Add support for xcvm1402
versal: Add support for xcvp1502
versal: Add support for xcvm2302
versal: Add support for xcvm2902 device
versal: Add support for xcvp1702 device
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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hw/nvram: Add get_u32 abstraction to Xilinx eFuse
xlnx-efuse: Add get_u32 abstraction
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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mdio: handle 16 bit mdio writes
versal: efuse: Block reset from setting 2 registers
hw/nvram: Fix incorrect guest-error log from Xilinx Zynqmp eFuse
hw/nvram: Fix incorrect guest-error log from Xilinx Versal eFuse
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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gen_config.py: Generate TUNE_FEATURES based on XSA params
gen_plnx_machine.py: regenerating the configs
gen_config.py: adding new type to get_config_value
gen_plnx_machine.py: Reformat using autopep8
gen-machineconf: Update --menuconfig arg
gen_config.py: Generate the multi config targets dynamically
config_zynqmp:remove the default muticonfig targets
config_versal:remove the default muticonfig targets
Kconfig.part:remove static yocto multiconfigs
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Changes from 2023.1 branch:
arm64: dts: versal-net: Fix msi controller node name
arm64: zynqmp: remove snps,enable_guctl1_resume_quirk quirk for usb
arm64: xilinx: Fix indentation and trailing spaces in dts
arm64: zynqmp: Assign TSU clock frequency for KV and KD boards
arm64: zynqmp: Assign TSU clock frequency for KR260
arm64: zynqmp: Remove interrupt/reg-names for AMS
arm64: zynqmp: Rename ams_ps/pl node names
arm64: zynqmp: Remove ltc2954 node from DT
arm64: zynqmp: Fix gpio comment about No of gpios
Revert "spi: zynqmp_qspi: Remove enabling interrupts code"
arm64: zynqmp: Update the i2c0 node for zcu1285
arm64: versal_net: Update RMII property
arm64: versal-net: Update spi-tx-bus-width to 4
arm64: versal-net: Update spi-max-freq to 150Mhz
arm64: versal-net: Add new parallel DT binding for tenzing se9 board
arm64: zynqmp: Add new parallel DT binding for ZC1751+DC1 board
arm64: versal: Enable ADIN ethernet phy
arm64: zynqmp: Enable ADIN ethernet phy
arm64: versal-net: dts: add cpuidle node
cmd: sf/nand: Print and return failure when 0 length is passed
arm64: zynqmp: Fix User MTD partition size
xilinx: dts: Fix open drain warning on Zynq, ZynqMP and Versal
arm: xilinx: Setting default i2c clock frequency to 400kHz
arm: dts: versal-net: add usb-wakeup interrupt in dwc-xilinx core
arm: dts: versal-net: add ref_clk property for REFCLKPER calculation
test: py: tests: Add test case for USB device
test: py: tests: Add dhcp abort test
test: py: tests: Add pxe command test
Signed-off-by: Varalaxmi Bingi <varalaxmi.bingi@amd.com>
Added changelog above.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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gen-machineconf: decode has been removed in python 3.10
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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name
libomxil-xlnx change:
chore: update to revision d20230406
libvcu-xlnx changes:
Update name of ctrlsw level test application binaries
chore: update to revision d20230406
Revert "Update name of ctrlsw level test application binaries"
vcu-firmware changes:
chore: update to revision d20230405
Signed-off-by: Neel Gandhi <neel.gandhi@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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hw/nvram: Avoid unnecessary Xilinx eFuse backstore write
xlnx-efuse: Avoid unnecessary backstore write
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Update aiefal version to match what is present in Vitis tools.
Signed-off-by: Gregory Williams <gregory.williams@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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usb: dwc3: otg: Enable OTG support in dwc3-core driver
usb: dwc3: fixed OTG feature failure for xilinx platform
usb: dwc3: core: disable 3.0 clock when operating in 2.0 device mode
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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changelog :
CR-1150767 Fix for clock throttling documentation. (#7502) (#7505)
reporting 1 or 2 MEM tile channels (#7497)
Signed-off-by: rbramand <rbramand@xilinx.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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mtd: spi-nor: Fix flash lock failure in Macronix flashes
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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Makefile: Add auto-gen-dts target
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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versal-pmx-iou-slcr: Init the mux configuration
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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