summaryrefslogtreecommitdiffstats
path: root/meta-xilinx-pynq
Commit message (Collapse)AuthorAgeFilesLines
* layer.conf: compatible with gatesgarth onlyMark Hatle2021-04-201-1/+1
| | | | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* ultra96: Using BOARD level hiearchy for ultra96 overridesJaewon Lee2020-12-223-3/+5
| | | | | | | | Using BOARD level hierarchy to rewire ultra96 specific overrides. Each package using BOARD override has to also redefine PACKAGE_ARCH using BOARD_ARCH Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com>
* README.md: Update maintainers listSai Hari Chandana Kalluri2020-08-111-5/+1
| | | | Signed-off-by: Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com>
* layer.conf: Set layer compat to dunfell & gatesgarthSai Hari Chandana Kalluri2020-08-111-1/+1
| | | | | | Set layer compat to dunfell and gatesgarth Signed-off-by: Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com>
* python3-pynq.bb: Update PYNQ to 2.5.1Peter Ogden2020-05-186-15/+121
| | | | | | | | | | | | * Pull PYNQ from PyPI instead of from GitHub * Minor patches to PYNQ to maintain 3.5 and Yocto Compatibility * Add ZCU104 to defined boards in the xilinx-pynq bbclass * Refactor common logic for installing notebooks into xilinx-pynq bbclass * Verify that the PYNQ base overlay for the ZCU104 works * Set up correct python3 Yocto variables using python3-dir class Signed-off-by: Peter Ogden <ogden@xilinx.com> Signed-off-by: Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com>
* libcma: Fix SRC_URI definitionMark Hatle2020-04-091-1/+1
| | | | | | | | | | Issue: CR-1061547 The SRC_URI must be specified in each recipe with '=' or a similar. ?= won't work, as a default (empty) value is defined in bitbake.conf Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* pynq-ultra96-*: Add Ultra96 specific pynq example demo:Sai Hari Chandana Kalluri2019-12-096-0/+3835
| | | | | | | Add pynq-ultra96-helloworld and pynq-ultra96-bnn examples to demonstrate pynq framework on Ultra96-zynqmp boards Signed-off-by: Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com>
* meta-xilinx-pynq: Add layer to support PYNQManjukumar Matha2019-12-0915-0/+409
This layer collects Yocto recipes required to build and run PYNQ based examples using jupyter-notebooks on Zynq and ZU+ SoC's. PYNQ is an open-source project from Xilinx that makes it easy to design embedded systems with Zynq All Programmable Systems on Chips (APSoCs). Using the Python language and libraries, designers can exploit the benefits of programmable logic and microprocessors in Zynq to build more capable and exciting embedded systems. See https://github.com/Xilinx/PYNQ for more details and examples Signed-off-by: Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com> Signed-off-by: Peter Ogden <ogden@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-07-21 06:03:00 +0000