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sw_apps:versal_plm: Changed AES key registers used for secure communication
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xilplmi: update ssit secure lockdown long pulse duration
BSP: Fix XPM_EVENT_CNTRS_MASK for CortexR5
BSP: Fix xpm_counter_arm_example failure on VersalNet RPU
sw_apps:versal_aiepg2:Add configs for UFS
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sw_services: xilsecure: Add SHA example for spartanup
lwip: Fix critical section handling for riscv/mb-v
sw_services:xilloader: Updated xilloader QSPI code to make use of QSPI baudrate set in CIPS
Enhance PLM exception dump
lib: sw_apps: OpenAMP Demos: FreeRTOS: Reduce CPU usage by ceding task when waiting for kick
clk_wiz: Update the example to support get rate
clk_wiz: Add support for multiple clocks and GetRate function support
sysmonpsv: Update yaml for polled example
pciepsu: Remove static keyword from LastBusNum to allow proper reset and re-initialization of the bus
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scripts: pyesw: create_bsp: Fix race condition while calling validate hw
scripts: pyesw: build_bsp: Fix broken incremental build feature
scripts: pyesw: For Linux platform Make default generator as ninja
scripts: pyesw: create_app: Add support for --no_clangd option
scripts: pyesw: Use proper checks to avoid calling unneeded lopper calls
scripts: pyesw: Add support for logging in the scripts
xilpm: versal_common: Fix issues exposed by unit-test
freertos10_xilinx: Fix SDT flow builds by including missing header files
Freertos: fix microblaze exceptions header file path
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BSP: riscv: Fix alignment issues related to MB-V 64 bit variant
v_hdmitxss1:xhdmi_example: Add menu options for XV_HdmiRxSs1_SetUserHdcpProtocol api
v_hdmirxss1:xhdmi_example: Add menu options for XV_HdmiRxSs1_SetUserHdcpProtocol api
v_hdmirxss1: Add XV_HdmiRxSs1_SetUserHdcpProtocol() API
ufspsxc: Add support to read calibration values
ufspsxc: Update the compatible string and clock property name
sw_services: xilsfl: Update description in yaml file
sw_services: xilsfl: Update copyright
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sw_services:versal_aiepg2:Added SDT flow support
xilpm: versal_aiepg2: Add support for SDT flow
sw_services: xilsfl: Add serial flash library initial version
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hdcp22_mmult: Fix C++ linking issue
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xilsem: Updated Libxilsem.a with LTO 13.1 version build.
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sw_services:xilsecure: Added SSIT support for RSA, ECDSA and SHA client libraries APIs
sw_apps: img_rcvry: Added link status check to handle ethernet errors
sw_services:xilplmi:EAM updates for versal_aiepg2
xilnvm: Update ppk-hash 384 bit programming for versal_aiepg2
sw_services:xilpuf: Format code using checkpatch
sw_services:xilpuf: Fix capturing key ready and AUX value
lwip : add phy dt node support
xilpm: versal_aiepg2: Add stub API for LLC flush in CMN block
sw_apps:versal_plm: Modified XPlm_ExceptionHandler for external linkage
xxvethernet : Increment Driver Version
emaclite : Increment Driver Version
axiethernet : Increment Driver Version
Add C++ Linkage Guards
FBW Driver: Removed tab from Yaml file
lib: sw_apps: OpenAMP Demos: Add support for repeat attach/detach
rpmsg_virtio: rpmsg_deinit_vdev: Add check for empty endpoint list
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Move all rfsoc apps from meta-petalinux layer as these apps are
independent of xsct or sdt builds.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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i3cpsx: Use macros instead of hard code values
i3cpsx: Update the driver version
sw_services: xilloader: Check configuration limiter during secure boot
sw_services: xilnvm: Provisioning Configuration Limiter parameters
dp14txss: Updated the GT quad address macro in the pt and txo application due to change of the macro in gt quad.
xilsecure: Add RsaPrivateDecrypt for Versal_AiePg2
xilpm: versal_net: Add API for LLC flush in CMN block
scripts: Add support for ASU processor
bsp: Move the platform specific macro definitions from toolchain and scripts to bspconfig
sw_services:xilloader: Fixed build issue
sw_services:xilpuf: Add xilpuf library support for spartan ultrascale plus
sw_services:xilsecure: Add xilsecure library support for spartan ultrascale plus
sw_services:xilnvm: Add xilnvm library support for spartan ultrascale plus
xilpm: versal_common: server: Add new APIs for subsystem specific address management
xilpm: versal_common: server: Handle memory region nodes for default subsystem
xilpm: versal_common: server: Add API for new memory region nodes
sw_services:xilsecure:Add Key Transfer to ASU via IPI
sw_services: xilloader: Add support for loading CDO after secure boot
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sw_services: xilcert: Remove HwType for Versal Gen2 devices
FBW MDD: Updated MDD file to increment driver version
FBW TCL: Parameter generation support for configtable in driver
FBW Driver: Added Y_U_V12, alpha and tile format support to FBW driver
FBR MDD: Updated MDD file to increment driver
FBR TCL: Parameter generation support for configtable in driver
FBR Driver: Added Y_U_V12, alpha and tile format support to FBW driver
spi: Add logic to wait for FIFO reset to complete
spi: Updated the driver version
Video_Common: Added Tileformat support to video common
esw: set default compiler flags in the toolchain file itself
pciepsu: Add alignment support for requested BARs
xilsecure: SDT updates for Versal_AiePg2
sw_services:xilplmi:CFI selective readback command addition
drivers: ospipsv: add spartanup device support
drivers: csudma: add spartanup device support
Revert "sw_services: xilloader: Add support for loading CDO after secure boot."
bsp: standalone: add spartanup device support
CDO Error format for cmd resume fail is changed to XPLMI_ERR_CDO_CMD(0x2XXX)
spartanup_plm: plm app support
dma: Fix missing extern C keyword from header files
dma: Increment driver version of dma drivers
sw_services: xilloader: Add support for loading CDO after secure boot.
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zdma: Fix dma-mode properties in the yaml
xdmapcie: Add alignment support for requested BARs
zynq: Remove openamp and libmetal support for Zynq-7000 SoC
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mipicsiss: example: sp701: Add support for SDT support
drivers: emacps: example: Use all queues for sending packets.
drivers: emacps: Configure all queues
drivers: emacps: Resolve interrupts from all Queues
drivers: emacps: Refactor interrupt APIs
drivers: emacps: Get the number of Queues on a device
drivers: emacps: Add indexing macros for multi queue
drivers: emacps: Add new register offsets and bit fields
sw_services: xilnvm: Add support to read/write efuses via IPI
sw_services: xilnvm: Cleaned up code
sw_services: xilcert: Add TCB Info extension for DevIk CSR
lwip : Fix include path for debug header
sw_services:xilsecure: Added SSIT support for kat client APIs
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Add LAYERBASE_xilinx-standalone variable so that files from
meta-xilinx-standalone can be accessed from other layers.
Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
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xilpm: versal: server: Handle No-OP isolation commands
sw_services: xilocp: Fix update in DevAkIndex array
mbox: Optimize wait time with timeout reduction and usleep() inclusion.
XilinxProcessorIPLib:drivers:trngpsx: Fix for security review comments
sw_services: xilsecure: Optimize xilsecure_versal_ecdsa_client_example code
bsp: standalone: common: Add bit helper functions
freertos10_xilinx: Enable exceptions after starting the timer
v_hdmirxss: RxOnly: Fix Rxonly application for different platforms
XilSem: Update API call as per XilSecure API interface
sysmonpsu: Missing null ptr assert check added
freertos10_xilinx: Fixed source code-format issue.
freertos10_xilinx: Fix interrupt example for SDT flow
freertos10_xilinx: Port FreeRTOS based interrupt APIs to SDT flow
freertos10_xilinx: Update minor version
sw_services: xilsecure: Validate command and payload before use
xilpm: versal: update failure logic
axicdma: Update dependency properties in the yaml
xilsecure: Add CMakeList for trng core feature
xilsecure: standalone: SDT flow support
xilocp: Disable KeyUnwrap for Versal_AiePg2 and update XOcp_GenSubSysDevAk call in xilloader
xilsecure: Fix SDT flow for VersalNet
zdma: Fix SDT checks for interrupt header inclusion
zdma: Increment driver version
xilsecure: Fix SDT flow for Versal and ZynqMp
xilloader: Sha3Lookup for Sha3 engine1 to intialize the CfgPtr
xilsecure: tcl updates for refactored xilsecure library
csudma: Update csudma yaml file with ASUDMA0 and 1 differentiation
csudma: Add support for ASU DMA0 and DMA1
versal_plm: plm build updates with refactoring updates for versal_aiepg2
xilloader: HashBlock Authentication and Encryption flow for versal_aiepg2
xilplmi: Code refactoring changes for xilplmi
xilpdi: Code refactoring for versal, versal_net and versal_aiepg2
xilsecure: Refactor xilsecure library for versal, versal_net and versal_aiepg2
ZynqMp: XilSecure: Copied xsecure_rsa files to ZynqMp folder
xilffs: examples: Add example to test UFS interface
xilffs: Add support for UFS interface
sw_services:versal_aiepg2 support to embeddedsw
xilpm: src: Add support of versal_aiepg2 platform
sysmonpsv: Missing null ptr assert check added
xilpm: versal_net: server: Fix resume-safe pm_init_node handler
sw_services: xiltimer: Update minor version
xilocp: When XPPU is not enabled by default, dont restore aperture configurations
lib: sw_apps: OpenAMP: Add FreeRTOS support to apps
scripts: pyesw: Move OpenAMP Lopper logic to create_app
lib: sw_apps: OpenAMP Demos: sdt: Move SDT specific cmake logic to Vitis-specific files
sw_services: xilsecure: Add major error code for RSA keypair generation
dp21txss: Add XDpTxSs_GetSinkCapabilities API
dp21: Add XDp_TxGetSinkCapabilities API
sysmonpsv: Supply and Voltage Averaging APIs added
lib: Add missing config parameter zynqmp_fsbl_bsp support in SDT flow
scripts: pyesw: create_app: Pass stdin configuration information to the assist in case of peripheral test template
esw: Update the FILENAME macro to fix the executable size issue in sdt flow
lib: bsp: standalone: Update the microblaze hardware exception handling in SDT flow
XilinxProcessorIPLib: drivers: intc: Fix the SDT flow size issues
drivers: emacps: Increment driver version
drivers: emacps: update copyright year
drivers: emacps: Print final stats
drivers: emacps: Transmit/receive multiple packets
drivers: emacps: Format code using checkpatch.
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Also add imgsel wrapper allowing for the correct image-selector recipe
to be built depending if the XSCT or SDT flow is in use
Signed-off-by: John Toomey <john.toomey@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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This reverts commit 2b91077d9e7d5677b1cbcaddbf0d209613d089dc.
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sysmonpsv: Supply and Voltage Averaging APIs added
lib: Add missing config parameter zynqmp_fsbl_bsp support in SDT flow
scripts: pyesw: create_app: Pass stdin configuration information to the assist in case of peripheral test template
esw: Update the FILENAME macro to fix the executable size issue in sdt flow
lib: bsp: standalone: Update the microblaze hardware exception handling in SDT flow
XilinxProcessorIPLib: drivers: intc: Fix the SDT flow size issues
drivers: emacps: Increment driver version
drivers: emacps: update copyright year
drivers: emacps: Print final stats
drivers: emacps: Transmit/receive multiple packets
drivers: emacps: Format code using checkpatch.
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sw_services: xilsecure: Attest RSA public key with DevAk private key
sw_services: xilocp: Generate certificate for additional DevAk
sw_services: xilocp: Attestation with additional DevAk for KeyWrap
sw_services: xilocp: Support to generate additional DevAk per subsystem
sw_services: xilocp: Get personalization string for additional DevAK
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sw_services:xilplmi: Fixed misrac and coverity violations in secure plm to plm communication additions
sw_services:xilplmi:Enabled server mode as default mode for glitch detection
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sysmonpsu: Fix on OT upper threshold value set and get
BSP: microblaze: Fix microblaze_disable_interrupts in SDT flow
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Yocto Project has changed the optimization settings in poky commit
1cf0974ad242f7eb2815a4ef0e3e5b6507ca56ea
Since the settings match the Yocto Project defaults, remove them. If we
need to default for size in the future, we can re-implement this using the
current approach.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
(cherry picked from commit b7708778180849caa972a6ccebc01aa60d97ddfb)
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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Renamed u-boot-xlnx to make it clear this is 2024.2 work.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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Updated commit ID to latest HEAD
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Updated commit ID to latest HEAD
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