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* zynqmp-pmu.conf: Upgrade tune to use Microblaze v10.0Alejandro Enedino Hernandez Samaniego2019-12-131-1/+1
| | | | Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com>
* Update recipes for 2019.2 releaseJaewon Lee2019-12-094-4/+5
| | | | | | | | | | | Update u-boot, kernel, ATF, QEMU, pmu-firmware, multimedia recipes for 2019.2 release. The patch also upgrades gcc microblaze, newlib and libgloss versions. Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com> Signed-off-by: Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
* Add me to the maintainers listSai Hari Chandana Kalluri2019-11-191-0/+1
| | | | | Signed-off-by: Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* Add me to the maintainers listMark Hatle2019-11-181-0/+1
| | | | Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
* meta-xilinx-standalone: Update layer compatibility to warrior releaseAlejandro Enedino Hernandez Samaniego2019-08-161-1/+1
| | | | | Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
* Update recipes for Xilinx v2019.1 releaseJaewon Lee2019-08-151-6/+3
| | | | | | | | | | | | | | Update components for 2019.1 release - u-boot-xlnx - linux-xlnx - arm-trusted-firmware - QEMU - recipes-multimedia/vcu - xrt and zocl - pmu-firmware Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
* pmu-firmware: Fix pmu-firmware build to include backend code for ZynqMP FPGA ↵Andreas Galauner2019-03-041-0/+3
| | | | | | | | | | | | | | configuration Move the appropriate backend code for the ZynqMP FPGA configuration from the interface subdirectory of the xilfpga library into the src directory so that the files are picked up by the Makefile. Otherwise the FPGA configuration code is non-functional. Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net> Tested-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Andreas Galauner <andreas@galauner.de> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
* pmu-firmware: Port pmu-firmware recipeAlejandro Enedino Hernandez Samaniego2019-01-011-0/+71
| | | | | | | | | | | | | This patch ports the pmu-firmware recipe from meta-xilinx-bsp to be used with the standalone/baremetal toolchain and also upgrades it to the latest release at this point. The recipe was trimmed down, and a few changes had to be made to make it compatible with the baremetal layer, DEPENDS, pass include dir, license and such. Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
* newlib: Add xilinx linker to newlib and libglossAlejandro Enedino Hernandez Samaniego2019-01-012-0/+10
| | | | | | | | Modifies the CC variable so the Xilinx linker is found correctly when building newlib and libgloss. Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
* libgloss: Copy libgloss as libxil to avoid linking issuesAlejandro Enedino Hernandez Samaniego2019-01-011-0/+4
| | | | | | | | | | | Upstream gcc expects to have libxil available when linking, we can get the required symbols (weak) from libgloss. We copy libgloss as libxil to comply with upstream behavior and avoid linking errors. Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
* Adds gcc bbappend to fix configure options, and enable --sysroot behaviorAlejandro Enedino Hernandez Samaniego2019-01-011-0/+18
| | | | | Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
* meta-xilinx-standalone: Create layer, distro and machine to build standalone ↵Alejandro Enedino Hernandez Samaniego2019-01-014-0/+92
components This layer is meant to augment Yocto/OE functionality to provide a toolchain to build standalone components for Xilinx architectures. Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com> Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>