From 50ed79670d32372d86e3d904fa0c0d0f8262684c Mon Sep 17 00:00:00 2001 From: Nathan Rossi Date: Mon, 20 Apr 2015 16:38:00 +1000 Subject: u-boot-zynqmp-mainline_2015.04: Update to final tag * Remove ZynqMP patch as it was accepted and part of the v2015.04 release Signed-off-by: Nathan Rossi --- .../0001-arm64-Add-Xilinx-ZynqMP-support.patch | 597 --------------------- .../u-boot/u-boot-zynqmp-mainline_2015.04.bb | 11 +- 2 files changed, 3 insertions(+), 605 deletions(-) delete mode 100644 recipes-bsp/u-boot/u-boot-zynqmp-mainline/0001-arm64-Add-Xilinx-ZynqMP-support.patch diff --git a/recipes-bsp/u-boot/u-boot-zynqmp-mainline/0001-arm64-Add-Xilinx-ZynqMP-support.patch b/recipes-bsp/u-boot/u-boot-zynqmp-mainline/0001-arm64-Add-Xilinx-ZynqMP-support.patch deleted file mode 100644 index 7aa42664..00000000 --- a/recipes-bsp/u-boot/u-boot-zynqmp-mainline/0001-arm64-Add-Xilinx-ZynqMP-support.patch +++ /dev/null @@ -1,597 +0,0 @@ -From 87adcf00f0718fe99578f58e9bba9aa5785803a8 Mon Sep 17 00:00:00 2001 -From: Michal Simek -Date: Thu, 15 Jan 2015 10:01:51 +0100 -Subject: [PATCH] arm64: Add Xilinx ZynqMP support - -Add basic Xilinx ZynqMP arm64 support. -Serial and SD is supported. -It supports emulation platfrom ep108 and QEMU. - -Signed-off-by: Michal Simek ---- - MAINTAINERS | 6 ++ - arch/arm/Kconfig | 5 + - arch/arm/cpu/armv8/Makefile | 1 + - arch/arm/cpu/armv8/zynqmp/Makefile | 9 ++ - arch/arm/cpu/armv8/zynqmp/clk.c | 49 ++++++++++ - arch/arm/cpu/armv8/zynqmp/cpu.c | 28 ++++++ - arch/arm/include/asm/arch-zynqmp/clk.h | 13 +++ - arch/arm/include/asm/arch-zynqmp/hardware.h | 52 +++++++++++ - arch/arm/include/asm/arch-zynqmp/sys_proto.h | 15 +++ - board/xilinx/zynqmp/Kconfig | 15 +++ - board/xilinx/zynqmp/MAINTAINERS | 6 ++ - board/xilinx/zynqmp/Makefile | 8 ++ - board/xilinx/zynqmp/zynqmp.c | 90 ++++++++++++++++++ - configs/xilinx_zynqmp_defconfig | 14 +++ - include/configs/xilinx_zynqmp.h | 134 +++++++++++++++++++++++++++ - 15 files changed, 445 insertions(+) - create mode 100644 arch/arm/cpu/armv8/zynqmp/Makefile - create mode 100644 arch/arm/cpu/armv8/zynqmp/clk.c - create mode 100644 arch/arm/cpu/armv8/zynqmp/cpu.c - create mode 100644 arch/arm/include/asm/arch-zynqmp/clk.h - create mode 100644 arch/arm/include/asm/arch-zynqmp/hardware.h - create mode 100644 arch/arm/include/asm/arch-zynqmp/sys_proto.h - create mode 100644 board/xilinx/zynqmp/Kconfig - create mode 100644 board/xilinx/zynqmp/MAINTAINERS - create mode 100644 board/xilinx/zynqmp/Makefile - create mode 100644 board/xilinx/zynqmp/zynqmp.c - create mode 100644 configs/xilinx_zynqmp_defconfig - create mode 100644 include/configs/xilinx_zynqmp.h - -diff --git a/MAINTAINERS b/MAINTAINERS -index 1f77359..d2becd2 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -178,6 +178,12 @@ S: Maintained - F: arch/arm/cpu/armv7/zynq/ - F: arch/arm/include/asm/arch-zynq/ - -+ARM ZYNQMP -+M: Michal Simek -+S: Maintained -+F: arch/arm/cpu/armv8/zynqmp/ -+F: arch/arm/include/asm/arch-zynqmp/ -+ - AVR32 - M: Andreas Bießmann - S: Maintained -diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig -index 986b4c5..3d01775 100644 ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -719,6 +719,10 @@ config ZYNQ - select CPU_V7 - select SUPPORT_SPL - -+config TARGET_XILINX_ZYNQMP -+ bool "Support Xilinx ZynqMP Platform" -+ select ARM64 -+ - config TEGRA - bool "NVIDIA Tegra" - select SUPPORT_SPL -@@ -998,6 +1002,7 @@ source "board/vpac270/Kconfig" - source "board/wandboard/Kconfig" - source "board/woodburn/Kconfig" - source "board/xaeniax/Kconfig" -+source "board/xilinx/zynqmp/Kconfig" - source "board/zipitz2/Kconfig" - - source "arch/arm/Kconfig.debug" -diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile -index 0c10223..dee5e25 100644 ---- a/arch/arm/cpu/armv8/Makefile -+++ b/arch/arm/cpu/armv8/Makefile -@@ -16,3 +16,4 @@ obj-y += tlb.o - obj-y += transition.o - - obj-$(CONFIG_FSL_LSCH3) += fsl-lsch3/ -+obj-$(CONFIG_TARGET_XILINX_ZYNQMP) += zynqmp/ -diff --git a/arch/arm/cpu/armv8/zynqmp/Makefile b/arch/arm/cpu/armv8/zynqmp/Makefile -new file mode 100644 -index 0000000..a997e04 ---- /dev/null -+++ b/arch/arm/cpu/armv8/zynqmp/Makefile -@@ -0,0 +1,9 @@ -+# -+# (C) Copyright 2014 - 2015 Xilinx, Inc. -+# Michal Simek -+# -+# SPDX-License-Identifier: GPL-2.0+ -+# -+ -+obj-y += clk.o -+obj-y += cpu.o -diff --git a/arch/arm/cpu/armv8/zynqmp/clk.c b/arch/arm/cpu/armv8/zynqmp/clk.c -new file mode 100644 -index 0000000..0af619d ---- /dev/null -+++ b/arch/arm/cpu/armv8/zynqmp/clk.c -@@ -0,0 +1,49 @@ -+/* -+ * (C) Copyright 2014 - 2015 Xilinx, Inc. -+ * Michal Simek -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#include -+#include -+#include -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+unsigned long get_uart_clk(int dev_id) -+{ -+ u32 ver = zynqmp_get_silicon_version(); -+ -+ switch (ver) { -+ case ZYNQMP_CSU_VERSION_EP108: -+ return 25000000; -+ } -+ -+ return 133000000; -+} -+ -+#ifdef CONFIG_CLOCKS -+/** -+ * set_cpu_clk_info() - Initialize clock framework -+ * Always returns zero. -+ * -+ * This function is called from common code after relocation and sets up the -+ * clock framework. The framework must not be used before this function had been -+ * called. -+ */ -+int set_cpu_clk_info(void) -+{ -+ gd->cpu_clk = get_tbclk(); -+ -+ /* Support Veloce to show at least 1MHz via bdi */ -+ if (gd->cpu_clk > 1000000) -+ gd->bd->bi_arm_freq = gd->cpu_clk / 1000000; -+ else -+ gd->bd->bi_arm_freq = 1; -+ -+ gd->bd->bi_dsp_freq = 0; -+ -+ return 0; -+} -+#endif -diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c -new file mode 100644 -index 0000000..6fae03c ---- /dev/null -+++ b/arch/arm/cpu/armv8/zynqmp/cpu.c -@@ -0,0 +1,28 @@ -+/* -+ * (C) Copyright 2014 - 2015 Xilinx, Inc. -+ * Michal Simek -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#define ZYNQ_SILICON_VER_MASK 0xF000 -+#define ZYNQ_SILICON_VER_SHIFT 12 -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+unsigned int zynqmp_get_silicon_version(void) -+{ -+ gd->cpu_clk = get_tbclk(); -+ -+ switch (gd->cpu_clk) { -+ case 50000000: -+ return ZYNQMP_CSU_VERSION_QEMU; -+ } -+ -+ return ZYNQMP_CSU_VERSION_EP108; -+} -diff --git a/arch/arm/include/asm/arch-zynqmp/clk.h b/arch/arm/include/asm/arch-zynqmp/clk.h -new file mode 100644 -index 0000000..d55bc31 ---- /dev/null -+++ b/arch/arm/include/asm/arch-zynqmp/clk.h -@@ -0,0 +1,13 @@ -+/* -+ * (C) Copyright 2014 - 2015 Xilinx, Inc. -+ * Michal Simek -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#ifndef _ASM_ARCH_CLK_H_ -+#define _ASM_ARCH_CLK_H_ -+ -+unsigned long get_uart_clk(int dev_id); -+ -+#endif /* _ASM_ARCH_CLK_H_ */ -diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h -new file mode 100644 -index 0000000..97fb49a ---- /dev/null -+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h -@@ -0,0 +1,52 @@ -+/* -+ * (C) Copyright 2014 - 2015 Xilinx, Inc. -+ * Michal Simek -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#ifndef _ASM_ARCH_HARDWARE_H -+#define _ASM_ARCH_HARDWARE_H -+ -+#define ZYNQ_SERIAL_BASEADDR0 0xFF000000 -+#define ZYNQ_SERIAL_BASEADDR1 0xFF001000 -+ -+#define ZYNQ_SDHCI_BASEADDR0 0xFF160000 -+#define ZYNQ_SDHCI_BASEADDR1 0xFF170000 -+ -+#define ZYNQMP_CRL_APB_BASEADDR 0xFF5E0000 -+#define ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT 0x1000000 -+ -+struct crlapb_regs { -+ u32 reserved0[74]; -+ u32 timestamp_ref_ctrl; /* 0x128 */ -+ u32 reserved0_1[53]; -+ u32 boot_mode; /* 0x200 */ -+ u32 reserved1[26]; -+}; -+ -+#define crlapb_base ((struct crlapb_regs *)ZYNQMP_CRL_APB_BASEADDR) -+ -+#define ZYNQMP_IOU_SCNTR 0xFF250000 -+#define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN 0x1 -+#define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG 0x2 -+ -+struct iou_scntr { -+ u32 counter_control_register; -+ u32 reserved0[7]; -+ u32 base_frequency_id_register; -+}; -+ -+#define iou_scntr ((struct iou_scntr *)ZYNQMP_IOU_SCNTR) -+ -+/* Bootmode setting values */ -+#define BOOT_MODES_MASK 0x0000000F -+#define SD_MODE 0x00000005 -+#define JTAG_MODE 0x00000000 -+ -+/* Board version value */ -+#define ZYNQMP_CSU_VERSION_SILICON 0x0 -+#define ZYNQMP_CSU_VERSION_EP108 0x1 -+#define ZYNQMP_CSU_VERSION_QEMU 0x3 -+ -+#endif /* _ASM_ARCH_HARDWARE_H */ -diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h -new file mode 100644 -index 0000000..d8e0ba1 ---- /dev/null -+++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h -@@ -0,0 +1,15 @@ -+/* -+ * (C) Copyright 2014 - 2015 Xilinx, Inc. -+ * Michal Simek -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#ifndef _ASM_ARCH_SYS_PROTO_H -+#define _ASM_ARCH_SYS_PROTO_H -+ -+int zynq_sdhci_init(unsigned long regbase); -+ -+unsigned int zynqmp_get_silicon_version(void); -+ -+#endif /* _ASM_ARCH_SYS_PROTO_H */ -diff --git a/board/xilinx/zynqmp/Kconfig b/board/xilinx/zynqmp/Kconfig -new file mode 100644 -index 0000000..b07932e ---- /dev/null -+++ b/board/xilinx/zynqmp/Kconfig -@@ -0,0 +1,15 @@ -+if TARGET_XILINX_ZYNQMP -+ -+config SYS_BOARD -+ default "zynqmp" -+ -+config SYS_VENDOR -+ default "xilinx" -+ -+config SYS_SOC -+ default "zynqmp" -+ -+config SYS_CONFIG_NAME -+ default "xilinx_zynqmp" -+ -+endif -diff --git a/board/xilinx/zynqmp/MAINTAINERS b/board/xilinx/zynqmp/MAINTAINERS -new file mode 100644 -index 0000000..da33340 ---- /dev/null -+++ b/board/xilinx/zynqmp/MAINTAINERS -@@ -0,0 +1,6 @@ -+XILINX_ZYNQMP BOARD -+M: Michal Simek -+S: Maintained -+F: board/xilinx/zynqmp/ -+F: include/configs/xilinx_zynqmp.h -+F: configs/xilinx_zynqmp_defconfig -diff --git a/board/xilinx/zynqmp/Makefile b/board/xilinx/zynqmp/Makefile -new file mode 100644 -index 0000000..2ab3f19 ---- /dev/null -+++ b/board/xilinx/zynqmp/Makefile -@@ -0,0 +1,8 @@ -+# -+# (C) Copyright 2014 - 2015 Xilinx, Inc. -+# Michal Simek -+# -+# SPDX-License-Identifier: GPL-2.0+ -+# -+ -+obj-y := zynqmp.o -diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c -new file mode 100644 -index 0000000..1325bca ---- /dev/null -+++ b/board/xilinx/zynqmp/zynqmp.c -@@ -0,0 +1,90 @@ -+/* -+ * (C) Copyright 2014 - 2015 Xilinx, Inc. -+ * Michal Simek -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+int board_init(void) -+{ -+ return 0; -+} -+ -+int board_early_init_r(void) -+{ -+ u32 val; -+ -+ val = readl(&crlapb_base->timestamp_ref_ctrl); -+ val |= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT; -+ writel(val, &crlapb_base->timestamp_ref_ctrl); -+ -+ /* Program freq register in System counter and enable system counter */ -+ writel(gd->cpu_clk, &iou_scntr->base_frequency_id_register); -+ writel(ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG | -+ ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN, -+ &iou_scntr->counter_control_register); -+ -+ return 0; -+} -+ -+int dram_init(void) -+{ -+ gd->ram_size = CONFIG_SYS_SDRAM_SIZE; -+ -+ return 0; -+} -+ -+int timer_init(void) -+{ -+ return 0; -+} -+ -+void reset_cpu(ulong addr) -+{ -+} -+ -+#ifdef CONFIG_CMD_MMC -+int board_mmc_init(bd_t *bd) -+{ -+ int ret = 0; -+ -+#if defined(CONFIG_ZYNQ_SDHCI) -+# if defined(CONFIG_ZYNQ_SDHCI0) -+ ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0); -+# endif -+# if defined(CONFIG_ZYNQ_SDHCI1) -+ ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1); -+# endif -+#endif -+ -+ return ret; -+} -+#endif -+ -+int board_late_init(void) -+{ -+ u32 reg = 0; -+ u8 bootmode; -+ -+ reg = readl(&crlapb_base->boot_mode); -+ bootmode = reg & BOOT_MODES_MASK; -+ -+ switch (bootmode) { -+ case SD_MODE: -+ setenv("modeboot", "sdboot"); -+ break; -+ default: -+ printf("Invalid Boot Mode:0x%x\n", bootmode); -+ break; -+ } -+ -+ return 0; -+} -diff --git a/configs/xilinx_zynqmp_defconfig b/configs/xilinx_zynqmp_defconfig -new file mode 100644 -index 0000000..8b6aa70 ---- /dev/null -+++ b/configs/xilinx_zynqmp_defconfig -@@ -0,0 +1,14 @@ -+CONFIG_ARM=y -+CONFIG_TARGET_XILINX_ZYNQMP=y -+CONFIG_CMD_BDI=y -+CONFIG_CMD_BOOTD=y -+CONFIG_CMD_RUN=y -+CONFIG_CMD_IMI=y -+CONFIG_CMD_SAVEENV=y -+CONFIG_CMD_FLASH=y -+CONFIG_CMD_ECHO=y -+CONFIG_CMD_SOURCE=y -+CONFIG_CMD_TIME=y -+CONFIG_CMD_MISC=y -+CONFIG_CMD_TIMER=y -+CONFIG_DEFAULT_DEVICE_TREE="zynqmp" -diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h -new file mode 100644 -index 0000000..d503b89 ---- /dev/null -+++ b/include/configs/xilinx_zynqmp.h -@@ -0,0 +1,134 @@ -+/* -+ * Configuration for Xilinx ZynqMP -+ * (C) Copyright 2014 - 2015 Xilinx, Inc. -+ * Michal Simek -+ * -+ * Based on Configuration for Versatile Express -+ * -+ * SPDX-License-Identifier: GPL-2.0+ -+ */ -+ -+#ifndef __XILINX_ZYNQMP_H -+#define __XILINX_ZYNQMP_H -+ -+#define CONFIG_REMAKE_ELF -+ -+/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */ -+ -+#define CONFIG_SYS_NO_FLASH -+ -+#define CONFIG_SYS_GENERIC_BOARD -+ -+/* Generic Interrupt Controller Definitions */ -+#define CONFIG_GICV2 -+#define GICD_BASE 0xF9010000 -+#define GICC_BASE 0xF9020000 -+ -+/* Physical Memory Map */ -+#define CONFIG_NR_DRAM_BANKS 1 -+#define CONFIG_SYS_SDRAM_BASE 0 -+#define CONFIG_SYS_SDRAM_SIZE 0x40000000 -+ -+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -+#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_SDRAM_SIZE -+ -+/* Have release address at the end of 256MB for now */ -+#define CPU_RELEASE_ADDR 0xFFFFFF0 -+ -+/* Cache Definitions */ -+#define CONFIG_SYS_DCACHE_OFF -+ -+#define CONFIG_IDENT_STRING " Xilinx ZynqMP" -+ -+#define CONFIG_SYS_TEXT_BASE 0x8000000 -+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) -+ -+/* Flat Device Tree Definitions */ -+#define CONFIG_OF_LIBFDT -+ -+/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */ -+#define COUNTER_FREQUENCY 4000000 -+ -+/* Size of malloc() pool */ -+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 0x400000) -+ -+/* Serial setup */ -+#define CONFIG_ZYNQ_SERIAL_UART0 -+#define CONFIG_ZYNQ_SERIAL -+ -+#define CONFIG_CONS_INDEX 0 -+#define CONFIG_BAUDRATE 115200 -+#define CONFIG_SYS_BAUDRATE_TABLE \ -+ { 4800, 9600, 19200, 38400, 57600, 115200 } -+ -+/* Command line configuration */ -+#define CONFIG_CMD_ENV -+#define CONFIG_CMD_EXT2 -+#define CONFIG_CMD_EXT4 -+#define CONFIG_CMD_FAT -+#define CONFIG_CMD_MEMORY -+#define CONFIG_DOS_PARTITION -+ -+#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) -+# define CONFIG_MMC -+# define CONFIG_GENERIC_MMC -+# define CONFIG_SDHCI -+# define CONFIG_ZYNQ_SDHCI -+# define CONFIG_CMD_MMC -+#endif -+ -+#if defined(CONFIG_ZYNQ_SDHCI) -+# define CONFIG_FAT_WRITE -+# define CONFIG_CMD_EXT4_WRITE -+#endif -+ -+/* Miscellaneous configurable options */ -+#define CONFIG_SYS_LOAD_ADDR 0x8000000 -+ -+/* Initial environment variables */ -+#define CONFIG_EXTRA_ENV_SETTINGS \ -+ "ethaddr=00:0a:35:00:01:22\0" \ -+ "kernel_addr=0x200000\0" \ -+ "initrd_addr=0xa00000\0" \ -+ "initrd_size=0x2000000\0" \ -+ "fdt_addr=0x100000\0" \ -+ "fdt_high=0x10000000\0" \ -+ "sdboot=mmcinfo && fatload mmc 0:0 f000000 system.dtb && " \ -+ "fatload mmc 0:0 f000000 Image && booti 80000 - f000000\0" -+ -+#define CONFIG_BOOTARGS "setenv bootargs console=ttyPS0,${baudrate} " \ -+ "earlycon=cdns,mmio,0xff000000,${baudrate}n8" -+#define CONFIG_PREBOOT "run bootargs" -+#define CONFIG_BOOTCOMMAND "run $modeboot" -+#define CONFIG_BOOTDELAY 5 -+ -+#define CONFIG_BOARD_LATE_INIT -+ -+/* Do not preserve environment */ -+#define CONFIG_ENV_IS_NOWHERE 1 -+#define CONFIG_ENV_SIZE 0x1000 -+ -+/* Monitor Command Prompt */ -+/* Console I/O Buffer Size */ -+#define CONFIG_SYS_CBSIZE 2048 -+#define CONFIG_SYS_PROMPT "ZynqMP> " -+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ -+ sizeof(CONFIG_SYS_PROMPT) + 16) -+#define CONFIG_SYS_HUSH_PARSER -+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -+#define CONFIG_SYS_LONGHELP -+#define CONFIG_CMDLINE_EDITING -+#define CONFIG_SYS_MAXARGS 64 -+ -+#define CONFIG_FIT -+#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ -+ -+#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) -+ -+#define CONFIG_CMD_BOOTI -+#define CONFIG_CMD_UNZIP -+ -+#define CONFIG_BOARD_EARLY_INIT_R -+#define CONFIG_CLOCKS -+ -+#endif /* __XILINX_ZYNQMP_H */ --- -2.1.1 - diff --git a/recipes-bsp/u-boot/u-boot-zynqmp-mainline_2015.04.bb b/recipes-bsp/u-boot/u-boot-zynqmp-mainline_2015.04.bb index 5c3bcfce..43f6b03f 100644 --- a/recipes-bsp/u-boot/u-boot-zynqmp-mainline_2015.04.bb +++ b/recipes-bsp/u-boot/u-boot-zynqmp-mainline_2015.04.bb @@ -3,13 +3,8 @@ require u-boot-elf.inc DEPENDS += "dtc-native" -# This revision corresponds to the tag "v2015.04-rc1" -SRCREV = "112db9407dd338f71200beb0fc99dffa8dcb57a8" +# This revision corresponds to the tag "v2015.04" +SRCREV = "f33cdaa4c3da4a8fd35aa2f9a3172f31cc887b35" -PV = "v2015.04-rc1+git${SRCPV}" - -FILESEXTRAPATHS_prepend := "${THISDIR}/u-boot-zynqmp-mainline:" -SRC_URI_append += " \ - file://0001-arm64-Add-Xilinx-ZynqMP-support.patch \ - " +PV = "v2015.04+git${SRCPV}" -- cgit v1.2.3-54-g00ecf