From 615327fe45ce4c393b16cb040ed8451c557cfc5a Mon Sep 17 00:00:00 2001 From: "Addepalli, Siva" Date: Tue, 15 Aug 2023 12:45:37 +0530 Subject: arm-trusted-firmware : Updated SRCREV for 2023.2_7919 fix(versal-net): make pmc ipi channel as secure fix(versal): make pmc ipi channel as secure fix(versal-net): add redundant call to avoid glitches fix(versal-net): change flag to increase security chore(zynqmp): remove unused configuration from TSP fix(zynqmp): resolve runtime error in TSP chore(xilinx): reorder headers in assembly files chore(xilinx): correct kernel doc warnings for missing functions fix(xilinx): add headers to resolve compile time issue fix(xilinx): remove clock_setrate and clock_getrate api feat(versal-net): ddr address reservation in dtb at runtime feat(versal): ddr address reservation in dtb at runtime Signed-off-by: Siva Addepalli --- .../recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb index 13066f08..7120d263 100644 --- a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb +++ b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb @@ -1,5 +1,5 @@ ATF_VERSION = "2.8" -SRCREV = "f0ba7ad93cca64ca89cab9039ad76557c1db42dd" +SRCREV = "8fa10866141b488d3c257174c1cbc052aec59fac" BRANCH = "xlnx_rebase_v2.8" LIC_FILES_CHKSUM = "file://license.rst;md5=1dd070c98a281d18d9eefd938729b031" -- cgit v1.2.3-54-g00ecf