From b98e9384d61f8e19a1028c68abe7dcafd4871de8 Mon Sep 17 00:00:00 2001 From: Nathan Rossi Date: Mon, 28 Dec 2015 20:40:15 +1000 Subject: qemuzynq: Update clock work around for QEMU 2.5+ The GEM phy in QEMU 2.5+ reports a link speed of 100Mbps, which requires a slower clock. Change the fixed clock to provide a 25MHz reference. Signed-off-by: Nathan Rossi --- conf/machine/boards/qemu/qemuzynq-base.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/conf/machine/boards/qemu/qemuzynq-base.dtsi b/conf/machine/boards/qemu/qemuzynq-base.dtsi index 9d6b8c75..abb8bf51 100644 --- a/conf/machine/boards/qemu/qemuzynq-base.dtsi +++ b/conf/machine/boards/qemu/qemuzynq-base.dtsi @@ -9,14 +9,14 @@ reg = <0x0 0x40000000>; } ; ps7_axi_interconnect_0: amba@0 { - /* Setup a fixed 125 MHz clock to trick the ethernet driver */ - clk125mhz: clock { + /* Setup a fixed 25 MHz clock (100Mbps) to trick the ethernet driver */ + fixednetclk: clock { #clock-cells = <0>; compatible = "fixed-clock"; - clock-frequency = <125000000>; + clock-frequency = <25000000>; } ; ps7_ethernet_0: ps7-ethernet@e000b000 { - clocks = <&clkc 30>, <&clkc 30>, <&clk125mhz>, <&clk125mhz>, <&clkc 30>; + clocks = <&clkc 30>, <&clkc 30>, <&fixednetclk>, <&fixednetclk>, <&clkc 30>; phy-handle = <&phy0>; phy-mode = "gmii"; phy0: phy@23 { -- cgit v1.2.3-54-g00ecf