From 6ba5562dffda69db62cb4c2393f35c6b765f2d05 Mon Sep 17 00:00:00 2001 From: Mark Hatle Date: Sat, 18 Dec 2021 10:51:36 -0800 Subject: soc-versal: Add AI Edge, and HBM versal variants Signed-off-by: Mark Hatle --- meta-xilinx-bsp/conf/machine/include/soc-versal.inc | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'meta-xilinx-bsp') diff --git a/meta-xilinx-bsp/conf/machine/include/soc-versal.inc b/meta-xilinx-bsp/conf/machine/include/soc-versal.inc index 1d0b1e2e..f2a033ad 100644 --- a/meta-xilinx-bsp/conf/machine/include/soc-versal.inc +++ b/meta-xilinx-bsp/conf/machine/include/soc-versal.inc @@ -3,8 +3,10 @@ SOC_FAMILY ?= "versal" # Available SOC_VARIANT's for versal: # "prime" - Versal deafult Prime Devices -# "ai-core" - Versal AI-core Devices # "premium" - Versal Premium Devices +# "hbm" - Versal HMB Devices +# "ai-core" - Versal AI-core Devices +# "ai-edge" - Versal AI-Edge Devices SOC_VARIANT ?= "prime" -- cgit v1.2.3-54-g00ecf