From d261b05e1519bc719b3df7db14671b05c02dc0a3 Mon Sep 17 00:00:00 2001 From: Manjukumar Matha Date: Wed, 3 Oct 2018 09:03:10 -0700 Subject: tune-versal.inc: Add support for versal devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add tune file supporting versal devices. Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency Signed-off-by: Alejandro Enedino Hernandez Samaniego Signed-off-by: Manjukumar Matha --- meta-xilinx-bsp/conf/machine/include/tune-versal.inc | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 meta-xilinx-bsp/conf/machine/include/tune-versal.inc (limited to 'meta-xilinx-bsp') diff --git a/meta-xilinx-bsp/conf/machine/include/tune-versal.inc b/meta-xilinx-bsp/conf/machine/include/tune-versal.inc new file mode 100644 index 00000000..83acf6e0 --- /dev/null +++ b/meta-xilinx-bsp/conf/machine/include/tune-versal.inc @@ -0,0 +1,14 @@ +DEFAULTTUNE ?= "aarch64" +SOC_FAMILY ?= "versal" + +# Available SOC_VARIANT's for versal: +# virt + +SOC_VARIANT ?= "" + +require conf/machine/include/arm/arch-armv8.inc +require conf/machine/include/soc-family.inc + +# Linux Configuration +KERNEL_IMAGETYPE ?= "Image" + -- cgit v1.2.3-54-g00ecf