From e93a9e6f7e731953c5c576d86010f4ec1b89ae07 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 10 Apr 2024 06:14:40 +0530 Subject: embeddedsw : Updated SRCREV for 2024.1_8591 Updated sysmonpsv to 4.2 Revert "sysmonpsv: Added SSIT Support" BSP: riscv: Fix FPU context handling in trap handler vphy: Added support for DP2.1 sw_services:xilocp:Fix review comments for XOcp_DmeXppuConfig sw_services:xilloader:Fixed doxygen comments format TPG: Addition of bool library in header file bsp: cortexr52: Use PMU as default timer for Cortex-R52 sw_services: xilplmi: Fix MISRA-C violation 8.6 sw_services: xilplmi: Fix MISRA-C violation 2.2 sw_services: xilplmi: Fix MISRA-C violation 17.8 sw_services: xilplmi: Fix MISRA-C violation 10.3 mipicsiss: example: update GPIO address. sw_apps: zynqmp_pmufw: Correct typo for SOM specific macro dp21: Fix linking issues in C++ dp14: Fix linking issues in C++ dp12: Fix linking issues in C++ rfdc: NCO Frequency xilplmi: added CDO debug prints intc: Fix xintc_low_level_example for HW designs with fast interrupts --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 17e26446..74de7ea6 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -13,7 +13,7 @@ BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[git] = "${AUTOREV}" ESW_REV[2023.1] = "af784f742dad0ca6e69e05baf8de51152c396b9a" ESW_REV[2023.2] = "e847e1935dca630615e5f7dc694365a44b89699c" -ESW_REV[2024.1] = "827c36863db8e94c1b46e1f40fbc636467913589" +ESW_REV[2024.1] = "18910bd57542d5b3cdc04e4442e565e065685e88" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or 'INVALID'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From ee20318ad55fcf09e17432160dfe3bc11ffd67f1 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 10 Apr 2024 15:53:35 +0530 Subject: embeddedsw : Updated SRCREV for 2024.1_3975 zynqmp_pmufw: Update FPGA config reg status to use local buf dp21txss: Add support for octa pixel mode dp21txss: Add support for OctaPixel Mode dp21rxss: Add support for OctaPixel Mode dp21: Add support for octa pixel mode dp21: Add support for OctaPixel Mode dp21: Fix C++ warnings dp14: Fix C++ warnings sw_services:xilocp:Fix issue for getting swpcr data sw_services:xilocp: Clear memory buffer after calculating PCR xilplmi: Correct configuration read format for VP1902 device. xilsem: Correct configuration read format for VP1902. i2s: Fix C++ compilation errors sw_services: xilcert: Fixed calculation of hash in serial field xilsecure: fixed header inclusion in SDT flow dfeofdm: Update hw version emacps: Fix HwTail check in XEmacPs_BdRingFromHwRX sw_services:xilnvm:Update validation check during additional PPK programming BSP: riscv: Fix instruction cache APIs dfeprach: Update device node name usbpsu: Add doxygen and editorial fixes sw_services: xilpm: Remove usage of GSW ERROR register in BISR code esw: In SDT flow for the Microblaze processor, include libgloss in the link libraries by default sw_services:xilskey:Add description for XILSKEY_PUF_KEK_REGEN_RDY_TIMEOUT xilpm: versal_common: server: Remove PGGS2 and PGGS3 related code --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 74de7ea6..f959b382 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -13,7 +13,7 @@ BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[git] = "${AUTOREV}" ESW_REV[2023.1] = "af784f742dad0ca6e69e05baf8de51152c396b9a" ESW_REV[2023.2] = "e847e1935dca630615e5f7dc694365a44b89699c" -ESW_REV[2024.1] = "18910bd57542d5b3cdc04e4442e565e065685e88" +ESW_REV[2024.1] = "22ca729a1838c0151454948fc99d200351639415" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or 'INVALID'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 6db7ce3f5fa5eac54a6ff563cd69b1293c701491 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 12 Apr 2024 18:29:00 +0530 Subject: embeddedsw : Updated SRCREV for 2024.1_8603 xilpm: versal_common: server: Add error message for PSM-PLM version conflict lib: sw_services: versal_common: Add check for the IPI permission access in feature check API lwip : Add lwip_dhcp_does_acd_check sw_services:xilnvm:versalnet:Fix for MISRA-C Rule 8.3 sw_services:xilnvm:versalnet:Fix for coverity warning sw_services:xilnvm:versalnet:Fix MISRA-C Rule 12.1 XilSkey: efuse status bits of ultrascale devices srec_bootloader: Fix compilation error on Microblaze RISC-V xilpm: versal: server: Skip NoC clock gating consideration during the boot uartns550: Fix compilation warning of interrupt example dp14txss:zcu102_pt_hdcp: Modified applicaiton to continue without hdcp incase of wrong password entered during fetching keys from EEPROM. --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index f959b382..388855cc 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -13,7 +13,7 @@ BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[git] = "${AUTOREV}" ESW_REV[2023.1] = "af784f742dad0ca6e69e05baf8de51152c396b9a" ESW_REV[2023.2] = "e847e1935dca630615e5f7dc694365a44b89699c" -ESW_REV[2024.1] = "22ca729a1838c0151454948fc99d200351639415" +ESW_REV[2024.1] = "21678feea6c535657988b9cede10270f8bdf3695" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or 'INVALID'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 0b97d86d11f3defc08e23bfb09a9651bd5f25f76 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Mon, 15 Apr 2024 20:12:35 +0530 Subject: embeddedsw : Updated SRCREV for 2024.1_4703 update Embedded SW license 2024.1 release sw_services: xilfpga: Add doxygen fixes sysmonpsu: Add Xiltimer to CMakeLists scripts: pyesw: Enable user-driven customization of library options for xilpm trngpsv: Update trngpsv minor version trngpsx: Update trngpsx minor version sw_services: xilsecure: Update minor version number to 24.1 sw_services:xilocp: Fix DME failure sysmonpsv: Handle Secondary SLRs sw_services:xilsecure:Fix Branch Past initialization sw_services:xilsecure:Fix MISRA-C Rule 17.7 sw_services:xilsecure:Fix MISRA-C Rule 10.3 sw_services:xilsecure:Fix overrun issue sw_services: xilpm: Enable the capability to adjust bsp config flags in the Rigel flow freertos10_xilinx: Fix portPOINTER_SIZE_TYPE value for Cortex A78 scripts: pyesw: retarget_app: Add support for shared workspace use case xilpm: versal_common: server: Add a macro to exclude USB idle code bsp: Add macro to disable long values print support as needed dp12txss: examples: Fix IIC Baseaddress for new unified version dp12rxss: examples: Fix IIC Baseaddress for new unified version xilpm: versal: NoC ScanClear workaround for xcvm2152 --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 388855cc..9271bb5f 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -13,7 +13,7 @@ BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[git] = "${AUTOREV}" ESW_REV[2023.1] = "af784f742dad0ca6e69e05baf8de51152c396b9a" ESW_REV[2023.2] = "e847e1935dca630615e5f7dc694365a44b89699c" -ESW_REV[2024.1] = "21678feea6c535657988b9cede10270f8bdf3695" +ESW_REV[2024.1] = "86b2c5e38d51a98e6559799a2f25dc8c72535797" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or 'INVALID'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" @@ -23,7 +23,7 @@ LICENSE = "MIT" LIC_FILES_CHKSUM[master] = '9fceecdbcad88698f265578f3d4cb26c' LIC_FILES_CHKSUM[xlnx_rel_v2023.1_update] = '3c310a3ee2197a4c92c6a0e2937c207c' LIC_FILES_CHKSUM[xlnx_rel_v2023.2_update] = '9fceecdbcad88698f265578f3d4cb26c' -LIC_FILES_CHKSUM[xlnx_rel_v2024.1-next] = '9fceecdbcad88698f265578f3d4cb26c' +LIC_FILES_CHKSUM[xlnx_rel_v2024.1-next] = '443113d5aa8fd5facf31e9c5d25dc114' LIC_FILES_CHKSUM ??= "file://license.txt;md5=${@d.getVarFlag('LIC_FILES_CHKSUM', d.getVar('BRANCH')) or '0'}" SRC_URI = "${EMBEDDEDSW_SRCURI}" -- cgit v1.2.3-54-g00ecf From 1bb654f7de3d7a5cb061698d74ffd97b715dc1c5 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 16 Apr 2024 13:17:23 +0530 Subject: embeddedsw : Updated SRCREV for 2024.1_7987 v_hdmitxss: TxOnly: Fix compilation error with Txonly design v_hdmirxss: RxOnly: Fix compilation error with Rxonly design --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 9271bb5f..5515c117 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -13,7 +13,7 @@ BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[git] = "${AUTOREV}" ESW_REV[2023.1] = "af784f742dad0ca6e69e05baf8de51152c396b9a" ESW_REV[2023.2] = "e847e1935dca630615e5f7dc694365a44b89699c" -ESW_REV[2024.1] = "86b2c5e38d51a98e6559799a2f25dc8c72535797" +ESW_REV[2024.1] = "7a83d27befe888ee4efc1ad90fb22a884eef6700" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or 'INVALID'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf