From bfb7a67e7ded095a246b1e27142d2d8eb0531dab Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 11 Apr 2023 20:30:09 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_9251 sdps: Fix doxygen warnings freertos10_xilinx: ARM_CR5: Use group 1 interrupts for CortexR52 scugic: Use IRQ for CortexR52 interrupts by default Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 6e401591..c38d02f3 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "2e9f85579e203d76b983ff21c4294a8c3d578942" -ESW_REV[2023.2] = "f905278200ebbd408095de90611923c8314e1d1e" +ESW_REV[2023.2] = "6696e1ceced046865acc9609a3fbb807cc20e6be" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf