From e24f19564b95cd86c8a75cf193a4e0b88e80011d Mon Sep 17 00:00:00 2001 From: Manikanta Sreeram Date: Mon, 6 Mar 2023 02:45:29 -0700 Subject: Revert "xlnx-embeddedsw: Move branch to 2023.1 release" reverting as we still need to continue to use xlnx_rel_v2023.1-next branch This reverts commit 84bcd7a4dc5ba55fa74bec1bee0786ce45c049ee. Conflicts: meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index f65a02d8..2291e525 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -3,17 +3,17 @@ ESW_VER ?= "${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or 'master' REPO ??= "git://github.com/Xilinx/embeddedsw.git;protocol=https" -ESW_BRANCH[2023.1] = "xlnx_rel_v2023.1" +ESW_BRANCH[2023.1] = "xlnx_rel_v2023.1-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" -ESW_REV[2023.1] = "53e35139d56609e56451d2a7d7fe89e8040c9e52" +ESW_REV[2023.1] = "14809f266c6ec79b517d976f882ba496be3e1998" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" EMBEDDEDSW_SRCURI ?= "${REPO};${EMBEDDEDSW_BRANCHARG}" LICENSE = "MIT" -LIC_FILES_CHKSUM[xlnx_rel_v2023.1] = '15386ea7656d3b83815bce88c0bbe66d' +LIC_FILES_CHKSUM[xlnx_rel_v2023.1-next] = '15386ea7656d3b83815bce88c0bbe66d' LIC_FILES_CHKSUM ??= "file://license.txt;md5=${@d.getVarFlag('LIC_FILES_CHKSUM', d.getVar('BRANCH')) or '0'}" SRC_URI = "${EMBEDDEDSW_SRCURI}" -- cgit v1.2.3-54-g00ecf From 613cb1e39ea3dbab7ad261e3ba3c4b4da00f385b Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 7 Mar 2023 12:37:29 +0530 Subject: Updated SRCREV for 2023.1_3191 Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc | 2 +- meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.1.inc | 2 +- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc index e659e238..da3a8f91 100644 --- a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc +++ b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc @@ -3,7 +3,7 @@ SECTION = "libs" REPO ?= "git://github.com/Xilinx/aie-rt.git;protocol=https" BRANCH ?= "main-aie" -SRCREV ?= "f9c452f7b1f4b9cc8105d7d12321b294a1325087" +SRCREV ?= "a6b55e54e9af4856e7eead1bbf06f4b1afb64c0f" LICENSE = "BSD-3-Clause" LIC_FILES_CHKSUM ?= "file://license.txt;md5=b81abf1f508952331dd7d2ab36408f5b" diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.1.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.1.inc index ad25cd1d..c2c54090 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.1.inc +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.1.inc @@ -2,7 +2,7 @@ UBOOT_VERSION = "v2023.01" UBRANCH = "xlnx_rebase_v2023.01" -SRCREV = "f32d07b9b511736649314d505f6b1caaf8d4ac75" +SRCREV = "87298fde44b43e0552f0f77d7d3c1aaf4f7c9566" LICENSE = "GPL-2.0-or-later" LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897" diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 2291e525..01940e12 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -6,7 +6,7 @@ REPO ??= "git://github.com/Xilinx/embeddedsw.git;protocol=https" ESW_BRANCH[2023.1] = "xlnx_rel_v2023.1-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" -ESW_REV[2023.1] = "14809f266c6ec79b517d976f882ba496be3e1998" +ESW_REV[2023.1] = "5d75b745952f39bc4f37189257f2f228d99089f3" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 7c0f00df2c4d364635c57f2ed7c9b3a67d76ef1c Mon Sep 17 00:00:00 2001 From: Mark Hatle Date: Tue, 7 Mar 2023 07:31:23 -0800 Subject: Start 2023.2 development Signed-off-by: Mark Hatle --- ...rm-xilinx-Add-encoder-for-Digilent-boards.patch | 305 +++++++++++ ...002-clk-Add-driver-for-axi_dynclk-IP-Core.patch | 607 +++++++++++++++++++++ ...0003-drm-xilinx-Fix-DPMS-transition-to-on.patch | 54 ++ .../v2023.2/0004-minized-wifi-bluetooth.cfg | 33 ++ .../linux/linux-xlnx_2023.2.bbappend | 12 + meta-xilinx-core/conf/layer.conf | 14 +- .../libmetal/libmetal-xlnx_v2023.2.bb | 15 + .../open-amp/open-amp-xlnx_v2023.2.bb | 16 + .../arm-trusted-firmware_2023.2.bb | 8 + .../recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb | 72 +++ .../recipes-bsp/libdfx/libdfx_2023.2.bb | 23 + .../recipes-bsp/u-boot/u-boot-tools-xlnx_2023.2.bb | 21 + .../recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc | 17 + .../recipes-bsp/u-boot/u-boot-xlnx_2023.2.bb | 4 + .../qemu/qemu-devicetrees_2023.2.bb | 6 + .../recipes-devtools/qemu/qemu-xilinx-2023.2.inc | 3 + .../qemu/qemu-xilinx-native_2023.2.bb | 9 + .../qemu/qemu-xilinx-system-native_2023.2.bb | 26 + .../recipes-devtools/qemu/qemu-xilinx_2023.2.bb | 24 + .../recipes-kernel/dp/kernel-module-dp_2023.2.bb | 24 + .../hdmi/kernel-module-hdmi_2023.2.bb | 24 + .../recipes-kernel/linux/linux-xlnx_2023.2.bb | 11 + meta-xilinx-standalone-experimental/README.md | 2 +- .../classes/xlnx-embeddedsw.bbclass | 3 + .../recipes-bsp/embeddedsw/fsbl-firmware_2023.2.bb | 11 + .../recipes-bsp/embeddedsw/plm-firmware_2023.2.bb | 29 + .../recipes-bsp/embeddedsw/pmu-firmware_2023.2.bb | 16 + .../recipes-bsp/embeddedsw/psm-firmware_2023.2.bb | 34 ++ 28 files changed, 1413 insertions(+), 10 deletions(-) create mode 100644 meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch create mode 100644 meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch create mode 100644 meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch create mode 100644 meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0004-minized-wifi-bluetooth.cfg create mode 100644 meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2023.2.bbappend create mode 100644 meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2023.2.bb create mode 100644 meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2023.2.bb create mode 100644 meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb create mode 100644 meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb create mode 100644 meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.2.bb create mode 100644 meta-xilinx-core/recipes-bsp/u-boot/u-boot-tools-xlnx_2023.2.bb create mode 100644 meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc create mode 100644 meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2023.2.bb create mode 100644 meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb create mode 100644 meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2023.2.inc create mode 100644 meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native_2023.2.bb create mode 100644 meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_2023.2.bb create mode 100644 meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx_2023.2.bb create mode 100644 meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_2023.2.bb create mode 100644 meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_2023.2.bb create mode 100644 meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb create mode 100644 meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2023.2.bb create mode 100644 meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2023.2.bb create mode 100644 meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2023.2.bb create mode 100644 meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2023.2.bb (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch new file mode 100644 index 00000000..660bc218 --- /dev/null +++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch @@ -0,0 +1,305 @@ +From 21cc8144efdaa3cd8dbd7279f87b14fa3432fae4 Mon Sep 17 00:00:00 2001 +From: Jason Wu +Date: Sun, 10 Apr 2016 13:14:13 +1000 +Subject: [PATCH 1/3] drm: xilinx: Add encoder for Digilent boards + +Add the dglnt_encoder driver that enables DRM support for the VGA and +HDMI output ports found on many Digilent boards. + +Upstream-Status: Pending + +Signed-off-by: Sam Bobrowicz +Signed-off-by: Jason Wu +--- + .../bindings/drm/xilinx/dglnt_encoder.txt | 23 +++ + drivers/gpu/drm/xilinx/Kconfig | 6 + + drivers/gpu/drm/xilinx/Makefile | 1 + + drivers/gpu/drm/xilinx/dglnt_encoder.c | 217 +++++++++++++++++++++ + 4 files changed, 247 insertions(+) + create mode 100644 Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt + create mode 100644 drivers/gpu/drm/xilinx/dglnt_encoder.c + +diff --git a/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt b/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt +new file mode 100644 +index 0000000..242b24e +--- /dev/null ++++ b/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt +@@ -0,0 +1,23 @@ ++Device-Tree bindings for Digilent DRM Encoder Slave ++ ++This driver provides support for VGA and HDMI outputs on Digilent FPGA boards. ++The VGA or HDMI port must be connected to a Xilinx display pipeline via an ++axi2vid IP core. ++ ++Required properties: ++ - compatible: Should be "digilent,drm-encoder". ++ ++Optional properties: ++ - dglnt,edid-i2c: The I2C device connected to the DDC bus on the video ++ connector. This is used to obtain the supported resolutions ++ of an attached monitor. If not defined, then a default ++ set of resolutions is used and the display will initialize ++ to 720p. Note most VGA connectors on Digilent boards do ++ not have the DDC bus routed out. ++ ++Example: ++ ++ encoder_0: digilent_encoder { ++ compatible = "digilent,drm-encoder"; ++ dglnt,edid-i2c = <&i2c1>; ++ }; +diff --git a/drivers/gpu/drm/xilinx/Kconfig b/drivers/gpu/drm/xilinx/Kconfig +index 57e18a9..d9ecff2 100644 +--- a/drivers/gpu/drm/xilinx/Kconfig ++++ b/drivers/gpu/drm/xilinx/Kconfig +@@ -33,6 +33,12 @@ config DRM_XILINX_DP_SUB + help + DRM driver for Xilinx Display Port Subsystem. + ++config DRM_DIGILENT_ENCODER ++ tristate "Digilent VGA/HDMI DRM Encoder Driver" ++ depends on DRM_XILINX ++ help ++ DRM slave encoder for Video-out on Digilent boards. ++ + config DRM_XILINX_DP_SUB_DEBUG_FS + bool "Xilinx DRM DPSUB debugfs" + depends on DEBUG_FS && DRM_XILINX_DP_SUB +diff --git a/drivers/gpu/drm/xilinx/Makefile b/drivers/gpu/drm/xilinx/Makefile +index 19bc154..c2717e40 100644 +--- a/drivers/gpu/drm/xilinx/Makefile ++++ b/drivers/gpu/drm/xilinx/Makefile +@@ -7,6 +7,7 @@ xilinx_drm-y := xilinx_drm_crtc.o xilinx_drm_connector.o xilinx_drm_drv.o \ + xilinx_drm_plane.o + xilinx_drm-y += xilinx_cresample.o xilinx_osd.o xilinx_rgb2yuv.o xilinx_vtc.o + ++obj-$(CONFIG_DRM_DIGILENT_ENCODER) += dglnt_encoder.o + obj-$(CONFIG_DRM_XILINX) += xilinx_drm.o + obj-$(CONFIG_DRM_XILINX_DP) += xilinx_drm_dp.o + obj-$(CONFIG_DRM_XILINX_DP_SUB) += xilinx_drm_dp_sub.o +diff --git a/drivers/gpu/drm/xilinx/dglnt_encoder.c b/drivers/gpu/drm/xilinx/dglnt_encoder.c +new file mode 100644 +index 0000000..cb9fc7d +--- /dev/null ++++ b/drivers/gpu/drm/xilinx/dglnt_encoder.c +@@ -0,0 +1,217 @@ ++/* ++ * dglnt_encoder.c - DRM slave encoder for Video-out on Digilent boards ++ * ++ * Copyright (C) 2015 Digilent ++ * Author: Sam Bobrowicz ++ * ++ * Based on udl_encoder.c and udl_connector.c, Copyright (C) 2012 Red Hat. ++ * Also based on xilinx_drm_dp.c, Copyright (C) 2014 Xilinx, Inc. ++ * ++ * This software is licensed under the terms of the GNU General Public ++ * License version 2, as published by the Free Software Foundation, and ++ * may be copied, distributed, and modified under those terms. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define DGLNT_ENC_MAX_FREQ 150000 ++#define DGLNT_ENC_MAX_H 1920 ++#define DGLNT_ENC_MAX_V 1080 ++#define DGLNT_ENC_PREF_H 1280 ++#define DGLNT_ENC_PREF_V 720 ++ ++struct dglnt_encoder { ++ struct drm_encoder *encoder; ++ struct i2c_adapter *i2c_bus; ++ bool i2c_present; ++}; ++ ++static inline struct dglnt_encoder *to_dglnt_encoder( ++ struct drm_encoder *encoder) ++{ ++ return to_encoder_slave(encoder)->slave_priv; ++} ++ ++static bool dglnt_mode_fixup(struct drm_encoder *encoder, ++ const struct drm_display_mode *mode, ++ struct drm_display_mode *adjusted_mode) ++{ ++ return true; ++} ++ ++static void dglnt_encoder_mode_set(struct drm_encoder *encoder, ++ struct drm_display_mode *mode, ++ struct drm_display_mode *adjusted_mode) ++{ ++} ++ ++static void ++dglnt_encoder_dpms(struct drm_encoder *encoder, int mode) ++{ ++} ++ ++static void dglnt_encoder_save(struct drm_encoder *encoder) ++{ ++} ++ ++static void dglnt_encoder_restore(struct drm_encoder *encoder) ++{ ++} ++ ++static int dglnt_encoder_mode_valid(struct drm_encoder *encoder, ++ struct drm_display_mode *mode) ++{ ++ if (mode && ++ !(mode->flags & ((DRM_MODE_FLAG_INTERLACE | ++ DRM_MODE_FLAG_DBLCLK) | DRM_MODE_FLAG_3D_MASK)) && ++ (mode->clock <= DGLNT_ENC_MAX_FREQ) && ++ (mode->hdisplay <= DGLNT_ENC_MAX_H) && ++ (mode->vdisplay <= DGLNT_ENC_MAX_V)) ++ return MODE_OK; ++ return MODE_BAD; ++} ++ ++static int dglnt_encoder_get_modes(struct drm_encoder *encoder, ++ struct drm_connector *connector) ++{ ++ struct dglnt_encoder *dglnt = to_dglnt_encoder(encoder); ++ struct edid *edid; ++ int num_modes = 0; ++ ++ if (dglnt->i2c_present) { ++ edid = drm_get_edid(connector, dglnt->i2c_bus); ++ drm_connector_update_edid_property(connector, edid); ++ if (edid) { ++ num_modes = drm_add_edid_modes(connector, edid); ++ kfree(edid); ++ } ++ } else { ++ num_modes = drm_add_modes_noedid(connector, DGLNT_ENC_MAX_H, ++ DGLNT_ENC_MAX_V); ++ drm_set_preferred_mode(connector, DGLNT_ENC_PREF_H, ++ DGLNT_ENC_PREF_V); ++ } ++ return num_modes; ++} ++ ++static enum drm_connector_status dglnt_encoder_detect( ++ struct drm_encoder *encoder, ++ struct drm_connector *connector) ++{ ++ struct dglnt_encoder *dglnt = to_dglnt_encoder(encoder); ++ ++ if (dglnt->i2c_present) { ++ if (drm_probe_ddc(dglnt->i2c_bus)) ++ return connector_status_connected; ++ return connector_status_disconnected; ++ } else ++ return connector_status_unknown; ++} ++ ++static struct drm_encoder_slave_funcs dglnt_encoder_slave_funcs = { ++ .dpms = dglnt_encoder_dpms, ++ .save = dglnt_encoder_save, ++ .restore = dglnt_encoder_restore, ++ .mode_fixup = dglnt_mode_fixup, ++ .mode_valid = dglnt_encoder_mode_valid, ++ .mode_set = dglnt_encoder_mode_set, ++ .detect = dglnt_encoder_detect, ++ .get_modes = dglnt_encoder_get_modes, ++}; ++ ++static int dglnt_encoder_encoder_init(struct platform_device *pdev, ++ struct drm_device *dev, ++ struct drm_encoder_slave *encoder) ++{ ++ struct dglnt_encoder *dglnt = platform_get_drvdata(pdev); ++ struct device_node *sub_node; ++ ++ encoder->slave_priv = dglnt; ++ encoder->slave_funcs = &dglnt_encoder_slave_funcs; ++ ++ dglnt->encoder = &encoder->base; ++ ++ /* get i2c adapter for edid */ ++ dglnt->i2c_present = false; ++ sub_node = of_parse_phandle(pdev->dev.of_node, "dglnt,edid-i2c", 0); ++ if (sub_node) { ++ dglnt->i2c_bus = of_find_i2c_adapter_by_node(sub_node); ++ if (!dglnt->i2c_bus) ++ DRM_INFO("failed to get the edid i2c adapter, using default modes\n"); ++ else ++ dglnt->i2c_present = true; ++ of_node_put(sub_node); ++ } ++ ++ return 0; ++} ++ ++static int dglnt_encoder_probe(struct platform_device *pdev) ++{ ++ struct dglnt_encoder *dglnt; ++ ++ dglnt = devm_kzalloc(&pdev->dev, sizeof(*dglnt), GFP_KERNEL); ++ if (!dglnt) ++ return -ENOMEM; ++ ++ platform_set_drvdata(pdev, dglnt); ++ ++ return 0; ++} ++ ++static int dglnt_encoder_remove(struct platform_device *pdev) ++{ ++ return 0; ++} ++ ++static const struct of_device_id dglnt_encoder_of_match[] = { ++ { .compatible = "digilent,drm-encoder", }, ++ { /* end of table */ }, ++}; ++MODULE_DEVICE_TABLE(of, dglnt_encoder_of_match); ++ ++static struct drm_platform_encoder_driver dglnt_encoder_driver = { ++ .platform_driver = { ++ .probe = dglnt_encoder_probe, ++ .remove = dglnt_encoder_remove, ++ .driver = { ++ .owner = THIS_MODULE, ++ .name = "dglnt-drm-enc", ++ .of_match_table = dglnt_encoder_of_match, ++ }, ++ }, ++ ++ .encoder_init = dglnt_encoder_encoder_init, ++}; ++ ++static int __init dglnt_encoder_init(void) ++{ ++ return platform_driver_register(&dglnt_encoder_driver.platform_driver); ++} ++ ++static void __exit dglnt_encoder_exit(void) ++{ ++ platform_driver_unregister(&dglnt_encoder_driver.platform_driver); ++} ++ ++module_init(dglnt_encoder_init); ++module_exit(dglnt_encoder_exit); ++ ++MODULE_AUTHOR("Digilent, Inc."); ++MODULE_DESCRIPTION("DRM slave encoder for Video-out on Digilent boards"); ++MODULE_LICENSE("GPL v2"); +-- +2.7.4 + diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch new file mode 100644 index 00000000..9b6229db --- /dev/null +++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch @@ -0,0 +1,607 @@ +From 217e3b6f4393926b8dcad841381527ef3fc808c2 Mon Sep 17 00:00:00 2001 +From: Jason Wu +Date: Sun, 10 Apr 2016 13:16:06 +1000 +Subject: [PATCH 2/3] clk: Add driver for axi_dynclk IP Core + +Add support for the axi_dynclk IP Core available from Digilent. This IP +core dynamically configures the clock resources inside a Xilinx FPGA to +generate a clock with a software programmable frequency. + +Upstream-Status: Pending + +Signed-off-by: Sam Bobrowicz +Signed-off-by: Jason Wu +--- + drivers/clk/Kconfig | 8 + + drivers/clk/Makefile | 1 + + drivers/clk/clk-dglnt-dynclk.c | 547 +++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 556 insertions(+) + create mode 100644 drivers/clk/clk-dglnt-dynclk.c + +diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig +index dccb111100..7fe65a702b 100644 +--- a/drivers/clk/Kconfig ++++ b/drivers/clk/Kconfig +@@ -148,6 +148,14 @@ config CLK_QORIQ + This adds the clock driver support for Freescale QorIQ platforms + using common clock framework. + ++config COMMON_CLK_DGLNT_DYNCLK ++ tristate "Digilent axi_dynclk Driver" ++ depends on ARCH_ZYNQ || MICROBLAZE ++ help ++ ---help--- ++ Support for the Digilent AXI Dynamic Clock core for Xilinx ++ FPGAs. ++ + config COMMON_CLK_XGENE + bool "Clock driver for APM XGene SoC" + default y +diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile +index 0760449dde..45ce97d053 100644 +--- a/drivers/clk/Makefile ++++ b/drivers/clk/Makefile +@@ -24,6 +24,7 @@ obj-$(CONFIG_COMMON_CLK_CDCE706) += clk-cdce706.o + obj-$(CONFIG_COMMON_CLK_CDCE925) += clk-cdce925.o + obj-$(CONFIG_ARCH_CLPS711X) += clk-clps711x.o + obj-$(CONFIG_COMMON_CLK_CS2000_CP) += clk-cs2000-cp.o ++obj-$(CONFIG_COMMON_CLK_DGLNT_DYNCLK) += clk-dglnt-dynclk.o + obj-$(CONFIG_ARCH_EFM32) += clk-efm32gg.o + obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o + obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o +diff --git a/drivers/clk/clk-dglnt-dynclk.c b/drivers/clk/clk-dglnt-dynclk.c +new file mode 100644 +index 0000000000..496ad5fc90 +--- /dev/null ++++ b/drivers/clk/clk-dglnt-dynclk.c +@@ -0,0 +1,547 @@ ++/* ++ * clk-dglnt-dynclk.c - Digilent AXI Dynamic Clock (axi_dynclk) Driver ++ * ++ * Copyright (C) 2015 Digilent ++ * Author: Sam Bobrowicz ++ * ++ * Reused code from clk-axi-clkgen.c, Copyright (C) 2012-2013 Analog Devices Inc. ++ * ++ * This software is licensed under the terms of the GNU General Public ++ * License version 2, as published by the Free Software Foundation, and ++ * may be copied, distributed, and modified under those terms. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define CLK_BIT_WEDGE 13 ++#define CLK_BIT_NOCOUNT 12 ++ ++/* This value is used to signal an error */ ++#define ERR_CLKCOUNTCALC 0xFFFFFFFF ++#define ERR_CLKDIVIDER (1 << CLK_BIT_WEDGE | 1 << CLK_BIT_NOCOUNT) ++ ++#define DYNCLK_DIV_1_REGMASK 0x1041 ++/* 25 MHz (125 KHz / 5) */ ++#define DYNCLK_DEFAULT_FREQ 125000 ++ ++#define MMCM_FREQ_VCOMIN 600000 ++#define MMCM_FREQ_VCOMAX 1200000 ++#define MMCM_FREQ_PFDMIN 10000 ++#define MMCM_FREQ_PFDMAX 450000 ++#define MMCM_FREQ_OUTMIN 4000 ++#define MMCM_FREQ_OUTMAX 800000 ++#define MMCM_DIV_MAX 106 ++#define MMCM_FB_MIN 2 ++#define MMCM_FB_MAX 64 ++#define MMCM_CLKDIV_MAX 128 ++#define MMCM_CLKDIV_MIN 1 ++ ++#define OFST_DISPLAY_CTRL 0x0 ++#define OFST_DISPLAY_STATUS 0x4 ++#define OFST_DISPLAY_CLK_L 0x8 ++#define OFST_DISPLAY_FB_L 0x0C ++#define OFST_DISPLAY_FB_H_CLK_H 0x10 ++#define OFST_DISPLAY_DIV 0x14 ++#define OFST_DISPLAY_LOCK_L 0x18 ++#define OFST_DISPLAY_FLTR_LOCK_H 0x1C ++ ++static const u64 lock_lookup[64] = { ++ 0b0011000110111110100011111010010000000001, ++ 0b0011000110111110100011111010010000000001, ++ 0b0100001000111110100011111010010000000001, ++ 0b0101101011111110100011111010010000000001, ++ 0b0111001110111110100011111010010000000001, ++ 0b1000110001111110100011111010010000000001, ++ 0b1001110011111110100011111010010000000001, ++ 0b1011010110111110100011111010010000000001, ++ 0b1100111001111110100011111010010000000001, ++ 0b1110011100111110100011111010010000000001, ++ 0b1111111111111000010011111010010000000001, ++ 0b1111111111110011100111111010010000000001, ++ 0b1111111111101110111011111010010000000001, ++ 0b1111111111101011110011111010010000000001, ++ 0b1111111111101000101011111010010000000001, ++ 0b1111111111100111000111111010010000000001, ++ 0b1111111111100011111111111010010000000001, ++ 0b1111111111100010011011111010010000000001, ++ 0b1111111111100000110111111010010000000001, ++ 0b1111111111011111010011111010010000000001, ++ 0b1111111111011101101111111010010000000001, ++ 0b1111111111011100001011111010010000000001, ++ 0b1111111111011010100111111010010000000001, ++ 0b1111111111011001000011111010010000000001, ++ 0b1111111111011001000011111010010000000001, ++ 0b1111111111010111011111111010010000000001, ++ 0b1111111111010101111011111010010000000001, ++ 0b1111111111010101111011111010010000000001, ++ 0b1111111111010100010111111010010000000001, ++ 0b1111111111010100010111111010010000000001, ++ 0b1111111111010010110011111010010000000001, ++ 0b1111111111010010110011111010010000000001, ++ 0b1111111111010010110011111010010000000001, ++ 0b1111111111010001001111111010010000000001, ++ 0b1111111111010001001111111010010000000001, ++ 0b1111111111010001001111111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001, ++ 0b1111111111001111101011111010010000000001 ++}; ++ ++static const u32 filter_lookup_low[64] = { ++ 0b0001011111, ++ 0b0001010111, ++ 0b0001111011, ++ 0b0001011011, ++ 0b0001101011, ++ 0b0001110011, ++ 0b0001110011, ++ 0b0001110011, ++ 0b0001110011, ++ 0b0001001011, ++ 0b0001001011, ++ 0b0001001011, ++ 0b0010110011, ++ 0b0001010011, ++ 0b0001010011, ++ 0b0001010011, ++ 0b0001010011, ++ 0b0001010011, ++ 0b0001010011, ++ 0b0001010011, ++ 0b0001010011, ++ 0b0001010011, ++ 0b0001010011, ++ 0b0001100011, ++ 0b0001100011, ++ 0b0001100011, ++ 0b0001100011, ++ 0b0001100011, ++ 0b0001100011, ++ 0b0001100011, ++ 0b0001100011, ++ 0b0001100011, ++ 0b0001100011, ++ 0b0001100011, ++ 0b0001100011, ++ 0b0001100011, ++ 0b0001100011, ++ 0b0010010011, ++ 0b0010010011, ++ 0b0010010011, ++ 0b0010010011, ++ 0b0010010011, ++ 0b0010010011, ++ 0b0010010011, ++ 0b0010010011, ++ 0b0010010011, ++ 0b0010010011, ++ 0b0010100011, ++ 0b0010100011, ++ 0b0010100011, ++ 0b0010100011, ++ 0b0010100011, ++ 0b0010100011, ++ 0b0010100011, ++ 0b0010100011, ++ 0b0010100011, ++ 0b0010100011, ++ 0b0010100011, ++ 0b0010100011, ++ 0b0010100011, ++ 0b0010100011, ++ 0b0010100011, ++ 0b0010100011, ++ 0b0010100011 ++}; ++ ++struct dglnt_dynclk_reg; ++struct dglnt_dynclk_mode; ++struct dglnt_dynclk; ++ ++struct dglnt_dynclk_reg { ++ u32 clk0L; ++ u32 clkFBL; ++ u32 clkFBH_clk0H; ++ u32 divclk; ++ u32 lockL; ++ u32 fltr_lockH; ++}; ++ ++struct dglnt_dynclk_mode { ++ u32 freq; ++ u32 fbmult; ++ u32 clkdiv; ++ u32 maindiv; ++}; ++ ++struct dglnt_dynclk { ++ void __iomem *base; ++ struct clk_hw clk_hw; ++ unsigned long freq; ++}; ++ ++u32 dglnt_dynclk_divider(u32 divide) ++{ ++ u32 output = 0; ++ u32 highTime = 0; ++ u32 lowTime = 0; ++ ++ if ((divide < 1) || (divide > 128)) ++ return ERR_CLKDIVIDER; ++ ++ if (divide == 1) ++ return DYNCLK_DIV_1_REGMASK; ++ ++ highTime = divide / 2; ++ /* if divide is odd */ ++ if (divide & 0x1) { ++ lowTime = highTime + 1; ++ output = 1 << CLK_BIT_WEDGE; ++ } else { ++ lowTime = highTime; ++ } ++ ++ output |= 0x03F & lowTime; ++ output |= 0xFC0 & (highTime << 6); ++ return output; ++} ++ ++u32 dglnt_dynclk_count_calc(u32 divide) ++{ ++ u32 output = 0; ++ u32 divCalc = 0; ++ ++ divCalc = dglnt_dynclk_divider(divide); ++ if (divCalc == ERR_CLKDIVIDER) ++ output = ERR_CLKCOUNTCALC; ++ else ++ output = (0xFFF & divCalc) | ((divCalc << 10) & 0x00C00000); ++ return output; ++} ++ ++ ++int dglnt_dynclk_find_reg(struct dglnt_dynclk_reg *regValues, ++ struct dglnt_dynclk_mode *clkParams) ++{ ++ if ((clkParams->fbmult < 2) || clkParams->fbmult > 64) ++ return -EINVAL; ++ ++ regValues->clk0L = dglnt_dynclk_count_calc(clkParams->clkdiv); ++ if (regValues->clk0L == ERR_CLKCOUNTCALC) ++ return -EINVAL; ++ ++ regValues->clkFBL = dglnt_dynclk_count_calc(clkParams->fbmult); ++ if (regValues->clkFBL == ERR_CLKCOUNTCALC) ++ return -EINVAL; ++ ++ regValues->clkFBH_clk0H = 0; ++ ++ regValues->divclk = dglnt_dynclk_divider(clkParams->maindiv); ++ if (regValues->divclk == ERR_CLKDIVIDER) ++ return -EINVAL; ++ ++ regValues->lockL = (u32)(lock_lookup[clkParams->fbmult - 1] & ++ 0xFFFFFFFF); ++ ++ regValues->fltr_lockH = (u32)((lock_lookup[clkParams->fbmult - 1] >> ++ 32) & 0x000000FF); ++ regValues->fltr_lockH |= ((filter_lookup_low[clkParams->fbmult - 1] << ++ 16) & 0x03FF0000); ++ ++ return 0; ++} ++ ++void dglnt_dynclk_write_reg(struct dglnt_dynclk_reg *regValues, ++ void __iomem *baseaddr) ++{ ++ writel(regValues->clk0L, baseaddr + OFST_DISPLAY_CLK_L); ++ writel(regValues->clkFBL, baseaddr + OFST_DISPLAY_FB_L); ++ writel(regValues->clkFBH_clk0H, baseaddr + OFST_DISPLAY_FB_H_CLK_H); ++ writel(regValues->divclk, baseaddr + OFST_DISPLAY_DIV); ++ writel(regValues->lockL, baseaddr + OFST_DISPLAY_LOCK_L); ++ writel(regValues->fltr_lockH, baseaddr + OFST_DISPLAY_FLTR_LOCK_H); ++} ++ ++u32 dglnt_dynclk_find_mode(u32 freq, u32 parentFreq, ++ struct dglnt_dynclk_mode *bestPick) ++{ ++ u32 bestError = MMCM_FREQ_OUTMAX; ++ u32 curError; ++ u32 curClkMult; ++ u32 curFreq; ++ u32 divVal; ++ u32 curFb, curClkDiv; ++ u32 minFb = 0; ++ u32 maxFb = 0; ++ u32 curDiv = 1; ++ u32 maxDiv; ++ bool freq_found = false; ++ ++ bestPick->freq = 0; ++ if (parentFreq == 0) ++ return 0; ++ ++ /* minimum frequency is actually dictated by VCOmin */ ++ if (freq < MMCM_FREQ_OUTMIN) ++ freq = MMCM_FREQ_OUTMIN; ++ if (freq > MMCM_FREQ_OUTMAX) ++ freq = MMCM_FREQ_OUTMAX; ++ ++ if (parentFreq > MMCM_FREQ_PFDMAX) ++ curDiv = 2; ++ maxDiv = parentFreq / MMCM_FREQ_PFDMIN; ++ if (maxDiv > MMCM_DIV_MAX) ++ maxDiv = MMCM_DIV_MAX; ++ ++ while (curDiv <= maxDiv && !freq_found) { ++ minFb = curDiv * DIV_ROUND_UP(MMCM_FREQ_VCOMIN, parentFreq); ++ maxFb = curDiv * (MMCM_FREQ_VCOMAX / parentFreq); ++ if (maxFb > MMCM_FB_MAX) ++ maxFb = MMCM_FB_MAX; ++ if (minFb < MMCM_FB_MIN) ++ minFb = MMCM_FB_MIN; ++ ++ divVal = curDiv * freq; ++ /* ++ * This multiplier is used to find the best clkDiv value for ++ * each FB value ++ */ ++ curClkMult = ((parentFreq * 1000) + (divVal / 2)) / divVal; ++ ++ curFb = minFb; ++ while (curFb <= maxFb && !freq_found) { ++ curClkDiv = ((curClkMult * curFb) + 500) / 1000; ++ if (curClkDiv > MMCM_CLKDIV_MAX) ++ curClkDiv = MMCM_CLKDIV_MAX; ++ if (curClkDiv < MMCM_CLKDIV_MIN) ++ curClkDiv = MMCM_CLKDIV_MIN; ++ curFreq = (((parentFreq * curFb) / curDiv) / curClkDiv); ++ if (curFreq >= freq) ++ curError = curFreq - freq; ++ else ++ curError = freq - curFreq; ++ if (curError < bestError) { ++ bestError = curError; ++ bestPick->clkdiv = curClkDiv; ++ bestPick->fbmult = curFb; ++ bestPick->maindiv = curDiv; ++ bestPick->freq = curFreq; ++ } ++ if (!curError) ++ freq_found = true; ++ curFb++; ++ } ++ curDiv++; ++ } ++ return bestPick->freq; ++} ++ ++static struct dglnt_dynclk *clk_hw_to_dglnt_dynclk(struct clk_hw *clk_hw) ++{ ++ return container_of(clk_hw, struct dglnt_dynclk, clk_hw); ++} ++ ++ ++static int dglnt_dynclk_enable(struct clk_hw *clk_hw) ++{ ++ struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw); ++ unsigned int clock_state; ++ ++ if (dglnt_dynclk->freq) { ++ writel(1, dglnt_dynclk->base + OFST_DISPLAY_CTRL); ++ do { ++ clock_state = readl(dglnt_dynclk->base + ++ OFST_DISPLAY_STATUS); ++ } while (!clock_state); ++ } ++ return 0; ++} ++ ++static void dglnt_dynclk_disable(struct clk_hw *clk_hw) ++{ ++ struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw); ++ ++ writel(0, dglnt_dynclk->base + OFST_DISPLAY_CTRL); ++} ++ ++static int dglnt_dynclk_set_rate(struct clk_hw *clk_hw, ++ unsigned long rate, unsigned long parent_rate) ++{ ++ struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw); ++ struct dglnt_dynclk_reg clkReg; ++ struct dglnt_dynclk_mode clkMode; ++ ++ if (parent_rate == 0 || rate == 0) ++ return -EINVAL; ++ if (rate == dglnt_dynclk->freq) ++ return 0; ++ ++ /* ++ * Convert from Hz to KHz, then multiply by five to account for ++ * BUFR division ++ */ ++ rate = (rate + 100) / 200; ++ /* convert from Hz to KHz */ ++ parent_rate = (parent_rate + 500) / 1000; ++ if (!dglnt_dynclk_find_mode(rate, parent_rate, &clkMode)) ++ return -EINVAL; ++ ++ /* ++ * Write to the PLL dynamic configuration registers to configure it ++ * with the calculated parameters. ++ */ ++ dglnt_dynclk_find_reg(&clkReg, &clkMode); ++ dglnt_dynclk_write_reg(&clkReg, dglnt_dynclk->base); ++ dglnt_dynclk->freq = clkMode.freq * 200; ++ dglnt_dynclk_disable(clk_hw); ++ dglnt_dynclk_enable(clk_hw); ++ ++ return 0; ++} ++ ++static long dglnt_dynclk_round_rate(struct clk_hw *hw, unsigned long rate, ++ unsigned long *parent_rate) ++{ ++ struct dglnt_dynclk_mode clkMode; ++ ++ dglnt_dynclk_find_mode(((rate + 100) / 200), ++ ((*parent_rate) + 500) / 1000, &clkMode); ++ ++ return (clkMode.freq * 200); ++} ++ ++static unsigned long dglnt_dynclk_recalc_rate(struct clk_hw *clk_hw, ++ unsigned long parent_rate) ++{ ++ struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw); ++ ++ return dglnt_dynclk->freq; ++} ++ ++ ++static const struct clk_ops dglnt_dynclk_ops = { ++ .recalc_rate = dglnt_dynclk_recalc_rate, ++ .round_rate = dglnt_dynclk_round_rate, ++ .set_rate = dglnt_dynclk_set_rate, ++ .enable = dglnt_dynclk_enable, ++ .disable = dglnt_dynclk_disable, ++}; ++ ++static const struct of_device_id dglnt_dynclk_ids[] = { ++ { .compatible = "digilent,axi-dynclk", }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(of, dglnt_dynclk_ids); ++ ++static int dglnt_dynclk_probe(struct platform_device *pdev) ++{ ++ const struct of_device_id *id; ++ struct dglnt_dynclk *dglnt_dynclk; ++ struct clk_init_data init; ++ const char *parent_name; ++ const char *clk_name; ++ struct resource *mem; ++ struct clk *clk; ++ ++ if (!pdev->dev.of_node) ++ return -ENODEV; ++ ++ id = of_match_node(dglnt_dynclk_ids, pdev->dev.of_node); ++ if (!id) ++ return -ENODEV; ++ ++ dglnt_dynclk = devm_kzalloc(&pdev->dev, sizeof(*dglnt_dynclk), ++ GFP_KERNEL); ++ if (!dglnt_dynclk) ++ return -ENOMEM; ++ ++ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ dglnt_dynclk->base = devm_ioremap_resource(&pdev->dev, mem); ++ if (IS_ERR(dglnt_dynclk->base)) ++ return PTR_ERR(dglnt_dynclk->base); ++ ++ parent_name = of_clk_get_parent_name(pdev->dev.of_node, 0); ++ if (!parent_name) ++ return -EINVAL; ++ ++ clk_name = pdev->dev.of_node->name; ++ of_property_read_string(pdev->dev.of_node, "clock-output-names", ++ &clk_name); ++ ++ init.name = clk_name; ++ init.ops = &dglnt_dynclk_ops; ++ init.flags = 0; ++ init.parent_names = &parent_name; ++ init.num_parents = 1; ++ ++ dglnt_dynclk->freq = 0; ++ dglnt_dynclk_disable(&dglnt_dynclk->clk_hw); ++ ++ dglnt_dynclk->clk_hw.init = &init; ++ clk = devm_clk_register(&pdev->dev, &dglnt_dynclk->clk_hw); ++ if (IS_ERR(clk)) ++ return PTR_ERR(clk); ++ ++ return of_clk_add_provider(pdev->dev.of_node, of_clk_src_simple_get, ++ clk); ++} ++ ++static int dglnt_dynclk_remove(struct platform_device *pdev) ++{ ++ of_clk_del_provider(pdev->dev.of_node); ++ ++ return 0; ++} ++ ++static struct platform_driver dglnt_dynclk_driver = { ++ .driver = { ++ .name = "dglnt-dynclk", ++ .owner = THIS_MODULE, ++ .of_match_table = dglnt_dynclk_ids, ++ }, ++ .probe = dglnt_dynclk_probe, ++ .remove = dglnt_dynclk_remove, ++}; ++module_platform_driver(dglnt_dynclk_driver); ++ ++MODULE_LICENSE("GPL v2"); ++MODULE_AUTHOR("Sam Bobrowicz "); ++MODULE_DESCRIPTION("CCF Driver for Digilent axi_dynclk IP Core"); +-- +2.14.2 + diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch new file mode 100644 index 00000000..a98d84c5 --- /dev/null +++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch @@ -0,0 +1,54 @@ +From 1a18e2b514ae9e75145597ac509a87f656c976ba Mon Sep 17 00:00:00 2001 +From: Nathan Rossi +Date: Mon, 2 May 2016 23:46:42 +1000 +Subject: [PATCH 3/3] drm: xilinx: Fix DPMS transition to on + +Fix the issues where the VTC is reset (losing its timing config). + +Also fix the issue where the plane destroys its DMA descriptors and +marks the DMA channels as inactive but never recreates the descriptors +and never updates the active state when turning DPMS back on. + +Signed-off-by: Nathan Rossi +Upstream-Status: Pending [This is a workaround] +--- + drivers/gpu/drm/xilinx/xilinx_drm_crtc.c | 1 - + drivers/gpu/drm/xilinx/xilinx_drm_plane.c | 3 ++- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c b/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c +index 631d35b921..93dbd4b58a 100644 +--- a/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c ++++ b/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c +@@ -88,7 +88,6 @@ static void xilinx_drm_crtc_dpms(struct drm_crtc *base_crtc, int dpms) + default: + if (crtc->vtc) { + xilinx_vtc_disable(crtc->vtc); +- xilinx_vtc_reset(crtc->vtc); + } + if (crtc->cresample) { + xilinx_cresample_disable(crtc->cresample); +diff --git a/drivers/gpu/drm/xilinx/xilinx_drm_plane.c b/drivers/gpu/drm/xilinx/xilinx_drm_plane.c +index 6a248b72d4..d2518a4bdf 100644 +--- a/drivers/gpu/drm/xilinx/xilinx_drm_plane.c ++++ b/drivers/gpu/drm/xilinx/xilinx_drm_plane.c +@@ -140,7 +140,7 @@ void xilinx_drm_plane_commit(struct drm_plane *base_plane) + for (i = 0; i < MAX_NUM_SUB_PLANES; i++) { + struct xilinx_drm_plane_dma *dma = &plane->dma[i]; + +- if (dma->chan && dma->is_active) { ++ if (dma->chan) { + flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT; + desc = dmaengine_prep_interleaved_dma(dma->chan, + &dma->xt, +@@ -153,6 +153,7 @@ void xilinx_drm_plane_commit(struct drm_plane *base_plane) + dmaengine_submit(desc); + + dma_async_issue_pending(dma->chan); ++ dma->is_active = true; + } + } + } +-- +2.14.2 + diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0004-minized-wifi-bluetooth.cfg b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0004-minized-wifi-bluetooth.cfg new file mode 100644 index 00000000..f71e53ab --- /dev/null +++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0004-minized-wifi-bluetooth.cfg @@ -0,0 +1,33 @@ +# +# Bluetooth config +# +CONFIG_BT=y +CONFIG_BT_BREDR=y +CONFIG_BT_HS=y +CONFIG_BT_LE=y +CONFIG_BT_BCM=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_BCM=y +CONFIG_BT_HIDP=y +CONFIG_CFG80211=y +CONFIG_CFG80211_DEFAULT_PS=y +CONFIG_CFG80211_CRDA_SUPPORT=y +CONFIG_BRCMUTIL=y +CONFIG_BRCMFMAC=y +CONFIG_BRCMFMAC_PROTO_BCDC=y +CONFIG_BRCMFMAC_SDIO=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_SHA256=y + +# +# Regulator config +# +CONFIG_REGMAP_IRQ=y +CONFIG_I2C_XILINX=y +CONFIG_MFD_DA9062=y +CONFIG_REGULATOR_DA9062=y + diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2023.2.bbappend b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2023.2.bbappend new file mode 100644 index 00000000..c789c7a9 --- /dev/null +++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2023.2.bbappend @@ -0,0 +1,12 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/linux-xlnx/v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}:" + +# Note: These patches are very old and doesn't apply on top of 5.x +# kernel. For more details refer README.md file. + +#SRC_URI:append:zybo-linux-bd-zynq7 = " \ +# file://0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch \ +# file://0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch \ +# file://0003-drm-xilinx-Fix-DPMS-transition-to-on.patch \ +# " + +SRC_URI:append:minized-zynq7 = " file://0004-minized-wifi-bluetooth.cfg" diff --git a/meta-xilinx-core/conf/layer.conf b/meta-xilinx-core/conf/layer.conf index 57a76049..19a5e1a1 100644 --- a/meta-xilinx-core/conf/layer.conf +++ b/meta-xilinx-core/conf/layer.conf @@ -41,33 +41,29 @@ SIGGEN_EXCLUDE_SAFE_RECIPE_DEPS += " \ *->xserver-xorg \ " -XILINX_RELEASE_VERSION ??= "v2023.1" +XILINX_RELEASE_VERSION ??= "v2023.2" BUILDCFG_VARS:append = " SOC_VARIANT XILINX_RELEASE_VERSION" -XILINX_QEMU_VERSION[v2022.1] = "v6.1.0-xilinx-v2022.1%" -XILINX_QEMU_VERSION[v2022.2] = "v6.1.0-xilinx-v2022.2%" XILINX_QEMU_VERSION[v2023.1] = "v7.1.0-xilinx-v2023.1%" +XILINX_QEMU_VERSION[v2023.2] = "v7.1.0-xilinx-v2023.2%" PREFERRED_VERSION_qemu-xilinx ?= "${@d.getVarFlag('XILINX_QEMU_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}" PREFERRED_VERSION_qemu-xilinx-native ?= "${@d.getVarFlag('XILINX_QEMU_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}" PREFERRED_VERSION_qemu-xilinx-system-native ?= "${@d.getVarFlag('XILINX_QEMU_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}" PREFERRED_VERSION_qemu-devicetrees ?= "xilinx-${XILINX_RELEASE_VERSION}%" -XILINX_ATF_VERSION[v2022.1] = "2.6-xilinx-v2022.1%" -XILINX_ATF_VERSION[v2022.2] = "2.6-xilinx-v2022.2%" XILINX_ATF_VERSION[v2023.1] = "2.8-xilinx-v2023.1%" +XILINX_ATF_VERSION[v2023.2] = "2.8-xilinx-v2023.2%" PREFERRED_VERSION_arm-trusted-firmware ?= "${@d.getVarFlag('XILINX_ATF_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}" -XILINX_UBOOT_VERSION[v2022.1] = "v2021.01-xilinx-v2022.1%" -XILINX_UBOOT_VERSION[v2022.2] = "v2021.01-xilinx-v2022.2%" XILINX_UBOOT_VERSION[v2023.1] = "v2023.01-xilinx-v2023.1%" +XILINX_UBOOT_VERSION[v2023.2] = "v2023.01-xilinx-v2023.2%" PREFERRED_VERSION_u-boot-xlnx ?= "${@d.getVarFlag('XILINX_UBOOT_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}" PREFERRED_VERSION_u-boot-tools-xlnx ?= "${@d.getVarFlag('XILINX_UBOOT_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}" -XILINX_LINUX_VERSION[v2022.1] = "5.15.19-xilinx-v2022.1%" -XILINX_LINUX_VERSION[v2022.2] = "5.15.36-xilinx-v2022.2%" XILINX_LINUX_VERSION[v2023.1] = "6.1.5-xilinx-v2023.1%" +XILINX_LINUX_VERSION[v2023.2] = "6.1.5-xilinx-v2023.2%" PREFERRED_VERSION_linux-xlnx ?= "${@d.getVarFlag('XILINX_LINUX_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}" # Add support to eSDK for gen-machine-conf if it exists diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2023.2.bb b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2023.2.bb new file mode 100644 index 00000000..057c1ef8 --- /dev/null +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2023.2.bb @@ -0,0 +1,15 @@ +SRCBRANCH ?= "2023.2" +SRCREV = "be635252271de342014a146825870b64bd41d6eb" +BRANCH = "2023" +LIC_FILES_CHKSUM ?= "file://LICENSE.md;md5=f4d5df0f12dcea1b1a0124219c0dbab4" +PV = "${SRCBRANCH}+git${SRCPV}" + +REPO = "git://github.com/Xilinx/libmetal.git;protocol=https" + +include ${LAYER_PATH_openamp-layer}/recipes-openamp/libmetal/libmetal.inc + +RPROVIDES:${PN}-dbg += "libmetal-dbg" +RPROVIDES:${PN}-dev += "libmetal-dev" +RPROVIDES:${PN}-lic += "libmetal-lic" +RPROVIDES:${PN}-src += "libmetal-src" +RPROVIDES:${PN}-staticdev += "libmetal-staticdev" diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2023.2.bb b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2023.2.bb new file mode 100644 index 00000000..d655d9ac --- /dev/null +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2023.2.bb @@ -0,0 +1,16 @@ +SRCBRANCH ?= "2023.2" +SRCREV = "c8aaf2f26d5493f492f0af09dd558d45908636da" +BRANCH = "2023" +LIC_FILES_CHKSUM ?= "file://LICENSE.md;md5=ab88daf995c0bd0071c2e1e55f3d3505" +PV = "${SRCBRANCH}+git${SRCPV}" +REPO = "git://github.com/Xilinx/open-amp.git;protocol=https" + +include ${LAYER_PATH_openamp-layer}/recipes-openamp/open-amp/open-amp.inc +require ${LAYER_PATH_openamp-layer}/vendor/xilinx/recipes-openamp/open-amp/open-amp-xlnx.inc + +RPROVIDES:${PN}-dbg += "open-amp-dbg" +RPROVIDES:${PN}-dev += "open-amp-dev" +RPROVIDES:${PN}-lic += "open-amp-lic" +RPROVIDES:${PN}-src += "open-amp-src" +RPROVIDES:${PN}-staticdev += "open-amp-staticdev" + diff --git a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb new file mode 100644 index 00000000..d9d8db7a --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb @@ -0,0 +1,8 @@ +ATF_VERSION = "2.8" +SRCREV = "9c3b04f7b996b21428ff4c64da01d12a4526a1b8" +BRANCH = "xlnx_rebase_v2.8" +LIC_FILES_CHKSUM = "file://license.rst;md5=1dd070c98a281d18d9eefd938729b031" + + +include arm-trusted-firmware.inc + diff --git a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb new file mode 100644 index 00000000..a74670b7 --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb @@ -0,0 +1,72 @@ +SUMMARY = "Xilinx dfx-mgr libraries" +DESCRIPTION = "Xilinx Runtime User Space Libraries and Binaries" + +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://LICENSE;md5=d67bcef754e935bf77b6d7051bd62b5e" + +REPO ?= "git://github.com/Xilinx/dfx-mgr.git;protocol=https" +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" + +BRANCH = "master" +SRCREV = "5918fb3406d828693cca484b77229ffd031b5dc4" +SOMAJOR = "1" +SOMINOR = "0" +SOVERSION = "${SOMAJOR}.${SOMINOR}" + +COMPATIBLE_MACHINE = "^$" +COMPATIBLE_MACHINE:zynqmp = "zynqmp" +COMPATIBLE_MACHINE:versal = "versal" + +S = "${WORKDIR}/git" + +inherit cmake update-rc.d systemd + +DEPENDS += " libwebsockets inotify-tools libdfx zocl libdrm" +RDEPENDS:${PN} += " freeipmi" +EXTRA_OECMAKE += " \ + -DCMAKE_SYSROOT:PATH=${RECIPE_SYSROOT} \ + " + +INITSCRIPT_NAME = "dfx-mgr.sh" +INITSCRIPT_PARAMS = "start 99 S ." + +SYSTEMD_PACKAGES="${PN}" +SYSTEMD_SERVICE:${PN}="dfx-mgr.service" +SYSTEMD_AUTO_ENABLE:${PN}="enable" + + +do_install(){ + install -d ${D}${bindir} + install -d ${D}${libdir} + install -d ${D}${includedir} + install -d ${D}${base_libdir}/firmware/xilinx + install -d ${D}${sysconfdir}/dfx-mgrd + + cp ${B}/example/sys/linux/dfx-mgrd-static ${D}${bindir}/dfx-mgrd + cp ${B}/example/sys/linux/dfx-mgr-client-static ${D}${bindir}/dfx-mgr-client + chrpath -d ${D}${bindir}/dfx-mgrd + chrpath -d ${D}${bindir}/dfx-mgr-client + install -m 0644 ${S}/src/dfxmgr_client.h ${D}${includedir} + + oe_soinstall ${B}/src/libdfx-mgr.so.${SOVERSION} ${D}${libdir} + + install -m 0755 ${S}/src/daemon.conf ${D}${sysconfdir}/dfx-mgrd/ + + if ${@bb.utils.contains('DISTRO_FEATURES', 'sysvinit', 'true', 'false', d)}; then + install -d ${D}${sysconfdir}/init.d/ + install -m 0755 ${S}/src/dfx-mgr.sh ${D}${sysconfdir}/init.d/ + fi + + install -m 0755 ${S}/src/dfx-mgr.sh ${D}${bindir} + install -m 0755 ${S}/src/scripts/xlnx-firmware-detect ${D}${bindir} + + install -d ${D}${systemd_system_unitdir} + install -m 0644 ${S}/src/dfx-mgr.service ${D}${systemd_system_unitdir} +} + +PACKAGES =+ "libdfx-mgr" + +FILES:${PN} += "${base_libdir}/firmware/xilinx" +FILES:${PN} += "${@bb.utils.contains('DISTRO_FEATURES','sysvinit','${sysconfdir}/init.d/dfx-mgr.sh', '', d)} ${systemd_system_unitdir}" +FILES:libdfx-mgr = "${libdir}/libdfx-mgr.so.${SOVERSION} ${libdir}/libdfx-mgr.so.${SOMAJOR}" diff --git a/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.2.bb b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.2.bb new file mode 100644 index 00000000..11ad0268 --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.2.bb @@ -0,0 +1,23 @@ +SUMMARY = "Xilinx libdfx library" +DESCRIPTION = "Xilinx libdfx Library and headers" + +LICENSE = "MIT & GPL-2.0-or-later" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=94aba86aec117f003b958a52f019f1a7" + +BRANCH ?= "master" +REPO ?= "git://github.com/Xilinx/libdfx.git;protocol=https" +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" +SRCREV = "52c1d83c72a2b2e85d256411a199ed1baed12ae1" + +COMPATIBLE_MACHINE = "^$" +COMPATIBLE_MACHINE:zynqmp = "zynqmp" +COMPATIBLE_MACHINE:versal = "versal" + +S = "${WORKDIR}/git" + +inherit cmake + +# Due to an update where the soname/version was defined, we need to use an RREPLACES +# so updates will work properly. +RREPLACES:${PN} = "libdfx" diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-tools-xlnx_2023.2.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-tools-xlnx_2023.2.bb new file mode 100644 index 00000000..43fec635 --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-tools-xlnx_2023.2.bb @@ -0,0 +1,21 @@ +require u-boot-tools-xlnx.inc +require u-boot-xlnx-2023.2.inc + +# MUST clear CONFIG_VIDEO to avoid a compilation failure trying to construct +# bmp_logo.h +SED_CONFIG_EFI:append = ' -e "s/CONFIG_VIDEO=.*/# CONFIG_VIDEO is not set/"' + +# Default do_compile fails with: +# | error: object directory ../downloads/git2/github.com.Xilinx.u-boot-xlnx.git/objects does not exist; check .git/objects/info/alternates. +# The regular workaround of calling 'git diff' seems to be problematic. +do_compile () { + oe_runmake -C ${S} tools-only_defconfig O=${B} + + # Disable CONFIG_CMD_LICENSE, license.h is not used by tools and + # generating it requires bin2header tool, which for target build + # is built with target tools and thus cannot be executed on host. + sed -i -e "s/CONFIG_CMD_LICENSE=.*/# CONFIG_CMD_LICENSE is not set/" ${SED_CONFIG_EFI} ${B}/.config + + oe_runmake -C ${S} cross_tools NO_SDL=1 O=${B} +} + diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc new file mode 100644 index 00000000..c2c54090 --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc @@ -0,0 +1,17 @@ +UBOOT_VERSION = "v2023.01" + +UBRANCH = "xlnx_rebase_v2023.01" + +SRCREV = "87298fde44b43e0552f0f77d7d3c1aaf4f7c9566" + +LICENSE = "GPL-2.0-or-later" +LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897" + +# u-boot-xlnx has support for these +HAS_PLATFORM_INIT ?= " \ + xilinx_zynqmp_virt_config \ + xilinx_zynq_virt_defconfig \ + xilinx_versal_vc_p_a2197_revA_x_prc_01_revA \ + " + +DEPENDS += "bc-native dtc-native python3-setuptools-native gnutls-native" diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2023.2.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2023.2.bb new file mode 100644 index 00000000..22075424 --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2023.2.bb @@ -0,0 +1,4 @@ + +require u-boot-xlnx.inc +require u-boot-spl-zynq-init.inc +require u-boot-xlnx-2023.2.inc diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb new file mode 100644 index 00000000..9a5022aa --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb @@ -0,0 +1,6 @@ + +require qemu-devicetrees.inc + +BRANCH ?= "master" +SRCREV ?= "1c45adcde1fc06432c01be250bf668c6477d8459" + diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2023.2.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2023.2.inc new file mode 100644 index 00000000..3309ce11 --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2023.2.inc @@ -0,0 +1,3 @@ +XILINX_QEMU_VERSION = "v7.1.0" +BRANCH = "master" +SRCREV = "21adc9f99e813fb24fb65421259b5b0614938376" diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native_2023.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native_2023.2.bb new file mode 100644 index 00000000..ccfa9956 --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native_2023.2.bb @@ -0,0 +1,9 @@ +require qemu-xilinx-2023.2.inc +require qemu-xilinx-native-7.1.inc +require qemu-native-alt.inc + +BPN = "qemu-xilinx" + +EXTRA_OECONF:append = " --target-list=${@get_qemu_usermode_target_list(d)} --disable-tools --disable-blobs --disable-guest-agent" + +PACKAGECONFIG ??= "pie" diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_2023.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_2023.2.bb new file mode 100644 index 00000000..21208f72 --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_2023.2.bb @@ -0,0 +1,26 @@ +require qemu-system-native-alt.inc +require qemu-xilinx-2023.2.inc +require qemu-xilinx-native-7.1.inc + +PROVIDES = "qemu-system-native" + +EXTRA_OECONF:append = " --target-list=${@get_qemu_system_target_list(d)}" + +PACKAGECONFIG ??= "fdt alsa kvm gcrypt pie slirp" + +PACKAGECONFIG:remove = "${@'kvm' if not os.path.exists('/usr/include/linux/kvm.h') else ''}" + +DEPENDS += "pixman-native qemu-xilinx-native bison-native ninja-native meson-native" +DEPENDS += "qemu-xilinx-multiarch-helper-native" + +do_install:append() { + # The following is also installed by qemu-native + rm -f ${D}${datadir}/qemu/trace-events-all + rm -rf ${D}${datadir}/qemu/keymaps + rm -rf ${D}${datadir}/icons + rm -rf ${D}${includedir}/qemu-plugin.h + + # Install qmp.py to be used with testimage + install -d ${D}${libdir}/qemu-python/qmp/ + install -D ${S}/python/qemu/qmp/* ${D}${libdir}/qemu-python/qmp/ +} diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx_2023.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx_2023.2.bb new file mode 100644 index 00000000..1947de0f --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx_2023.2.bb @@ -0,0 +1,24 @@ +require qemu-xilinx-2023.2.inc +require recipes-devtools/qemu/qemu.inc +require qemu-xilinx-7.1.inc +require qemu-alt.inc + +# Links to libmali-xlnx, so it becomes MACHINE_ARCH specific +DEFAULT_PACKAGE_ARCH := "${PACKAGE_ARCH}" +MALI_PACKAGE_ARCH = "${@'${MACHINE_ARCH}' if d.getVar('PREFERRED_PROVIDER_virtual/libgles1') == 'libmali-xlnx' else '${DEFAULT_PACKAGE_ARCH}'}" +PACKAGE_ARCH:class-target = "${@bb.utils.contains_any('DEPENDS', 'libepoxy virglrenderer', '${MALI_PACKAGE_ARCH}', '${DEFAULT_PACKAGE_ARCH}', d)}" + +BBCLASSEXTEND = "nativesdk" + +RDEPENDS:${PN}:class-target += "bash" + +PROVIDES:class-nativesdk = "nativesdk-qemu" +RPROVIDES:${PN}:class-nativesdk = "nativesdk-qemu" + +EXTRA_OECONF:append:class-target = " --target-list=${@get_qemu_target_list(d)}" +EXTRA_OECONF:append:class-nativesdk = " --target-list=${@get_qemu_target_list(d)}" +EXTRA_OECONF:append:class-target:mipsarcho32 = "${@bb.utils.contains('BBEXTENDCURR', 'multilib', ' --disable-capstone', '', d)}" + +do_install:append:class-nativesdk() { + ${@bb.utils.contains('PACKAGECONFIG', 'gtk+', 'make_qemu_wrapper', '', d)} +} diff --git a/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_2023.2.bb b/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_2023.2.bb new file mode 100644 index 00000000..7849cc93 --- /dev/null +++ b/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_2023.2.bb @@ -0,0 +1,24 @@ +SUMMARY = "Xilinx DisplayPort Linux Kernel module" +DESCRIPTION = "Out-of-tree DisplayPort(DP) kernel modules provider for aarch64 devices" +SECTION = "kernel/modules" +LICENSE = "GPL-2.0-only" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a" + +XLNX_DP_VERSION = "6.1.0" +PV = "${XLNX_DP_VERSION}+xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}" + +S = "${WORKDIR}/git" + +BRANCH ?= "master" +REPO ?= "git://github.com/xilinx/dp-modules.git;protocol=https" +SRCREV ?= "5b0969ac09f301c33bccc140c8f60e832f5cf222" + +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" + +inherit module + +EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR}" +COMPATIBLE_MACHINE = "^$" +COMPATIBLE_MACHINE:zynqmp = "zynqmp" +COMPATIBLE_MACHINE:versal = "versal" diff --git a/meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_2023.2.bb b/meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_2023.2.bb new file mode 100644 index 00000000..6e00b6fd --- /dev/null +++ b/meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_2023.2.bb @@ -0,0 +1,24 @@ +SUMMARY = "Xilinx HDMI Linux Kernel module" +DESCRIPTION = "Out-of-tree HDMI kernel modules provider for MPSoC EG/EV devices" +SECTION = "kernel/modules" +LICENSE = "GPL-2.0-only" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=b34277fe156508fd5a650609dc36d1fe" + +XLNX_HDMI_VERSION = "6.1" +PV = "${XLNX_HDMI_VERSION}+xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}" + +S = "${WORKDIR}/git" + +BRANCH ?= "master" +REPO ?= "git://github.com/Xilinx/hdmi-modules.git;protocol=https" +SRCREV = "1c6330f02fea68992e22400fdbc8c0d0e63e2958" + +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" + +inherit module + +EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR}" +COMPATIBLE_MACHINE = "^$" +COMPATIBLE_MACHINE:zynqmp = "zynqmp" +COMPATIBLE_MACHINE:versal = "versal" diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb new file mode 100644 index 00000000..717696cf --- /dev/null +++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb @@ -0,0 +1,11 @@ +LINUX_VERSION = "6.1.5" +YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.1;destsuffix=yocto-kmeta" +KBRANCH="xlnx_rebase_v6.1_LTS" +SRCREV = "943565167d57362181d853ade7ae551488036754" +SRCREV_meta = "185bcfcbe480c742247d9117011794c69682914f" + +KCONF_AUDIT_LEVEL="0" + +include linux-xlnx.inc + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" diff --git a/meta-xilinx-standalone-experimental/README.md b/meta-xilinx-standalone-experimental/README.md index 5e246d5c..27528b14 100644 --- a/meta-xilinx-standalone-experimental/README.md +++ b/meta-xilinx-standalone-experimental/README.md @@ -34,7 +34,7 @@ $ bitbake meta-xilinx-setup ``` 3. Install the setup SDK: ``` -$ .${TMPDIR}/tmp/deploy/sdk/x86_64-xilinx-nativesdk-prestep-2023.1....sh -d prestep -y +$ .${TMPDIR}/tmp/deploy/sdk/x86_64-xilinx-nativesdk-prestep-2023.2....sh -d prestep -y ``` Then follow the instructions in the 'prestep/README-setup' file. diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 01940e12..afeecdbf 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -4,9 +4,11 @@ ESW_VER ?= "${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or 'master' REPO ??= "git://github.com/Xilinx/embeddedsw.git;protocol=https" ESW_BRANCH[2023.1] = "xlnx_rel_v2023.1-next" +ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "5d75b745952f39bc4f37189257f2f228d99089f3" +ESW_REV[2023.2] = "675797f7a0a048cab241bf1f8004ab16d7ca9213" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" @@ -14,6 +16,7 @@ EMBEDDEDSW_SRCURI ?= "${REPO};${EMBEDDEDSW_BRANCHARG}" LICENSE = "MIT" LIC_FILES_CHKSUM[xlnx_rel_v2023.1-next] = '15386ea7656d3b83815bce88c0bbe66d' +LIC_FILES_CHKSUM[master-next] = '15386ea7656d3b83815bce88c0bbe66d' LIC_FILES_CHKSUM ??= "file://license.txt;md5=${@d.getVarFlag('LIC_FILES_CHKSUM', d.getVar('BRANCH')) or '0'}" SRC_URI = "${EMBEDDEDSW_SRCURI}" diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2023.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2023.2.bb new file mode 100644 index 00000000..8816dc4d --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2023.2.bb @@ -0,0 +1,11 @@ +require fsbl-firmware.inc + +FILESPATH .= ":${FILE_DIRNAME}/embeddedsw/2023.1:${FILE_DIRNAME}/embeddedsw" + +SRC_URI += " \ + file://makefile-skip-copy_bsp.sh.patch \ + file://fsbl-fixups.patch \ + " + +# This version does not build for zynq +COMPATIBLE_MACHINE:zynq = "none" diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2023.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2023.2.bb new file mode 100644 index 00000000..37861b75 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2023.2.bb @@ -0,0 +1,29 @@ +require plm-firmware.inc + +# Separate build directories for versal and versal-net +SOC_DIR = "versal" +SOC_DIR:versal-net = "versal_net" +B = "${S}/lib/sw_apps/versal_plm/src/${SOC_DIR}" + +BSP_DIR ?= "${B}/../../misc/versal_plm_bsp" + +FILESPATH .= ":${FILE_DIRNAME}/embeddedsw/2023.1:${FILE_DIRNAME}/embeddedsw" + +SRC_URI += " \ + file://makefile-skip-copy_bsp.sh.patch \ + file://0001-versal_fw-Fixup-core-makefiles.patch \ + " + +EXTRA_COMPILER_FLAGS = "-g -ffunction-sections -fdata-sections -Wall -Wextra -Os -flto -ffat-lto-objects" + +do_configure() { + # manually do the copy_bsp step first, so as to be able to fix up use of + # mb-* commands + ${B}/../../misc/${SOC_DIR}/copy_bsp.sh +} + +do_compile() { + oe_runmake + + ${MB_OBJCOPY} -O binary ${B}/${ESW_COMPONENT} ${B}/${ESW_COMPONENT}.bin +} diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2023.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2023.2.bb new file mode 100644 index 00000000..fe6deddc --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2023.2.bb @@ -0,0 +1,16 @@ +require pmu-firmware.inc + +FILESPATH .= ":${FILE_DIRNAME}/embeddedsw/2023.1:${FILE_DIRNAME}/embeddedsw" + +SRC_URI += " \ + file://makefile-skip-copy_bsp.sh.patch \ + file://0001-zynqmp_pmufw-Fixup-core-makefiles.patch \ + " + +EXTRA_COMPILER_FLAGS = "-ffunction-sections -fdata-sections -Wall -Wextra -Os -flto -ffat-lto-objects" + +do_compile() { + oe_runmake + + ${MB_OBJCOPY} -O binary ${B}/${ESW_COMPONENT} ${B}/${ESW_COMPONENT}.bin +} diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2023.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2023.2.bb new file mode 100644 index 00000000..569c5a46 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2023.2.bb @@ -0,0 +1,34 @@ +require psm-firmware.inc + +# Separate build directories for versal and versal-net +SOC_DIR = "versal" +SOC_DIR:versal-net = "versal_net" +B = "${S}/lib/sw_apps/versal_psmfw/src/${SOC_DIR}" + +BSP_DIR ?= "${B}/../../misc/versal_psmfw_bsp" + +FILESPATH .= ":${FILE_DIRNAME}/embeddedsw/2023.1:${FILE_DIRNAME}/embeddedsw" + +SRC_URI += " \ + file://makefile-skip-copy_bsp.sh.patch \ + file://0001-versal_fw-Fixup-core-makefiles.patch \ + " + +EXTRA_COMPILER_FLAGS = "-g -ffunction-sections -fdata-sections -Wall -Wextra" + +# Override default since we're in a subdirectory deeper now... +do_configure() { + # manually do the copy_bsp step first, so as to be able to fix up use of + # mb-* commands + if [ ${SOC_DIR} != "versal" ]; then + ${B}/../../misc/${SOC_DIR}/copy_bsp.sh + else + ${B}/../../misc/copy_bsp.sh + fi +} + +do_compile() { + oe_runmake + + ${MB_OBJCOPY} -O binary ${B}/${ESW_COMPONENT} ${B}/${ESW_COMPONENT}.bin +} -- cgit v1.2.3-54-g00ecf From 417ef2681cfb4a6fdf24eaa62e937bda1ffe2d19 Mon Sep 17 00:00:00 2001 From: Mark Hatle Date: Tue, 7 Mar 2023 07:44:22 -0800 Subject: Align with 2023.1 branches Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.1.inc | 2 +- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.1.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.1.inc index c2c54090..ad25cd1d 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.1.inc +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.1.inc @@ -2,7 +2,7 @@ UBOOT_VERSION = "v2023.01" UBRANCH = "xlnx_rebase_v2023.01" -SRCREV = "87298fde44b43e0552f0f77d7d3c1aaf4f7c9566" +SRCREV = "f32d07b9b511736649314d505f6b1caaf8d4ac75" LICENSE = "GPL-2.0-or-later" LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897" diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index afeecdbf..18f25b86 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -7,7 +7,7 @@ ESW_BRANCH[2023.1] = "xlnx_rel_v2023.1-next" ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" -ESW_REV[2023.1] = "5d75b745952f39bc4f37189257f2f228d99089f3" +ESW_REV[2023.1] = "14809f266c6ec79b517d976f882ba496be3e1998" ESW_REV[2023.2] = "675797f7a0a048cab241bf1f8004ab16d7ca9213" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" -- cgit v1.2.3-54-g00ecf From b6fc164aae0e8f8f46aef9f6fa7d53c1cac959b2 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 17 Mar 2023 15:44:25 +0530 Subject: Updated SRCREV for 2023.1_2631 Signed-off-by: Siva Addepalli (cherry picked from commit d5e7e01ca6979d0ce1d8f5158bcffbf565a56c65) Signed-off-by: Mark Hatle --- meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.1.bb | 2 +- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.1.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.1.bb index d369b93e..87a51983 100644 --- a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.1.bb +++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.1.bb @@ -1,7 +1,7 @@ LINUX_VERSION = "6.1.5" YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.1;destsuffix=yocto-kmeta" KBRANCH="xlnx_rebase_v6.1_LTS" -SRCREV = "952c167632ed184e5f9d5bac3203b8e32e82af30" +SRCREV = "e409860b5c5e78417eccf058261a6f00dc29a44a" SRCREV_meta = "185bcfcbe480c742247d9117011794c69682914f" KCONF_AUDIT_LEVEL="0" diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 9aad7385..471be333 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -7,7 +7,7 @@ ESW_BRANCH[2023.1] = "xlnx_rel_v2023.1-next" ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" -ESW_REV[2023.1] = "f81f2fb1bf0aa0fc0e893fe9e10cdb49c63af064" +ESW_REV[2023.1] = "2e9f85579e203d76b983ff21c4294a8c3d578942" ESW_REV[2023.2] = "675797f7a0a048cab241bf1f8004ab16d7ca9213" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" -- cgit v1.2.3-54-g00ecf From 84821000abc60fa3aa6e9eb80d7caa98167e314b Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 28 Mar 2023 12:50:53 +0530 Subject: Updated SRCREV for 2023.2_4891 Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc | 2 +- meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.1.bb | 2 +- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc index 4090cebb..78da179e 100644 --- a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc +++ b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc @@ -3,7 +3,7 @@ SECTION = "libs" REPO ?= "git://github.com/Xilinx/aie-rt.git;protocol=https" BRANCH ?= "xlnx_rel_v2023.1" -SRCREV ?= "a6b55e54e9af4856e7eead1bbf06f4b1afb64c0f" +SRCREV ?= "24d56bb3df32c3e4b6ac1a7930b0c788a3453d58" LICENSE = "BSD-3-Clause" LIC_FILES_CHKSUM ?= "file://license.txt;md5=b81abf1f508952331dd7d2ab36408f5b" diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.1.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.1.bb index 87a51983..e258af5c 100644 --- a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.1.bb +++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.1.bb @@ -1,7 +1,7 @@ LINUX_VERSION = "6.1.5" YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.1;destsuffix=yocto-kmeta" KBRANCH="xlnx_rebase_v6.1_LTS" -SRCREV = "e409860b5c5e78417eccf058261a6f00dc29a44a" +SRCREV = "4d9224895c20772cc2b9a6f9bf7926b846cde1c5" SRCREV_meta = "185bcfcbe480c742247d9117011794c69682914f" KCONF_AUDIT_LEVEL="0" diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 471be333..348a3b79 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "2e9f85579e203d76b983ff21c4294a8c3d578942" -ESW_REV[2023.2] = "675797f7a0a048cab241bf1f8004ab16d7ca9213" +ESW_REV[2023.2] = "c5960021b8db5f6bfd15e036e8719a6734af67f1" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 486f7e3fbd1db7c2247d2f4a769fdf97eb86b400 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 31 Mar 2023 10:29:22 +0530 Subject: Updated SRCREV for 2023.2_6311 Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc | 2 +- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc index fd51561a..01082966 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc @@ -2,7 +2,7 @@ UBOOT_VERSION = "v2023.01" UBRANCH = "xlnx_rebase_v2023.01" -SRCREV = "8624651f9ae49d326e29d9ec9a80a881a769640a" +SRCREV = "40a08d69e749c0472103551c85c02c41f979453d" LICENSE = "GPL-2.0-or-later" LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897" diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 348a3b79..be6d21fc 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "2e9f85579e203d76b983ff21c4294a8c3d578942" -ESW_REV[2023.2] = "c5960021b8db5f6bfd15e036e8719a6734af67f1" +ESW_REV[2023.2] = "355a7b955fb9f3ba021daec3a0e2ae7877b7da9b" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 886f6a9f92b6a9a4fb6dc6c59737536e4498fc2f Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 4 Apr 2023 22:28:48 +0530 Subject: Updated SRCREV for 2023.2_6119 Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index be6d21fc..c4407cb2 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "2e9f85579e203d76b983ff21c4294a8c3d578942" -ESW_REV[2023.2] = "355a7b955fb9f3ba021daec3a0e2ae7877b7da9b" +ESW_REV[2023.2] = "7addf6855144a06f9fa61771b6c994603889cd95" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 89ac8235452b4fe9d2dc8d66e03224be8c01a906 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Sun, 9 Apr 2023 08:02:38 +0530 Subject: Updated SRCREV of fsbl-firmware for 2023.2_5575 Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index c4407cb2..25c24fe4 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "2e9f85579e203d76b983ff21c4294a8c3d578942" -ESW_REV[2023.2] = "7addf6855144a06f9fa61771b6c994603889cd95" +ESW_REV[2023.2] = "3deba273b5c03e2257c266d05ef10fed8eab4286" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 9ddd5867d80cd11d792f631364e55c69f38f8d35 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Mon, 10 Apr 2023 12:57:15 +0530 Subject: Updated SRCREV of fsbl-firmware for 2023.2_5443 updated for xilsem changelog xilpm: versal_net: server: add power rail checks for LPD domain xilpm: versal_net: server: add power rail checks for FPD domain xilpm: versal_net: server: add power rail checks for pl domain xilpm: versal_net: server: add power rail checks for np domain xilpm: versal_net: server: add power rail checks for cpm domain xilpm: versal_net: server: Update rail status for PMC xilpm: versal_net: server: add support to check and control power rail status xilpm: versal_net: server: Add pmc global and sysmon registers xilpm: server: Remove unnecessary validation of arguments xilpm: versal_commom: server: Add power rail support for Versal NET Updated changelog updated for license and copyright Doxygen fixes - xilpdi Doxygen fixes - xilplmi Doxygen fixes - xilloader Doxygen fixes - versal_plm xilplmi: updated algorithm & return values xilloader: updated algorithm & return values xilpdi: updated algorithm & return values xilpm:versal_net: enable isolation during system reset xilpki: Update examples notes description Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 25c24fe4..6e401591 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "2e9f85579e203d76b983ff21c4294a8c3d578942" -ESW_REV[2023.2] = "3deba273b5c03e2257c266d05ef10fed8eab4286" +ESW_REV[2023.2] = "f905278200ebbd408095de90611923c8314e1d1e" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From bfb7a67e7ded095a246b1e27142d2d8eb0531dab Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 11 Apr 2023 20:30:09 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_9251 sdps: Fix doxygen warnings freertos10_xilinx: ARM_CR5: Use group 1 interrupts for CortexR52 scugic: Use IRQ for CortexR52 interrupts by default Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 6e401591..c38d02f3 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "2e9f85579e203d76b983ff21c4294a8c3d578942" -ESW_REV[2023.2] = "f905278200ebbd408095de90611923c8314e1d1e" +ESW_REV[2023.2] = "6696e1ceced046865acc9609a3fbb807cc20e6be" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From b7faca8b6b82d76e55b48f9b80a00fed53214d62 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 12 Apr 2023 14:54:01 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_7003 dfeofdm: Update documentation lib: sw_apps: memory_tests: Update copyright year lib: bsp: Added support to- use ttc as sleeptimer for cortexR52 Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index c38d02f3..57740a1d 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "2e9f85579e203d76b983ff21c4294a8c3d578942" -ESW_REV[2023.2] = "6696e1ceced046865acc9609a3fbb807cc20e6be" +ESW_REV[2023.2] = "7764cc205ef8e016ed6420b9c722664d7a9ec3dc" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 8c32e90f438b92b4f52b3e942fb60eacd5bec842 Mon Sep 17 00:00:00 2001 From: Mark Hatle Date: Wed, 12 Apr 2023 15:30:04 -0700 Subject: xilinx-standalone.inc: Remove security_flags.inc Inclusion of security_flags.inc lead to a number of problems with the baremetal distributions: *ARM v8* aarch64-xilinx-elf-ld: testA53.elf: error: PHDR segment not covered by LOAD segment aarch64-xilinx-elf-ld: warning: testA53.elf has a LOAD segment with RWX permissions *ARM v7* arm-xilinx-eabi-ld: .../aarch32-xilinx-eabi/usr/lib/thumb/v7-a+fp/hard/crtbegin.o: relocation R_ARM_THM_MOVW_ABS_NC against `a local symbol' can not be used when making a shared object; recompile with -fPIC The configuration that works: export CFLAGS=" -O2 -pipe -g -feliminate-unused-debug-types " export CXXFLAGS=" -O2 -pipe -g -feliminate-unused-debug-types " export LDFLAGS="-Wl,-O1 -Wl,--hash-style=gnu -Wl,--as-needed -Wl,-z,relro,-z,now" export CPPFLAGS="" Configuration that provides the warnings/errors: export CFLAGS=" -O2 -pipe -g -feliminate-unused-debug-types " export CXXFLAGS=" -O2 -pipe -g -feliminate-unused-debug-types " export LDFLAGS="-Wl,-O1 -Wl,--hash-style=gnu -Wl,--as-needed " export CPPFLAGS="" The LDFLAGS was introdued by the security_flags.inc, the SECURITY_CFLGAS:class-target ?= "" and SECURITY_LDFLAGS:class-target ?= "" was supposed to prevent this, however the cross compiler is built in the cross or canadian-cross or other context and NOT target. Additionally the SDK environment is configured in the nativesdk environment, so the default values may not match the configured (target) compiler and CFLAGS. Removing security_flags.inc resolves both of these issues, as the security flags don't really do anything on a baremetal configuration, by default, anyway. Signed-off-by: Mark Hatle --- meta-xilinx-standalone/conf/distro/xilinx-standalone.inc | 4 ---- 1 file changed, 4 deletions(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/conf/distro/xilinx-standalone.inc b/meta-xilinx-standalone/conf/distro/xilinx-standalone.inc index 4b51dd1b..f86a5971 100644 --- a/meta-xilinx-standalone/conf/distro/xilinx-standalone.inc +++ b/meta-xilinx-standalone/conf/distro/xilinx-standalone.inc @@ -39,12 +39,8 @@ TOOLCHAIN_HOST_TASK:append:sdkmingw32 = " nativesdk-mingw-w64-winpthreads" # do so. DISABLE_STATIC:class-target ?= "" -SECURITY_CFLAGS:class-target ?= "" -SECURITY_LDFLAGS:class-target ?= "" - require conf/distro/include/no-static-libs.inc require conf/distro/include/yocto-uninative.inc -require conf/distro/include/security_flags.inc INHERIT += "uninative" BB_SIGNATURE_HANDLER ?= "OEEquivHash" -- cgit v1.2.3-54-g00ecf From a5fc01aca27a5e504fa1e5e82abec4ec0d5228b2 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Mon, 17 Apr 2023 12:49:46 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_4219 versal_psmfw: versal_net: set local power state at last emacps: example: Fix GEM1 base address check. Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 57740a1d..8500c598 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "2e9f85579e203d76b983ff21c4294a8c3d578942" -ESW_REV[2023.2] = "7764cc205ef8e016ed6420b9c722664d7a9ec3dc" +ESW_REV[2023.2] = "448abaa11ad5fc71a2910a7e30c38f09a277eca0" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 9f1a6d2a5d98b8b836c313aa1cde205a990db82a Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 20 Apr 2023 13:32:45 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_8743 rfdc: Enable workaround for a specific version of libidn.so needed by cmake XilinxProcessorIPLib: drivers: aiengine: Add support for system device-tree flow plm: versal: Remove xplm_modules from PPU1 RAM XilinxProcessorIPLib: drivers: CMakeLists.txt: Add required cmake meta-data for libxil xilpuf: Fix PUF auxiliary convergence error versal_psmfw: versal_net: reduce partition count xilpm: versal: server: Update BFR-B pre-config sequence Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 8500c598..777eb31a 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "2e9f85579e203d76b983ff21c4294a8c3d578942" -ESW_REV[2023.2] = "448abaa11ad5fc71a2910a7e30c38f09a277eca0" +ESW_REV[2023.2] = "0a86a22212eb3ade44ca71f513c4b3fa1d2d17ac" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 8b1dce3e37e45b6fb832ffe2f51522bef955dcfe Mon Sep 17 00:00:00 2001 From: Mark Hatle Date: Thu, 27 Apr 2023 13:42:59 -0500 Subject: xlnx-embeddedsw: Move to release branch and commit Signed-off-by: Mark Hatle (cherry picked from commit 2ba0c89b9aae7459b3d9e3c328c1db3fea4dc617) Signed-off-by: Mark Hatle --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 777eb31a..409da1e8 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -3,11 +3,11 @@ ESW_VER ?= "${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or 'master' REPO ??= "git://github.com/Xilinx/embeddedsw.git;protocol=https" -ESW_BRANCH[2023.1] = "xlnx_rel_v2023.1-next" +ESW_BRANCH[2023.1] = "xlnx_rel_v2023.1" ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" -ESW_REV[2023.1] = "2e9f85579e203d76b983ff21c4294a8c3d578942" +ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" ESW_REV[2023.2] = "0a86a22212eb3ade44ca71f513c4b3fa1d2d17ac" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" @@ -15,7 +15,7 @@ EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH' EMBEDDEDSW_SRCURI ?= "${REPO};${EMBEDDEDSW_BRANCHARG}" LICENSE = "MIT" -LIC_FILES_CHKSUM[xlnx_rel_v2023.1-next] = '15386ea7656d3b83815bce88c0bbe66d' +LIC_FILES_CHKSUM[xlnx_rel_v2023.1] = '3c310a3ee2197a4c92c6a0e2937c207c' LIC_FILES_CHKSUM[master-next] = '15386ea7656d3b83815bce88c0bbe66d' LIC_FILES_CHKSUM ??= "file://license.txt;md5=${@d.getVarFlag('LIC_FILES_CHKSUM', d.getVar('BRANCH')) or '0'}" -- cgit v1.2.3-54-g00ecf From b2d6f56aa9cff8eeab271a9f77e7e91283b91fe0 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Sat, 29 Apr 2023 08:53:05 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_7755 lib: bsp: standalone: Include bspconfig.h in boot.S for system device-tree flow lib: bsp: standalone: Use XScuGic_LookupConfigBaseAddr() API for xsct flow Update addtogroup to Overview and AMD copyright versal_rpu_bsp: Fixed some MISRA-C violations. xilpm: versal_net: client: add idle call back support zynqmp_pmufw: bypass smmu during suspend Updated change logs for plm & its libraries lib: sw_services: xiltimer: Fix ifdef check in the microblaze_sleep.c lib: bsp: standalone: Fix race conditions in the versal r5 mpu.c lib: bsp: standalone: Fix race conditions in the A72 translation table update Embedded SW license file for 2023.1 Revert "XilinxProcessorIPLib: drivers: aiengine: Add support for system device-tree flow" freertos: gicv3: check group 1 IAR in NS EL1 irq handler iomodule: Updated data types for few variables. iomodule: Typecasting condition expressions with bool. iomodule: Added parentheses to Expressions. iomodule: Added U to Numericals. sw_services: xilplmi: Address third party review comments sw_services: xilplmi: Fix third party review comments xilsem: Add support for psxl IP name sw_services:xilloader:updated examples to support versalnet XilNvm:Voltage, Temp Monitoring before efuse program lib: sw_apps: freertos_hello_world: Add support for system device-tree flow ThirdParty: bsp: freertos10_xilinx: Add support for system device-tree flow lib: sw_apps: memory_tests: Add support for system device-tree flow XilinxProcessorIPLib: drivers: iomodule: Add support for system device-tree flow XilinxProcessorIPLib: drivers: ipipsu: Add support for system device-tree flow XilinxProcessorIPLib: drivers: common: Add meta-data required for system device-tree flow XilinxProcessorIPLib: drivers: tmrctr: Add support for system device-tree flow XilinxProcessorIPLib: drivers: scugic: Add support for system device-tree flow XilinxProcessorIPLib: drivers: csudma: Add support for system device-tree flow XilinxProcessorIPLib: drivers: ttcps: Add support for system device-tree flow XilinxProcessorIPLib: drivers: uartpsv: Add support for system device-tree flow XilinxProcessorIPLib: drivers: uartps: Add support for system device-tree flow lib: sw_services: xiltimer: Add support for system device-tree flow scripts: Add linker template and processor spec files cmake: Add required cmake meta-data lib: bsp: standalone: src: common: Much needed improvements in xinterrupt_wrap.c lib: bsp: standalone: Add meta-data for the system device-tree flow lib: bsp: standalone: Update common code to support system device-tree flow lib: bsp: standalone: Add support for microblaze in system device-tree flow lib: bsp: standalone: Add support for cortexr5 in system device-tree flow lib: bsp: standalone: Add support for ARMv8 in system device-tree flow Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 409da1e8..94e7d4d5 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "0a86a22212eb3ade44ca71f513c4b3fa1d2d17ac" +ESW_REV[2023.2] = "69b70af59ec418d5c4d6e108b5bc7e537a181813" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" @@ -16,7 +16,7 @@ EMBEDDEDSW_SRCURI ?= "${REPO};${EMBEDDEDSW_BRANCHARG}" LICENSE = "MIT" LIC_FILES_CHKSUM[xlnx_rel_v2023.1] = '3c310a3ee2197a4c92c6a0e2937c207c' -LIC_FILES_CHKSUM[master-next] = '15386ea7656d3b83815bce88c0bbe66d' +LIC_FILES_CHKSUM[master-next] = '3c310a3ee2197a4c92c6a0e2937c207c' LIC_FILES_CHKSUM ??= "file://license.txt;md5=${@d.getVarFlag('LIC_FILES_CHKSUM', d.getVar('BRANCH')) or '0'}" SRC_URI = "${EMBEDDEDSW_SRCURI}" -- cgit v1.2.3-54-g00ecf From f11a18da99cc8218f7269114598c19d012cbe714 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 3 May 2023 10:25:38 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_6171 sw_services:xilloader:Add partial pdi loading from Image Store BSP: cortexr5: Separate out CortexR52 MPU APIs asm_vectors: fix kernel boot header sw_apps: zynqmp_pmufw: Add support of parallel build Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 94e7d4d5..cba896e2 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "69b70af59ec418d5c4d6e108b5bc7e537a181813" +ESW_REV[2023.2] = "d857676733ca92a65f120b5141ba213c367e3127" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From df359346b2898d4443523bde1667c3c14cd83ad8 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 10 May 2023 15:33:17 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_2895 sw_services: xilloader: Redundancy check implemented incorrectly xilloader: versal_net: Added support for cluster flags in ATF handoff params xilpm: versal_net: server: add PMC_GPIO device in pre-alloc list xilplmi: Update default WDT timeout for VERSAL_NET sw_services:xilsecure:Fix xilsecure sha client example failure csudma: Fix Assert condition in XCsuDma_Transfer for VERSAL_NET lib: bsp: standalone: Update R5 ZyqnMP CMakeLists.txt as per latest soucre file xilplmi: versal_net: Fix PMC IRO frequency logic zynqmp_pmufw: Remove API ID enum xilpm: versal: common: Remove API ID enum xilpm: versal_net: common: Remove API ID enum xilpm: zynqmp: client: Remove API ID enum lib: bsp: standalone: Move API ID enum to common place prd: Increment driver version, copyright and addtogroup version prc: Increment driver version, copyright and addtogroup version dfxasm: Increment driver version, copyright and addtogroup version devcfg: Increment driver version, copyright and addtogroup version sw_apps: img_rcvry: Added support for kd240 boards lib: sw_apps: freertos: Enable lwip examples for Versal-Net lib: sw_apps: Enable lwip standalone examples for Versal-Net. lwip213: Add Versal-Net support for PS GEM. Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index cba896e2..4a51f54d 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "d857676733ca92a65f120b5141ba213c367e3127" +ESW_REV[2023.2] = "d59cf90656ccee564c031d881e20cf89256ae964" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 0b51a1e51d6ca8c28e96d47e10945be60626f3ea Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 11 May 2023 12:49:36 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_5935 xilpm: versal_net: server: fix gcc warnings sw_services:xilnvm:Fix bug in reading PUF secure control bits bsp: standalone: Fixed source code-format issue. zynqmp_rpu_bsp: Fix standalone coverity static analysis sw_services: xilmailbox: Updated XIpiPs_PollforDone logic to improve AES client performance sw_services: xilsecure:Fixed MISRA C violation for Rule 10.3 sw_services: xilsecure:Fixed MISRA C violation for Rule 12.2 sw_services: xilsecure:Fixed MISRA C violation for Rule 2.5 sw_services: xilsecure:Fixed MISRA C violation for Rule 12.1 sw_services: xilsecure:Fixed MISRA C violation for Rule 8.3 csudma: examples: Add support for system device-tree flow csudma: Format examples using checkpatch scugic: Initialize priority of SGI and PPI interrupts Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 4a51f54d..8197f589 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "d59cf90656ccee564c031d881e20cf89256ae964" +ESW_REV[2023.2] = "838ac9a3a8e4636b827df504bd7f3e0a2c527f65" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 9a4ea3c3ea7272c67f220cbef6d4b8beb6cf8673 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 11 May 2023 16:06:29 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_7275 xilpm: versal_common: server: Add support for HNICx_NTHUB BISR xilpm: versal_common: server: Add support for FPDx BISR xilpm: versal_common: server: Add support for LPDx BISR dfeprach: Set NCO config for RCId=0 fix sw_apps: psmfw: versal_net: Add support of parallel build sw_apps: psmfw: versal: Add support of parallel build sw_services: xilnvm: Fix GCC warning sw_services: xilsecure: Add SHA384 KAT XilNvm: Handle the CDO command, whose payload is more than 8 words on chunk boundary sw_apps: Support empty application and hello world template for RISC-V sw_apps: Update copyright for empty application and hello world sw_apps: Add empty_application and hello_world templates Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 8197f589..1026cb83 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "838ac9a3a8e4636b827df504bd7f3e0a2c527f65" +ESW_REV[2023.2] = "fd5442970e5c0bbc84d0ce566c5b3befb8b40b67" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 60aa5d5b0fbf4e0be155a57b1082bc01e350f0ca Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 12 May 2023 15:24:36 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_3575 dfeprach: Dual and single mode calculation fix plm:versal: Remove dummy function in XILSEM interface xilsem: Adds support for versal net Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 1026cb83..cc95602a 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "fd5442970e5c0bbc84d0ce566c5b3befb8b40b67" +ESW_REV[2023.2] = "2a66ae6a303f2eecf20f0611468e6166d0d37e41" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 9eb6a8ad35c45edca4fbc19d14ba288ad5c10383 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Mon, 15 May 2023 12:50:21 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_6027 plm:versal: Add STL invocation in hook after PMC CDO Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index cc95602a..3aa485fc 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "2a66ae6a303f2eecf20f0611468e6166d0d37e41" +ESW_REV[2023.2] = "1cb3b109609a50288a053f952b59f8609004256c" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From df85ba08e72ad318c943f642f23abdf608360c1b Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 19 May 2023 15:09:11 +0530 Subject: Updated SRCREV for 2023.2_3567 Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc | 2 +- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc index 49959d28..86d2d089 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc @@ -2,7 +2,7 @@ UBOOT_VERSION = "v2023.01" UBRANCH = "xlnx_rel_2023.2-next" -SRCREV = "9afbec02663ee0ddac4d7377cf36993adee2cb8a" +SRCREV = "3e3ec0db0559cf2c4e5aa0cbd39871d1a1874470" LICENSE = "GPL-2.0-or-later" LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897" diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 3aa485fc..5511c678 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "1cb3b109609a50288a053f952b59f8609004256c" +ESW_REV[2023.2] = "52c08574a1bf82b0cad10237102d8518f943c15f" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From a44993c264b98af526adcec3e1bddbd000c230fa Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 23 May 2023 12:50:47 +0530 Subject: Updated SRCREV for 2023.2_5223 Signed-off-by: Siva Addepalli --- meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb | 2 +- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb index 61de6a6b..af8a1337 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb @@ -2,5 +2,5 @@ require qemu-devicetrees.inc BRANCH ?= "master" -SRCREV ?= "8e4c77b85fac2179b54834f976abd6fbda1534fd" +SRCREV ?= "c01252137059170d8677752edff6db570ffc1bd7" diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 5511c678..27e4f23c 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "52c08574a1bf82b0cad10237102d8518f943c15f" +ESW_REV[2023.2] = "c4f39dd7a8bc95705d805ca9502a5cacd5fceceb" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 60de297f3ec6a37153cfe301846cabdbd0de7257 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Sun, 28 May 2023 09:55:48 +0530 Subject: Updated SRCREV for 2023.2_1891 Signed-off-by: Siva Addepalli --- .../recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb | 2 +- meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb | 2 +- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb index 2bcbe7d4..d26213c5 100644 --- a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb +++ b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb @@ -1,5 +1,5 @@ ATF_VERSION = "2.8" -SRCREV = "c9b71dc96f3f18ca94cad590612aae3224c8c84d" +SRCREV = "ac281821d7dc15ec3fa8ca5d73f9b0ac2284e8d7" BRANCH = "xlnx_rebase_v2.8" LIC_FILES_CHKSUM = "file://license.rst;md5=1dd070c98a281d18d9eefd938729b031" diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb index af8a1337..bc45e330 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb @@ -2,5 +2,5 @@ require qemu-devicetrees.inc BRANCH ?= "master" -SRCREV ?= "c01252137059170d8677752edff6db570ffc1bd7" +SRCREV ?= "987676c3c781d261279e00c0d21e5d1d0638a756" diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 27e4f23c..cc1e3160 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "c4f39dd7a8bc95705d805ca9502a5cacd5fceceb" +ESW_REV[2023.2] = "ca4d918ea4675d8eba73c37d4de4d598e3f87104" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From a0cfd3ab871ccf0cbf7e2dc5400631a24dfe8b66 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Mon, 29 May 2023 12:50:09 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_1759 Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index cc1e3160..30071bdd 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "ca4d918ea4675d8eba73c37d4de4d598e3f87104" +ESW_REV[2023.2] = "dcbff5556c6412880a4d7d37e0961bd0dc5de41d" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From c0fb636ce4eaa5baa1d8b332abc7b80f3d6a2ad2 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Mon, 29 May 2023 14:49:06 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_2091 Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 30071bdd..cc1e3160 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "dcbff5556c6412880a4d7d37e0961bd0dc5de41d" +ESW_REV[2023.2] = "ca4d918ea4675d8eba73c37d4de4d598e3f87104" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 63a9db735a89f18baa79f1c571cdd094d252a771 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 31 May 2023 17:39:34 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_9623 Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index cc1e3160..cd338ab3 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "ca4d918ea4675d8eba73c37d4de4d598e3f87104" +ESW_REV[2023.2] = "b236be2782cc4141990094eed6df790beb0c0e2b" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 219d51b5d9db753513f5e3a47d3e56bb4919ef71 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Mon, 5 Jun 2023 18:19:55 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_2463 sw_services: xilpuf: Check if IRO frequency update is required sw_services:xilocp:Fix circular buffer issues during HWPCR logging xilplmi:Fixed doxygen warnings lib: bsp: standalone: Document the PM_IOCTL API version bumpup changes sw_services: xilpm: versal: Zeroization of AIE2 data memory separately sw_services: xilpm: versal: Zeroization of AIE1 data memory separately sw_services: xilpm: versal: Zeroization of AIE data memory separately. qspipsu: Fix code format issue qspipsu: Update sector calculation logic sw_services: xilnvm: Support to read HWTSTBITS_DIS and PMC_SC_EN bits sw_services: xilcert: Modified logic for storing user configuration ttcps: Update check for MatchValue and IntervalValue as per platform ttcps: Fix code formatting issues with checkpatch emacps: example: Add Clock settings to Versal Net Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index cd338ab3..3efd09cd 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "b236be2782cc4141990094eed6df790beb0c0e2b" +ESW_REV[2023.2] = "767bd3ffb64dff29e47f5b632be8a17f9552d4c7" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 4d96344180957c913456c25ab91c5cfc01114908 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 7 Jun 2023 12:50:34 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_7439 freertos10_xilinx: Fix tick interrupt clearing logic freertos10_xilinx: Update copyright freertos10_xilinx: Fix checkpatch issues freertos10_xilinx: Update the standalone BSP dependency version Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 3efd09cd..cab77dbd 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "767bd3ffb64dff29e47f5b632be8a17f9552d4c7" +ESW_REV[2023.2] = "23c29ad3f35d1654f65fbe1ba1ac6280debf03dc" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From f7a092f2657d783b61e9da2becb03c4a1ef7ef2d Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 9 Jun 2023 12:35:43 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_3371 xilloader: Fix for compilation error when PLM_SECURE_EXCLUDE enabled versal_common: xpm_common: Make XPm_Out32 honor WPROT bit xilloader: SWPCR support in xilloader xilocp: Add SWPCR support in OCP library xilplmi: Add SWPCR related error codes xilsecure: Add Sha2-384 start, update and finish support OCP: Key generation and attestation endianness fix sw_services: xilsecure: Add KAT in client examples sw_services: xilpuf: Add KAT in examples Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index cab77dbd..8259f0a7 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "23c29ad3f35d1654f65fbe1ba1ac6280debf03dc" +ESW_REV[2023.2] = "ce7bee8b867f4a7c381aaa5a784fabec3299a8f5" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 4153ebc1a0889e63cf9a0c854d46fbaafadd7f8d Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Mon, 12 Jun 2023 15:20:06 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_6275 drivers: emacps: format xemacps.h file sw_services: xilmailbox: Fix code formatting issues with checkpatch xilmailbox: Add support for system device-tree flow for example sw_services: xilmailbox: Add support for system device-tree flow ipipsu: Fix code formatting issues with checkpatch ipipsu: Add support for system device-tree flow Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 8259f0a7..3edd5b3e 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "ce7bee8b867f4a7c381aaa5a784fabec3299a8f5" +ESW_REV[2023.2] = "ca05b7eb25b1584b07e8d1090489e2b67a4e18f9" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 4514c9d3fccb8fc572aa1c81478fb4c333f4f348 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 14 Jun 2023 15:53:33 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_3055 xilpki: Fix issues with pki mux selection/deselection logic sw_services: xilmailbox: Fix MISRA-C violation for Rule 10.3 Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 3edd5b3e..f1672c1d 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "ca05b7eb25b1584b07e8d1090489e2b67a4e18f9" +ESW_REV[2023.2] = "9e1225f624b31a23016776e4c0d7a52ca2595734" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 8e2f81f441d972ec4bf44a6942a96b19bd60042c Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 16 Jun 2023 19:31:21 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_9439 xilplmi: Log CDO command offset in GSW register freertos10_xilinx: Fix tick interrupt clearing logic cleanup xilnvm: Add support for Programming PUF secure control bits xilpuf: Add support for Programming PUF secure control bits lib: sw_services: xilfpga: Add support for system device-tree flow xilpm: versal_net: server: increase size of node buffer drivers: Update addtogroup to fix doxygen warnings. sw_apps: zynqmp_fsbl:versal_plm: Add support of parallel build ospipsv: Fix code format issues ospipsv: Add support for system device-tree flow for examples ospipsv: Add support for system device-tree flow sw_services: xilsecure:Support for P-256 sw_apps: imgsel: Vless build failure fix emacps: Support device-tree flow qspipsu: Fix code format issues qspipsu: Add support for system device-tree flow for example qspipsu: Add support for system device-tree flow sw_services:xilloader:Deprecate copy to memory feature dfeprach: Support dynamic and static modes of operation Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index f1672c1d..304111ef 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "9e1225f624b31a23016776e4c0d7a52ca2595734" +ESW_REV[2023.2] = "24d280717af8875360f9bf903bd3d7a74274ada4" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From bf745fd482cac2d4149a6bad52c0d6e77857a36b Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 21 Jun 2023 12:51:10 +0530 Subject: Updated SRCREV of embeddedsw for 2023.2_6063 qspipsu: Fix code format issues qspipsu: Fix interrupt transfer fail issue dfeccf: Function comment update lib: sw_services: xilfpga: Add example meta-data cortexa9_toolchain: Add toolchain file for cortexa9 processor esw: Remove hardcoded linker script for cortexr5 processor xilplmi: initialised IsKatRan state to false dfemix: Correct comment about gain dfeofdm: State and status upgrades avbuf: Print reference clock frequency being used dfeprach: Configure all trigger parameters in examples Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 304111ef..871f521a 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "24d280717af8875360f9bf903bd3d7a74274ada4" +ESW_REV[2023.2] = "440943de8aec7658fddb1d44e2211df6cf0c928f" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From ad718579e93808f6018840be4af19a11fddd023c Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 23 Jun 2023 15:31:07 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_4459 csudma: Add support for peripheral_tests in system device-tree flow lib: sw_apps: peripheral_tests: Add support for system device-tree flow lib: sw_apps: hello_world: Add support for system device-tree flow dfeccf: Depricate obsolete APIs lib: sw_apps: empty_application: Add support for system device-tree flow dfeprach: Depricate obsolete APIs dfemix: Depricate obsolete APIs Updated the files which had 755 to 644 xilsem: Update copyright information in xsem_ebdgoldendata.c xilloader: Allow only 1 failed attempt of AuthJtag failure when AUTH_JTAG_LOCK_DIS eFuse programmed updated for changelog and versal cdo Xilsecure: Fixed doxygen warnings XilOcp: Fixed doxygen comments ipipsu: Fix code formatting issues with checkpatch ipipsu: Restructure the code for more modularity wdttb: Correct the interrupt ID for Versal-net platform Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 871f521a..e344cfc5 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "440943de8aec7658fddb1d44e2211df6cf0c928f" +ESW_REV[2023.2] = "e0da77a0f94b87d9d22273b434fd1ef91675fb88" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 7124ef2c704c85cb443743f94454cc13a6d0c445 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 28 Jun 2023 12:51:28 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_5247 xilpm: versal: server: Remove conditional compile of WaitForPowerRailUp freertos10_xilinx: Update handling on error condition freertos10_xilinx: Fix the interrupt id for xiltimer use cases freertos10_xilinx: Update copyright freertos10_xilinx: Update freertos intr example to fix code fomatting riscv: riscv_interface: Fix code formatting issues BSP: riscv: Fix sleep related macros xilpm: Set CKE low during Memory Device Power-Down lib: standalone: Adding xparameters_ps.h for A9 bsp lib: sw_services: xiltimer: Generate COUNTS_PER_SECOND and XSLEEPTIMER_FREQ macro lib: bsp: Update Zynq translation table to use the SDT specifc DDR macros lib: bsp: Support for zynq specific BSP in System device-tree flow lwip213: Add device-tree cmake files. lwip213: Add lwip configs metadata lwip213: port deviations for device-tree flow lwip213: Add device-tree yaml file usb: usbpsu: examples: Update the examples to support SDT flow and wrapper API usb: usbpsu: data: add interrupt to support SDT flow usb: usbpsu: src: update the driver to support SDT flow scripts: lscript_mb.ld.in: Fix stack and heap size sw_apps:dhrystone: Add support for SDT flow cmake: Add toolchain file for Microblaze lib: Add support for Microblaze dfeofdm: Depricate obsolete APIs xilpm: versal_common: Remove unused variables canfd: Fix code formatting issues with checkpatch canfd: Add support for system device-tree flow for example canfd: Add support for system device-tree flow canfd: Update library version for 2023.2 DP14RXSS: Updated addtogroup in all the driver files DP14RXSS: Incremented driver version DP14RXSS: TCL file is modified to remove 0 xilpm: versal: server: DVS of power rail using GPIO usb: usb: src: Update addtogroup to fix doxygen warnings usb: usb: Incremented driver version to 5.6 and copyright usb: usbps: src: Update addtogroup to fix doxygen warnings usb: usbps: Incremented driver version to 2.8 and copyright usb: usbpsu: src: Update addtogroup to fix doxygen warnings usb: usbpsu: data: Incremented driver version to 1.14 xilplmi: Log PLM Error before deferring xilplmi: Add unique error code support for mask poll Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index e344cfc5..a45bb217 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "e0da77a0f94b87d9d22273b434fd1ef91675fb88" +ESW_REV[2023.2] = "8776c1d369173092a6c5512994bf5191151bda29" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 9f2dd0887b13d7a58d774d100b79c644f18b4a8b Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 28 Jun 2023 15:07:06 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_7051 uartpsv: Fix code format issues uartpsv: Add support for system device-tree flow for uartpsv example uartpsv: Add uartpsv examples list in yaml axipmon: Fix code formatting issues with checkpatch axipmon: Add support for system device-tree flow for examples axipmon: Add support for system device-tree flow Revert "wdttb: Correct the interrupt ID for Versal-net platform" scugic: Fix code formatting issues scugic: Make SGI as Group1 interrupt for Cortex-R52 Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index a45bb217..8ecac2e9 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "8776c1d369173092a6c5512994bf5191151bda29" +ESW_REV[2023.2] = "8a6c14d1cc5d923466025a5ad83b9b816670d5b0" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From b112aded8a929c11f4d71b2d7987f6c5d99434c7 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 30 Jun 2023 16:53:26 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_4319 esw: Update the compiler flags for system device-tree flow cmake: UserConfig: Add more user options lib: sw_apps: Update the memory tests and dhrystone yaml supported processor for cortexa9 processor lib: sw_apps: Use print_elf_size() macro for printing elf size cmake: Generate elf.size file when building the embedded application cmake: Add helper macro for printing the size of the target pmonpsv: Driver is going to be deprecated as IP feature is not part of Versal TRM xilpm: versal_common: server: Memory region node skeleton usb: usbpsu: src: Add SDT check for interrupt and interrupt parent uartps: Add support for system device-tree flow for uartps examples uartps: Add uartps examples list in yaml Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 8ecac2e9..49bb8ce2 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "8a6c14d1cc5d923466025a5ad83b9b816670d5b0" +ESW_REV[2023.2] = "7b32e8799d7733ff5e450699ced43dc355e81389" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From fc94b1dfffc57711f0c00505941f656b8f50ed4c Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 4 Jul 2023 17:55:47 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_8643 sw_apps: zynqmp_pmufw: MPSoC PMU MIO Reset Pin Control sw_services: xilpm: Integrate xilpm into vitisng/rigel flow versal: psmfw: Integrate psmfw into vitisng/rigel flow sw_apps: zynqmp_pmufw: Integrate pmufw into vitisng/rigel flow xilpm: server: Add support for device security, coherency and virt handling in Versal Net FB_Wr Driver: Updated addtogroup in driver src directory FB_Wr Driver: New video format to driver changes are added - Y_U_V8_420 FB_Wr Driver: Incremented driver version to v4.7 xilpm: versal: server: Add support for DDRMC5c pre-config xilpm: versal_common: server: XPm_WritePggs and XPm_ReadPggs bug fix xilpm: versal_net: server: Add CPM5N Bisr support xdmapcie: Update mdd version xdmapcie: Fix BAR allocation to consider maximum xdmapcie: Fix macro declaration for header type mask xdmapcie: Fix the BAR allocation issues based on requests. xdmapcie: Update copyright year SDITXSS Driver: Updated addtogroup driver in src files SDITXSS MDD: Incremented Driver version to v4_3 SDITXSS Driver: Modified Driver TCL file to correct device id value wdttb: Fix code format issue wdttb: Correct the interrupt ID for Versal-net platform rtcpsu: Fix code formatting issues with checkpatch rtcpsu: Add support for system device-tree flow for examples. rtcpsu: Add support for system device-tree flow client: Add specific error codes for failure cases server: Add specific error codes for KAT failure cases xilpm: CPPUTEST macro added to files xilpm: versal: SSIT temperature propagation xilrsa: Added Rigel support drivers: Fix code formatting issues with checkpatch drivers: Update doxygen documentation csudma: Fixed code formatting issue using checkpatch tool csudma: Update DCache operation for R52 bsp: standalone: Add xpm support for versal and versal net xilpm: Add SMC support for Request node, Reset Assert and Release Node canfd: Add support for request/release node canfd: Invoke XCanFd_stop function to release canfd node Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 49bb8ce2..039b11da 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "7b32e8799d7733ff5e450699ced43dc355e81389" +ESW_REV[2023.2] = "ef08558128ad75f34df43e59b57928519a56fbf9" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 530aa59e0b8d5d1fd294f363409cc7d8cf989341 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 6 Jul 2023 12:50:46 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_5299 lib: sw_apps: empty_application: Add missing endif() at the end of the source v_frmbuf_rd: Modified addtogroup in driver src directory v_frmbuf_rd: New video format support is added to driver - Y_U_V8_420 v_frmbuf_rd: MDD version is modified to v4.7 xilpuf: Add IPI Access permissions for PUF module xilocp: Add IPI Access permissions for OCP module xilsecure: Add IPI Access permissions for Secure module xilnvm: Add IPI Access permissions for NVM module xilloader: Add IPI Access permissions for Loader module xilplmi: Add IPI Access permissions for Error module xilplmi: Add SSIT Msg event access validation xilplmi: Add IPI access filtering support xdmapcie: Adds support for SDT flow devcfg: Add support for system device-tree flow Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 039b11da..feded345 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "ef08558128ad75f34df43e59b57928519a56fbf9" +ESW_REV[2023.2] = "e328b74c6bbdb79124b2062e0c0deb17dc1ab7fb" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From f93df9425d74cbefbf0a058795045d835f05ad2b Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 6 Jul 2023 16:21:06 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_8291 canps: Fix code formatting issues with checkpatch canps: Add support for system device-tree flow for example canps: Add support for system device-tree flow dfeofdm: Add phase compensation calculation scripts: linker_files: Move the drvcfg_sec to the appropriate location xilsecure: Add crypto check in features command xilcert: Store the Signature of TBS certificate wdtps: Fix code formatting issues with checkpatch wdtps: Add support for system device-tree flow for examples wdtps: Add support for system device-tree flow sw_services:xilocp: Added xilocp library support on soft microblaze iomodule: Generate the MAX_INTR_SIZE define in the xparameters.h file XilinxProcessorIPLib: drivers: tmr_inject: Add support for system device-tree flow XilinxProcessorIPLib: drivers: tmr_manager: Add support for system device-tree flow v_hdmitx1: Move DSC Decoder Error Callback from Lts2 to LtsP xdmapcie: Fix the yaml syntax issue mutex: Fix code formatting issues with checkpatch mutex: Add support for system device-tree flow for example mutex: Add support for system device-tree flow Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index feded345..9902f267 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "e328b74c6bbdb79124b2062e0c0deb17dc1ab7fb" +ESW_REV[2023.2] = "19cd1b5f7cb894a5e4b8da85ea04debe0f7b21dc" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From e29dc42309fbe3f4c4d6c3b0a0adac9cba7e8974 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 7 Jul 2023 16:52:57 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_7231 axicdma: Fix code formatting issues with checkpatch axicdma: Add support for system device-tree flow in examples axicdma: Add support for system device-tree flow lib: sw_services: xilpm: Include pm config object sources in CMakeLists.txt lib: bsp: standalone: Update the CMakeLists.txt to include pm_api_version.h header usbpsu: Don't pull microblaze_sleep.h in system device-tree flow lib: sw_apps: zynqmp_pmufw: Update the CMakeLists.txt to inline with latest changes lib: sw_apps: versal_psmfw: Update the CMakeLists.txt to inline with latest changes prc: Fix code formatting issues with checkpatch prc: Add support for system device-tree flow dfeprach: Add SDT support dfemix: Add SDT support dfeequ: Add SDT support cmake: esw: Improve the cmake configure time freertos10_xilinx: Add XPM_SUPPORT flag for versal and versal net bsp: standalone: Update versal and versal net order in NodeId/ResetId list ttcps: Add support for ttc request node prd: Fix code formatting issues with checkpatch prd: Add support for system device-tree flow dfeccf: Add SDT support sw_services: xilsecure: Add example for ECDH sw_services: xilsecure: Add wrapper API for ECDH sw_services: xilsecure: Support to generate shared secret with user private key sw_services: xilocp: Support to generate shared secret with DevAk private key xilpm: versal_common: client: remove ClientWakeup Call zdma: Fix code formatting issues with checkpatch zdma: Add support for system device-tree flow in examples zdma: Add support for system device-tree flow xilpm: versal_net: server: clear the pwrctrl register sd_fec: Modifications for SDT flow Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 9902f267..318e7778 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "19cd1b5f7cb894a5e4b8da85ea04debe0f7b21dc" +ESW_REV[2023.2] = "d65e8f2ce7fdbd09ec60087daa10bf0e89a771e9" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 4a80aacb60eab96543dc981f4376ec529246a725 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 11 Jul 2023 12:50:55 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_3019 usb: usb: examples: Modify examples to SDT flow usb: usb: data: add interrupt to support SDT flow usb: usb: src: update the driver to support SDT flow usb: usb: examples: remove the powerpc support sw_services:xilsecure:Fixed compilation error for trng client example xilpm: server: Fix MISRA-C violation for Rule 20.9 sw_services: xilcert: Fixes for doxygen and static analysis warnings sw_services: xilcert: Add support for Certificate Signing Request sw_services: Fixed issues related to OpenSSL parsing sw_services: xilcert: Add support for X.509 extensions sw_services: xilcert: Add support to create ASN.1 structures XilOCP: Handled device key generation during In place PLM update can: Fix code formatting issues with checkpatch can: Add support for system device-tree flow for example can: Add support for system device-tree flow axivdma: Fix code formatting issues with checkpatch axivdma: Add support for system device-tree flow in examples axivdma: Add support for system device-tree flow usb: usbpsu: data: add dependency_files in yaml examples BSP: Cortexr5: Fix logic to ensure that r52 timer is started before being used lib: bsp: standalone: Fix grammatical issues lib: bsp: standalone: Update pin_ctrl_config_param_set api version lib: sw_apps: zynqmp_dram_test: Fix code formatting issues with checkpatch lib: sw_apps: zynqmp_dram_test: Add support for system device-tree flow rfdc: Add SDT support dfeofdm: Add SDT support xilpm:versal_net: update ByteBuffer size plm:versal_net: add call to restore all nodes xilpm:versal_net: add custom update handler xilpm:versal_net: Add support PLM update for all XPm_Node types xilpm:versal_net: Add Node SaveRestoreHandler to support PLM update xilpm:versal_net: add AllNodes storage xilpm:versal_net: Add Subsystem SaveRestoreHandler to support PLM update. xilpm:versal_net: Add xpm_update which help inplace update libXilPm coresightps_dcc: Fix code formatting issues with checkpatch coresightps_dcc: Add support for system device-tree flow xilpki: Add PKI multi-queue support for ECC operations xilpm: versal_common: server: Add IPI Access permissions for PM module xilpm: versal_common: server: Add IPI Access permissions for PSM module lib: sw_apps: Fix unbalanced endif in empty application CMake sw_services: xilsecure: Added pwct support for P-256 lib: bsp: standalone: Add a new query id into doxygen table xilpm: versal_common: client: Add a new pin attribute query id xilpm: versal: server: Add API to provide MIO attributes Update addtogroup to Overview pciepsu: Add properties to support SDT flow hwicap: Fix code formatting issues with checkpatch hwicap: Add support for system device-tree flow xilsem: Add IPI Access permissions for XilSEM module Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 318e7778..037c6847 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "d65e8f2ce7fdbd09ec60087daa10bf0e89a771e9" +ESW_REV[2023.2] = "17152dc815c0a3954023b265fd7f6682c4fa5884" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From cb457fd89f6c84a4e8dba7d14fc41904cc7ec6bf Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 13 Jul 2023 13:49:37 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_7335 mbox: Fix code formatting issues with checkpatch mbox: Add support for system device-tree flow for examples mbox: Add support for system device-tree flow usb: usb: fix code formatting issues with checkpatch Revert "sw_services:xilloader:Enable TCM Boot based on PH Attribute" Revert "xilpm: versal_net: enable TCM Boot config option" DSITXSS: Updated addtogroup to remove version number in src files. DSITXSS: Incremented driver version to v2_3 DSITXSS: Updated driver tcl file to support Compressed mode sw_services:xilloader:Enable TCM Boot based on PH Attribute xilpm: versal_net: enable TCM Boot config option llfifo: Add support for system device-tree flow for example llfifo: Add support for system device-tree flow llfifo: increment the driver version usb: usbps: examples: Add support for system device-tree flow usb: usbps: data: add yaml to support SDT flow usb: usbps: src: update the driver to support SDT flow sw_services: xilsecure:VersalNet:Added support for non-word aligned data transfer in AES ospipsv: examples: Fix compilation warnings in sdt flow ospipsv: src: Fix compilation warnings ospipsv: data: Update yaml file to port examples in sdt flow sw_services:xilloader: Add support to read DDR crypto counters sw_services:xilloader:IPI Command to support Jtag Unlock xiplmi: versalnet: Add List commands xilplmi: Refactor Proc logic to make it generic xilplmi: versalnet: Add Run Proc command XilSecure:Client:VersalNet:Separated IPI commands XilSecure:VersalNet:Server: Separated IPI calls for modules lwip213: Add zynq support in device-tree flow spips: Fix code formatting issues with checkpatch spips: Add support for system device-tree flow for examples spips: Add support for system device-tree flow Revert "pciepsu: Add properties to support SDT flow" axidma: Fix code formatting issues with checkpatch axidma: Add support for system device-tree flow in examples axidma: Add support for system device-tree flow lib: bsp: standalone: Update the stdin and stdout configuration for coresightps_dcc in sdt flow Xilsem:FreeRTOS support for XILSEM client xdmapcie: Add support for system device tree flow dfxasm: Fix code formatting issues with checkpatch dfxasm: Add support for system device-tree flow BSP: cortexr5: Support TCM A, B and C initialization for CortexR52 Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 037c6847..ac7360a6 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "17152dc815c0a3954023b265fd7f6682c4fa5884" +ESW_REV[2023.2] = "5236fdf00943be38b605e8847e08299c78dcbf33" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 2a59106360e00bdabbf95c361f7292d710bce86d Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 14 Jul 2023 18:03:16 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_1179 lwip213: Fix Cmake errors lib: sw_apps: openamp_rpc_demo: Add support for system device-tree flow lib: sw_apps: openamp_matrix_multiply: Add support for system device-tree flow lib: sw_apps: openamp_echo_test: Add support for system device-tree flow lib: sw_apps: libmetal demo: Add support for system device-tree flow ThirdParty: sw_services: OpenAMP: Add support for system device-tree flow ThirdParty: sw_services: Libmetal: Add support for system device-tree flow Implement Authentication time optimization gpiops: Fix code formatting issues gpiops: Add support for system device-tree flow for gpiops example gpiops: Add support for system device-tree zdma: fixed changes in header file uartlite: Fix code formatting issues uartlite: Add support for system device-tree flow for uartlite examples uartlite: Add support for system device-tree flow for uartlite nandps: Fix code formatting issues with checkpatch nandps: Add support for system device-tree flow for example nandps: Update the driver to support for system device-tree flow canps: Add support for peripheral tests in SDT flow iomodule: Fix race condition in XIOModule_DeviceInterruptHandler() API for sdt flow usb: usbpsu: fix code formatting issues with checkpatch SDITXSS: Modified addtogroup in all driver src files. SDITXSS: Incremented driver version dmaps: Fix code formatting issues with checkpatch dmaps: Add support for system device-tree flow in examples dmaps: Add support for system device-tree flow iic: Fix code formatting issues with checkpatch iic: Add support for system device-tree flow for iic examples iic: Add support for system device-tree flow uartns550: Fix code formatting issues uartns550: Add SDT support for uartns550 examples uartns550: Add support for system device-tree flow for uartns550 can: Add support for peripheral tests in SDT flow lib: sw_apps: zynq_dram_test: Add support for system device-tree flow sw_services:Added FIPS required info to VersalNet crypto algo sw_services: Added FIPS required info to Versal crypto algo sw_services:Added FIPS required info to ZynqMP crypto alg sw_services:Added code for versioning of secure lib v_hdmitxss1: updated the define for VEK280 v_hdmitxss1: uprevved the mdd v_hdmirxss1: updated define for VEK280 v_hdmirxss1: uprevved mdd Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index ac7360a6..0808c72a 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "5236fdf00943be38b605e8847e08299c78dcbf33" +ESW_REV[2023.2] = "138cbe3f272b79dfbaa7f80dfde039688f8612b5" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From b475d784f9a3ea2e18e775eb388a23ab4d532948 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 18 Jul 2023 12:51:07 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_7275 sw_services:xilloader:Enable TCM Boot based on PH Attribute xilpm: versal_net: enable TCM Boot config option clockps: Fix code formatting clockps: Add support for system device-tree flow for example clockps: Add support for system device-tree flow clockps: Increment the driver version for 2023.2 axis_switch: Add support for system device-tree flow in examples axis_switch: Add support for system device-tree flow axis_switch: Upgrade the driver version sw_apps: ddr_self_refresh: Fix code formatting issues with checkpatch sw_apps: ddr_self_refresh: Add support for system device-tree flow resetps: Fix formatting issues resetps: Add system-device-tree support for example resetps: Update the driver for system device tree flow resetps: Update the driver version tft: Add support for system device-tree flow for examples tft: Update the driver for system device tree flow tft: Update the driver version xilpm: versal_net: server: reset SD_DLL_MAP registers as workaround bsp:standalone: Add coresight IP to stdin/stdout bsp settings. coresightps_dcc: Add option of coresight uart in bsp settings. trafgen: Fix formatting issues trafgen: Update the examples to support SDT flow trafgen: update the driver to support SDT flow trafgen: Update the driver version sw_services:xilsecure: Add RSA pairwise consistency test sw_services:xilsecure:Add key unwrap support sw_services:xilsecure: Add OAEP padding support sw_services:xilloader: Move mask generate function to platform specific sw_services:xilsecure: Add mask generate function sw_services:xilsecure: Add AES ECB support ipipsu: Add example support in SDT flow bsp:standalone:Fix code formatting issues. bsp: To fix unused variables compilation warnings axicdma: updated files to support the system device tree flow axivdma: updated cmake to support device tree flow lib: sw_apps: hello_world: Delete unused helloworld_xmk.c lib: sw_apps: dhrystone: Fix compilation issues in sdt flow lib: sw_services: Update supported_processors list for a9 and VersalNet VersalNet PLM: Added MC uB and PMC handshake support xilpm: versal: server: fix compilation warning scripts: pyesw: scripts for generating apps and bsp in system device-tree flow nandpsu: Fix code formatting issues with checkpatch nandpsu: Add support for system device-tree flow for example nandpsu: Update the driver to support for system device-tree flow clk_wiz: Formatting changes clk_wiz: Update examples for SDT flow clk_wiz: Update driver for SDT flow. clk_wiz: Update the driver version gpio: Fix code formatting issues gpio: Add support for system device-tree flow fot gpio examples gpio: Add support for system device-tree flow openamp: apps: Add missing cmake toolchain file for SDT flow Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 0808c72a..8fbda388 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "138cbe3f272b79dfbaa7f80dfde039688f8612b5" +ESW_REV[2023.2] = "c0718491347a83ba40dbc96dfdb2130dd8743363" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 95a9c3f754aa1d188ec0a7ba8c7e6c770d1d2c31 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 19 Jul 2023 13:13:30 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_3455 emacps: Fix cfg ptr error xiltimer: Add proper checks freertos10_xilinx: Fix SDT flow for microblaze driver: trngpsv: added SDT support sw_services: xilmailbox: Add example support in SDT flow xilpm: versal_net: Save and Restore XPm_Reqm xilflash: Fix code formatting issues with checkpatch xliflash: Add AMD copyright information xilflash: Add support for system device-tree flow for example xilflash: Update lib to support for system device-tree flow lib: sw_apps: freertos_lwip_udp_perf_client: Add SDT code deviations lib: sw_apps: freertos_lwip_udp_perf_client: Add SDT metadata files lib: sw_apps: freertos_lwip_udp_perf_server: Add SDT flow deviations lib: sw_apps: freertos_lwip_udp_perf_server: Add SDT flow metadata files lib: sw_apps: freertos_lwip_tcp_perf_client: Add SDT deviations lib: sw_apps: freertos_lwip_tcp_perf_client: Add SDT metada files lib: sw_apps: freertos_lwip_tcp_perf_server: Add SDT deviations lib: sw_apps: freertos_lwip_tcp_server: Add SDT metadata lib: sw_apps: freertos_lwip_echo_server: Add SDT code deviations lib: sw_apps: freertos_lwip_echo_server: Add SDT Flow. lib: sw_apps: lwip_udp_server_client: Add SDT deviations lib: sw_apps: lwip_udp_perf_client: Add SDT metadata files lib: sw_apps: lwip_udp_perf_server: Add SDT flow deviations lib: sw_apps: lwip_udp_perf_server: Add SDT metada files lib: sw_apps: lwip_tcp_perf_client: Add SDT flow deviations lib: sw_apps: lwip_tcp_perf_client: Add SDT metadata files lib: sw_apps: lwip_tcp_perf_server: Add SDT deviations lib: sw_apps: lwip_tcp_perf_server: Add SDT metada files lib: sw_apps: lwip_echo_server: Add SDT flow deviations lib: sw_apps: lwip_echo_server: Add metadata for SDT flow sw_apps: srec_spi_bootloader: Fix style issues sw_apps:srec_spi_bootloader: Support SDT flow trafgen: Fix the disable interrupt uartns550: Add outbyte and inbyte in SDT flow axicdma: Add support for peripheral test in SDT flow cmake: Fix Microblaze BSP failure on windows cmake: Fix microblaze based toolchain files for windows uartlite: Add outbyte and inbyte in SDT flow sdps: Fix code format issues sdps: Add support for system device-tree flow for examples sdps: Add support for system device-tree flow xilffs: Fix code format issues xilffs: Add support for system device-tree flow for examples xilffs: Add support for system device-tree flow scripts: pyesw: library_utils: Update the gen_lib_metadata() API to generate pm_cfg_obj.c for xilpm library scripts: pyesw: library_utils: Fix race condition in populating the param value scripts: pyesw: create_example: Fix compilation errors on windows scripts: pyesw: config_bsp: Fix set_repo_path for windows scripts: pyesw: Update link libraries based on the available libraries in the bsp rfdc: Updated examples to SDT flow SDT: Update libmetal driver yamls hello_world/empty_app: Correct the processor names in the application yamls scugic: Adding a SDT check to not rely on one of the xparameter definition BSP: cortexr5: Fix SDT flow for CortexR5 BSP: cortexr5: Support SDT flow for CortexR52 BSP standalone: cortexr5: Moving the versal r5 specific files to CortexR5 folder standalone: CMakeLists/headers: Adding versal-net specific checks and R52 specific files linker_files: Adding support for versal-net specific linker files standalone: yaml: Adding versal-net specific entries in standalone yaml files cmake: toolchainfiles: Adding new toolchainfiles for versal-net rfdc: Fix issues with SDT sw_services:xilsecure:Loading partial PDI when SHA core is busy sw_services:xilsecure:Throw an error when AES/SHA is already in use tmrctr: Update signatures of examples being used in peripheral tests BSP: intr: Fix style issues tmrctr: Fix style issues intc: Fix style issues tmrctr: Port examples to SDT flow intc: Port examples to SDT flow intc: Add support for SDT flow BSP: Fix xinterrupt_wrap APIs for AXI INTC xxvethernet: Fix code formatting in examples xxvethernet: examples: Add support for system device-tree flow drivers: xxvethernet: Add device-tree flow support for xxvethernet axienet: Add support for system device-tree axienet: Update axienet driver to support SDT and non-SDT flows axienet: Update tcl script to support opensource macros axienet: Update driver version to 5.16 mcdma: Update driver to support SDT flow emaclite: examples: Update code formatting emaclite: examples: Add system device-tree flow support drivers: emaclite: Add support for device-tree flow iicps: Fix code formatting issues with checkpatch iicps: Add support for system device-tree flow for iicps examples iicps: Add support for system device-tree flow spi: Fix code formatting issues with checkpatch spi: Add support for system device-tree flow for examples spi: Add support for system device-tree flow mutex: Add support for peripheral tests in SDT flow xdmapcie: Add examples in YAML for SDT flow pciepsu: Add properties to support SDT flow Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 8fbda388..fa6079d5 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "c0718491347a83ba40dbc96dfdb2130dd8743363" +ESW_REV[2023.2] = "90843c3dbbd679da4179da21d94b5ac8930747bf" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 79fffa55474d96668de09eb709a25a090cf07f7b Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 21 Jul 2023 13:35:25 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_6935 freertos10_xilinx: Fix FreeRTOS in SDT flow dhrystone: Update UARTNS defines in sdt flow xiplmi: Removed Error Action from Error Table while disabling error plm: versal_net: Fix In-Place Update Failures qspipsu: Fix GCC warnings uartite: Fix GCC warnings canfd: Fix GCC warnings wdtps: Fix peripheral_tests syntax in system device-tree flow wdttb: Fix code formatting issues with checkpatch wdttb: Add support for system device-tree flow for examples wdttb: Add support for system device-tree flow coresightps_dcc: Add support for Zynq and VersalNet in SDT flow driver: cframe: added SDT support sw_services: xilloader:Added check for returning glitch error scutimer: Format it using checkpatch scutimer: Add support for system device tree flow scripts: pyesw: regen_linker: Fix compilation errors on windows driver: cfupmc: added SDT support Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index fa6079d5..002f1c66 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "90843c3dbbd679da4179da21d94b5ac8930747bf" +ESW_REV[2023.2] = "59e453fa60231b5b946ce4a92e202b51f36e6a6e" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 6f0ac2d36e1cfbb974855e8ce3bfac40706201b0 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Mon, 24 Jul 2023 14:25:58 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_8215 lib: sw_services: xilskey: Use CMake Cache variable for conditional checks xadcps: Modify addtogroup sysmon: Modify addtogroup sysmonpsv: Modify addtogroup dp14txss:tx_only: Removed custom print xxvethernet: Update example dependency files in yaml emaclite: Update yaml file with example details axiethernet: Update example dependency files in yaml lib: sw_apps: srec_bootloader: Fix style issues lib: sw_apps: srec_bootloader: Add srec bootloader to embeddedsw repo mipiciss:Uprevved to include VEK280_REVB and RC Programming mipicsiss:Added Support for VEK280_REVB and RC programming to Support HDMI2.1 usb: usbps: fix code formatting issues with checkpatch scugic: Fix XScuGic_DeviceInterruptHandler for SDT flow sw_services: xilocp: Add access permission for XOCP_API_GEN_SHARED_SECRET sw_services: xilsecure: Calculation of shared secret sw_services: xilskey: update the xilskey library to support vitisng flow xilpm: versal: server: Add Laguna housecleaning sw_apps: versal_plm: Update the versal_plm template app to support vitisng flow. sw_services: xilnvm: Update the xilnvm library to support vitisng flow. sw_services: xilpuf: Update the xilpuf library to support vitisng flow. bsp: standalone: updated the cmake list file sw_services: xilsecure: Update the xilsecure library to support vitisng flow. sw_services: xilloader: Update the xilloader library to support vitisng flow. sw_services: xilplmi: Update the xilplmi library to support vitisng flow. sw_services: xilpdi: Update the xilpdi library to support vitisng flow. sw_apps: rsa_auth_app: update the rsa auth app to support vitisng flow. Revert "sw_apps: zynqmp_fsbl: Update the zynqmp_fsbl template app to support vitisng flow." xilffs: Update xilffs.yaml file xilloader: Measure SPK ID and Encryption Revoke ID before PCR extend FRMBUF Drivers: Corrected Frmbuf rd and wr Yaml files gpiops: Add support zynq platform in sdt flow qspips: Fix syntax issues in CMakeLists.txt scripts: pyesw: library_utils: Pull the library based on the supported_processor list scripts:pyesw:repo: Adding a check to continue scanning if a yaml reading fails scuwdt: Fix formatting issues scuwdt: Add support for system device tree based flow scuwdt: Update addtogroup from version num to overview scuwdt: Update copyright information. scuwdt: Increment the version number scripts: pyesw: open-amp: Update apps to use single unified SDT location scripts: pyesw: build_app: openamp: pass app name for apps scripts: pyesw: open-amp: update library name for open-amp to openamp qspips: Fix code formatting issues with checkpatch qspips: Add support for system device-tree flow for example qspips: Update the driver to support for system device-tree flow dp21txss: Fix Macro definations for 20Gbps and 13.5Gbps dp21: Fix Macro definations for 20Gbps and 13.5Gbps sysmonpsu: Add SDT support csudma: Fix additional line in yaml file xilocp: clear DICE CDI SEED freertos10_xilinx: sync xparameters.h with standalone BSP TPG: Ported driver for decoupling flow. TPG: Added yaml file for decoupling flow support TPG: incremeted driver version VTC: Ported driver for decoupling flow. VTC: Added yaml file for decoupling flow support VTC: IP version is incremented FrmBuf_Wr: Ported driver for decoupling flow. FrmBuf_Wr: Added yaml file for decoupling flow support FrmBuf_Rd: Ported driver for decoupling flow. FrmBuf_Rd: Added yaml file for decoupling flow support sw_apps: zynq_fsbl: update the zynq_fsbl template app to support vitisng flow. dfeofdm: Add SDT examples dfemix: Add SDT examples sw_apps: zynqmp_fsbl: Update the zynqmp_fsbl template app to support vitisng flow. dfeequ: Add SDT examples xilpm:versal_net: save and restore subsystem flags and ipi masks dfeccf: Add SDT examples BSP: riscv: Fix style issues BSP:riscv: Add missing CSR definitions BSP: riscv: Add checks in exception init lib: sw_apps: openamp: sdt: Move common files to single directory lib: sw_apps: openamp: sdt: Update YAML to use openamp instead of open-amp ThirdParty: sw_services: OpenAMP: sdt: Move YAML to be consistent with directory structure ThirdParty: sw_services: OpenAMP: sdt: Add descriptions for Libmetal and OpenAMP mcdma: Fix code formatting using checkpatch tool mcdma: Add support for SDT flow in examples mcdma: Fix LookUpConfig in SDT flow BSP: Do not define ARMv8 specific macros for other processors qspipsu: Update dependency_files inorder to pull dependency files automatically emacps: Update dependency_files inorder to pull dependency files automatically bram: Fix formatting issues bram: Add system-device-tree support for example bram: Update the driver for system device tree flow bram: Update the driver version scripts: pyesw: library_utils: Update dependency_files if the supported platforms are not present Revert "xiplmi: Removed Error Action from Error Table while disabling error" sw_services:xilsecure:Parameter name change in xilsecure mld xilpm: versal_common: server: Change IPI Access permissions for PM API xilpm : cfg: Add Check for master if defined before the returning a macro string vphy: Added support for clock primitive vphy: Added support for clock primitive v_hdmiphy1: Added clock primitive v_hdmiphy1: Added clock primitive v_hdmitxss1: Fixed the define for VEK280 v_hdmirxss1: Fixed the define for VEK280 dp14txss:zcu_pt_dp14_hdcp:Added support to the hdcp app to work with any combination of hdcp1.3/2.2 on rx and tx xilpm: versal_common: Bug fix for XPmPinFunc_GetFuncName Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 002f1c66..31670d9e 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "59e453fa60231b5b946ce4a92e202b51f36e6a6e" +ESW_REV[2023.2] = "914cae1dc327bd1356a28222f561f585ab1210f5" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 5c1a8a675c605e4c395933b06edfb435c67208d6 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 25 Jul 2023 18:33:08 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_7347 driver:trngpsx:Update version number of the driver driver:trngpsv:Update version number of the driver sw_services:Update version number of crypto alg for versal_net sw_services:Update version number of crypto alg for versal sw_services:Update version number of crypto alg for zynqmp sw_services:Updated version number of secure libraries Video Drivers: Adding Overview to addtogroup for all video drivers lib: sw_apps: Fix lwip app compilation for MB in non SDT flow xiplmi: Remove Error Action while disabling error xilplmi: Typecast IPI Access macros properly sw_apps: zynqmp_fsbl: added SDT support sw_services:xilplmi:Added NULL check for Tamper Task Create sw_services:xilplmi: Add NULL check in SsitCreateTask sw_services:xilplmi:Updated error codes for process elf Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 31670d9e..dbd8faee 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "914cae1dc327bd1356a28222f561f585ab1210f5" +ESW_REV[2023.2] = "a3bccd2f53f074b9cb510666be258f8531e4a1fa" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 3b33b292267218495e120fc083abb4352253fec7 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 26 Jul 2023 14:24:25 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_7639 lib: xiltimer: Adding default value for XSLEEPTIMER_FREQ for Zynq APU Revert "sw_apps: zynqmp_fsbl: added SDT support" Revert "xiplmi: Remove Error Action while disabling error" Xilfpga: Avoid compiler optimization for function pointer validation check lib: sw_apps: libmetal demo: sdt: Add size for heap emaclite: Fix doxygen documentation lib: sw_apps: openamp: sdt: matrix multiply: Specify correct demo as output Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index dbd8faee..92cd3f71 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "master-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "a3bccd2f53f074b9cb510666be258f8531e4a1fa" +ESW_REV[2023.2] = "6e0e7050bcc4ddeb78b79677147c69960e8bbe85" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 1420cb6048bcdd75ede3558e68483b1ed7987cc0 Mon Sep 17 00:00:00 2001 From: Mark Hatle Date: Wed, 26 Jul 2023 15:27:44 -0500 Subject: meta-xilinx-standalone: embeddedsw: Move to in-progress release branch Signed-off-by: Mark Hatle --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 92cd3f71..89d9cf09 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -4,11 +4,11 @@ ESW_VER ?= "${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or 'master' REPO ??= "git://github.com/Xilinx/embeddedsw.git;protocol=https" ESW_BRANCH[2023.1] = "xlnx_rel_v2023.1" -ESW_BRANCH[2023.2] = "master-next" +ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "6e0e7050bcc4ddeb78b79677147c69960e8bbe85" +ESW_REV[2023.2] = "a3bccd2f53f074b9cb510666be258f8531e4a1fa" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" @@ -16,7 +16,7 @@ EMBEDDEDSW_SRCURI ?= "${REPO};${EMBEDDEDSW_BRANCHARG}" LICENSE = "MIT" LIC_FILES_CHKSUM[xlnx_rel_v2023.1] = '3c310a3ee2197a4c92c6a0e2937c207c' -LIC_FILES_CHKSUM[master-next] = '3c310a3ee2197a4c92c6a0e2937c207c' +LIC_FILES_CHKSUM[xlnx_rel_v2023.2-next] = '3c310a3ee2197a4c92c6a0e2937c207c' LIC_FILES_CHKSUM ??= "file://license.txt;md5=${@d.getVarFlag('LIC_FILES_CHKSUM', d.getVar('BRANCH')) or '0'}" SRC_URI = "${EMBEDDEDSW_SRCURI}" -- cgit v1.2.3-54-g00ecf From 8aa2f80eaa9ff17548d1ed8c3cea5759c817ba17 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 28 Jul 2023 16:17:21 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_5299 lib: xiltimer: Adding default value for XSLEEPTIMER_FREQ for Zynq APU Revert "sw_apps: zynqmp_fsbl: added SDT support" Revert "xiplmi: Remove Error Action while disabling error" Xilfpga: Avoid compiler optimization for function pointer validation check lib: sw_apps: libmetal demo: sdt: Add size for heap emaclite: Fix doxygen documentation lib: sw_apps: openamp: sdt: matrix multiply: Specify correct demo as output Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 89d9cf09..c7d9555a 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "a3bccd2f53f074b9cb510666be258f8531e4a1fa" +ESW_REV[2023.2] = "6e0e7050bcc4ddeb78b79677147c69960e8bbe85" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From e1bcdb6e8871c346ae5b60e3a2fb921925852a09 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Sun, 30 Jul 2023 12:50:02 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_7283 rfdc: Remove Dead Code sysmon: Add SDT Support Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index c7d9555a..f9aca205 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "6e0e7050bcc4ddeb78b79677147c69960e8bbe85" +ESW_REV[2023.2] = "49600aaa2b6c6aa14f5b7d8924f7a1257ded6cf6" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 76acc49c42cfaf0dda6f33744598f573275ba5d6 Mon Sep 17 00:00:00 2001 From: "Addepalli, Siva" Date: Mon, 31 Jul 2023 17:01:18 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_7299 xilpm: versal: server: SRST support for xcvp1902 xilpm: versal: server: SRST support for xcvp1902 lib: sw_services: xilpm: Auto generate device specific macro for xcvp1902 sw_services:xilsecure:Updated PCIE IDE KAT macro names sw_services:xilloader:Added example for LoadPDI from IS freertos10_xilinx: ARM_CR5: Invoke XTimer_ReleaseTickTimer to release tick timer lib: sw_services: xiltimer: Add xiltimer release support ttcps: Invoke XTtcPs_Release to release ttc node ttcps: Add support for ttc release node gpio: Use proper base address macro in xgpio_low_level_example for non-sdt flow ipipsu: Fix MISRA-C violations cmake: UserConfig.cmake: Remove the quotes around variable initialization dp21rxss: Enable HDCP2X Timer handler calling function only when HDCP2X is enabled. dp21rxss: dp21rxss: Added AMD copyright under the Xilinx copyright for the 2023.1 modified files dp21rxss: Added AMD copyright. sw_services: xilmailbox: Fix code formatting issues with checkpatch sw_services: xilmailbox: Restructure the code for more modularity xadcps: Add SDT Support cmake: toolchainfiles: microblaze_toolchain.cmake: Add no-relax linker flags by default sw_services:xilplmi: Add XilStl SW triggered error events BSP:standalone: Add XilStl errors to SW errors list xilpm: versal_net: increase byte buffer size xilpm: versal_net: power down core only if it powered up versal_psmfw: enable IEN during pwr down rfdc: Remove duplicate from yaml lib: sw_apps: Update the hello_world and empty_application to support all c++ file extensions drivers: tmr_inject: Fix compilation issue qspipsu: Fix code format issue qspipsu: Fix wrong init sequence dmaps: Remove arm,primecell compatible string qspips: Generate BUS_WIDTH define in xparameters.h in sdt flow Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index f9aca205..65af85a7 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "49600aaa2b6c6aa14f5b7d8924f7a1257ded6cf6" +ESW_REV[2023.2] = "1bcb421cce4011d8bd6a06bbc6834e7207762713" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 70cd71c1acfe8e13543005ee428dd6d45057ae01 Mon Sep 17 00:00:00 2001 From: "Addepalli, Siva" Date: Tue, 1 Aug 2023 14:19:43 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_4711 drivers: tmr_inject: Fix example compilation issue v_hdmitxss1: Fix code indentation of XV_HdmiTxSs1_ReadEdid function v_hdmitxss1: Add support for reading 4 block EDID rfdc: Add NCO frequency paramater rfdc: Add properties to yaml sw_services:xilloader:Set status variables as Volatile sw_services:xilplmi:Added temporal check for Sld Notification sw_services:xilplmi:Added redundant check for PlmUpdate sw_services:xilplmi:Added redundant write in plmupdate sw_services:xilplmi:Added redundant call for Tamper Detect sw_services:xilplmi:Added redundancy for SlrType Check sw_services: xilsecure: Check StatusTmp instead of Status sw_services:xilocp:Add redundancy for key generation APIs sw_services:xilocp: Remove clearing personalization string dfeofdm: Output delay in ccid slots Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 65af85a7..3a9e9141 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "1bcb421cce4011d8bd6a06bbc6834e7207762713" +ESW_REV[2023.2] = "1f847c1f77e107fe1c4ddf25c954f4f4a9207362" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 504327c4434edbba831b00af1ec2bd9b96dc726b Mon Sep 17 00:00:00 2001 From: "Addepalli, Siva" Date: Thu, 3 Aug 2023 12:50:53 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_4127 sw_apps: zynqmp_fsbl: added SDT support dfeofdm: Antenna interleave delay reorder ipipsu: Update the target count sw_services:xilsecure:Fix HMAC security review comments scripts: linker_files: Add bootdata section to R5 linker scripts xilpm: versal_net: server: Fix incorrect PSM RAM size xilpm: versal: server: Fix incorrect PSM RAM size Export each of the memory_order enumerators Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 3a9e9141..871ea843 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "1f847c1f77e107fe1c4ddf25c954f4f4a9207362" +ESW_REV[2023.2] = "45caafc34f34bd84b057cb51ae215a16fe9b88cd" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 7ddedb6070fa5fc5133402723c99b53096ea83a6 Mon Sep 17 00:00:00 2001 From: Sandeep Gundlupet Raju Date: Mon, 31 Jul 2023 21:23:10 -0600 Subject: xilinx-standalone: Fix invalid-packageconfig QA Issue libxil warnings are obversed in multiconfig builds. WARNING: mc:cortexa53-0-zynqmp-fsbl-baremetal:libxil-2023_sdt_experimental+gitAUTOINC+742a608800-r0 do_configure: QA Issue: libxil: invalid PACKAGECONFIG: rtc [invalid-packageconfig] WARNING: mc:cortexa53-0-zynqmp-fsbl-baremetal:libxil-2023_sdt_experimental+gitAUTOINC+742a608800-r0 do_configure: QA Issue: libxil: invalid PACKAGECONFIG: qemu-usermode [invalid-packageconfig] This is due to rtc and qemu-usermode was enabled for all targets in MACHINE_FEATURES_BACKFILL, Hence disable rtc and qemu-usermode for multiconfig targets by adding to MACHINE_FEATURES_BACKFILL_CONSIDERED list in inclusion file. Signed-off-by: Sandeep Gundlupet Raju Signed-off-by: Mark Hatle --- meta-xilinx-standalone/conf/distro/xilinx-standalone.inc | 2 ++ 1 file changed, 2 insertions(+) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/conf/distro/xilinx-standalone.inc b/meta-xilinx-standalone/conf/distro/xilinx-standalone.inc index f86a5971..814cb9cd 100644 --- a/meta-xilinx-standalone/conf/distro/xilinx-standalone.inc +++ b/meta-xilinx-standalone/conf/distro/xilinx-standalone.inc @@ -45,3 +45,5 @@ INHERIT += "uninative" BB_SIGNATURE_HANDLER ?= "OEEquivHash" BB_HASHSERVE ??= "auto" + +MACHINE_FEATURES_BACKFILL_CONSIDERED += "rtc qemu-usermode" -- cgit v1.2.3-54-g00ecf From 36623c0153f39211180677f0ba72025494f34ede Mon Sep 17 00:00:00 2001 From: "Addepalli, Siva" Date: Fri, 4 Aug 2023 17:52:45 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_2419 xilpm: versal_common: server: Fixed PLM compilation warning esw: Add support for stack and heap configuration in sdt flow axidma: Fix base address in examples for SDT flow vphy: added Dir for clock primitive v_hdmitxss1: added compliance related changes v_hdmirxss1: added compliance related changes v_hdmiphy1: added Dir for clock primitive VersalNet: Trng: Fix compilation warning Revert "sw_apps: zynq_fsbl: fixed addresses issue in SDT flow" sysmonpsv: Add support for SDT sw_services:xilsecure:Initialize KeySizeInWords to avoid invalid value incase of glitch sw_services:xilsecure:Rename XSecure_AesDpaCmDecryptKat to XSecure_AesDpaCmDecryptData sw_services:xilsecure:Add volatile keyword for SStatus variable mcdma: Fix canonical definiton in interupt example mcdma: Fix interrupt ids in interrupt example v_hdmirx1: Handle Rx data when there is delay between Rx clock and data BSP: fix style issues BSP: Remove XPAR_CPU_ID dependency scugic: Fix style issues. scugic: Remove XPAR_CPU_ID dependency sw_apps: zynq_fsbl: fixed addresses issue in SDT flow VPROCSS: Added Overview to addtogroup instead of driver version VPROCSS: Driver version is incremented to v2_12 VPROCSS: Error correction in tcl file xilpm: versal: server: Validate PwrDomain pointer Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 871ea843..5b849331 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "45caafc34f34bd84b057cb51ae215a16fe9b88cd" +ESW_REV[2023.2] = "3296a4acd4b09942d03ced91147a1062b6e9b204" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 115b169151dbe40381a2f115e6065b074322c277 Mon Sep 17 00:00:00 2001 From: "Addepalli, Siva" Date: Tue, 8 Aug 2023 18:12:31 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_5327 ddrpsv: Add VersalNet support BSP: cortexr5: Enable LLPP for CortexR52 sw_services:xilsem: Add support for SDT flow SDITXSS: Mismatch between config parameter and TCL parameter mapping. sw_services: xilsecure: Remove duplicate code sw_services: xilmailbox: Fix MISRA-C violations xilpm: versal: server: Add clk_cpll in CPM clock list xilpm: server: GtyHouseClean loop counter made volatile Video Drivers: Modified drivers to remove version number SDIRX: Register Read size is updated to 35. lib: bsp: standalone: Remove PM_CLOCK_SET/GET_RATE APIs from versioning xilpm: versal_common: server: Remove PM_CLOCK_SET/GET_RATE APIs from Featurecheck xilpm: versal_common: client: remove PM_CLOCK_SET/GET_RATE APIs xilpm: zynqmp: client: remove PM_CLOCK_SET/GET_RATE APIs XilNvm: Remove gaps in NVM API IDs gpio: Use Canonical form for base address in gpio examples Deprecate video drivers lib: bsp: Update GPIO and I2C interrupt Id macros for Versal Net sw_services: xilsecure:Handling endianness in ECDSA examples sw_services:xilplmi:Added redundant error check during update sw_services:xilplmi:Added redundant check in Tamper Detect sw_services:xilplmi:Added Redundant call for Sldstate check sw_services:xilplmi:Added redundant write for SSS Config sw_services:xilloader:Remove Additional PPK Check sw_services:xilloader:Updated Image Store Error codes lib: sw_apps: lwip_*: platform.c: Setup seperate timer function for SDT Flow lib: sw_apps: lwip*: Add missing properties from mss lwip213: Rename config params to generic names xilpm:versal_net:server: XPm_Reqm save and restore dynamic fields plm: versal_net: Reinitialize PsmToPlmEvent Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 5b849331..41d256f9 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "3296a4acd4b09942d03ced91147a1062b6e9b204" +ESW_REV[2023.2] = "1a8892594deaa2df664344302c8d1285ab4f77ad" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 3e38859b24953565451cecb3f6acfc9fc92fa7c0 Mon Sep 17 00:00:00 2001 From: "Addepalli, Siva" Date: Wed, 9 Aug 2023 17:25:59 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_9811 VersalNet PLM: Updated MC mb and PMC handshake support source xdmapcie: Fixed xdmapcie driver integration issue in SDT flow pciepsu: Fixed Config structure issue in SDT flow scripts: pyesw: Fix issues with the code intelliSense lib: sw_apps: lwip*: Bump stack and heap size scripts: pyesw: Add support for override os level params from the template app XilinxProcessorIPLib: drivers: Fix syntax issues in the scutimer and scuwdt examples for peripheral test in system device-tree flow cmake: toolchainfiles: microblaze_toolchain.cmake: Add gc-sections linker flags by default Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 41d256f9..58760c54 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "1a8892594deaa2df664344302c8d1285ab4f77ad" +ESW_REV[2023.2] = "b9a66f8cdbbbc7a2c5944baa73b342910e41f094" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 2d426bb8afc46b1a0913c610464be06fc20ea1c6 Mon Sep 17 00:00:00 2001 From: "Addepalli, Siva" Date: Fri, 11 Aug 2023 18:38:13 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_3315 lib: sw_apps: Update lwip BM apps to have additional SDT checks lib: sw_apps: lwip_echo_server: Remove PPC platform file Video drivers: Removed version number and added Overview. spips: Fix data corruption issue at lower clock speed lib: sw_apps: freert lwip*: Add custom heap size for freertos scripts: pyesw: build_app: Update link libraries based on the available libraries in the bsp xilpm: versal_net: add tcm device into prealloc list mipicsiss : Updated XV_HdmiTxSs1_ReadEdid API Updated changelog for axicdma and other componets v_hdmitxss1: updated the API call for XV_HdmiTxSs1_ReadEdid v_hdmirxss1: updated API call for XV_HdmiTxSs1_ReadEdid sw_services:xilsem:Corrected XSEM_SSIT_MAX_SLR_CNT macro definition ddrcpsu: Fix code formatting issues with checkpatch ddrcpsu: Add support for system device-tree flow Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 58760c54..1bb8ed37 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "b9a66f8cdbbbc7a2c5944baa73b342910e41f094" +ESW_REV[2023.2] = "1bcf2265e0431eb26a28f4ddd9ff76afc495c4ea" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From ef56d304f5fcf24020c3cd4cd62ce2d16247abb6 Mon Sep 17 00:00:00 2001 From: "Addepalli, Siva" Date: Mon, 14 Aug 2023 17:14:42 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_5595 trngpsx: Removed example support for PKI instances nandps: Fix syntax issues in driver CMakeLists.txt Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 1bb8ed37..ef33d2a4 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "1bcf2265e0431eb26a28f4ddd9ff76afc495c4ea" +ESW_REV[2023.2] = "92e375271e6ff5f4c75822a8b9a647dc1f3bdc71" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 517ea2b99abdd164bd6a4d18c67a97dbaded6f6e Mon Sep 17 00:00:00 2001 From: "Addepalli, Siva" Date: Thu, 17 Aug 2023 12:51:27 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_9835 versal:psmfw: Integrate PSM interrupt injection STL axivdma: Add selftest example in yaml file xilpm: Fix for DDR modeling implementation gaps for versal-net xilpm: versal_net: Synchronize init node functions with Versal xilpm: versal_common: Copy xpm_node.h and xpm_nodeid.h generated by the latest versal-topology repo sw_apps: zynqmp_fsbl: Added protection macro for the prints at handoff bsp: standalone: Do not assign coresight as stdout/stdin for non ARM based processors. xilpm: versal_net: server: Remove redundant workaround BSP:ARMv8:32bit: Fix Cortexa53 32 bit BSP compilation failure trngpsv: Doxygen fixes xilpdi: Doxygen fixes xilloader: Doxygen fixes sw_apps: zynq_fsbl: fixed addresses issue in SDT flow uartns550: Add support for peripheral test for uartns550 in SDT flow uartpsv: Add support for peripheral test for uartpsv in SDT flow iicps: Add support for peripheral test for iicps in SDT flow iic: Add support for peripheral test for iic in SDT flow uartlite: Add support for peripheral test for uartlite in SDT flow uartps: Add support for peripheral tests in SDT flow gpio: Disable peripheral test for gpio in SDT flow sw_services:xilnvm: Add redundnacy for XNvm_EfusePgmAndVerifyBit sw_services:xilnvm:Removed XNvm_EfuseReadCacheRange sw_services:xilnvm: Assign key clear status only when status is XST_SUCCESS sw_services:xilnvm: Add missing else check in XNvm_EfuseReadPpkHash sw_services:xilnvm: Clear AES keys sw_apps: zynqmp_fsbl: Add forward declaration for config object xilpm: Add forward declaration for config object uartlite: Use Canonical form for base address in uartlite examples scugic: Support PL to PS interrupts for VERSAL NET Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index ef33d2a4..55fad44c 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "92e375271e6ff5f4c75822a8b9a647dc1f3bdc71" +ESW_REV[2023.2] = "f17f0ceebe99fb75eea5a04c951bad7027bd9370" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From fdb9cb07d1675295fe1dcb361dc703f89544abd3 Mon Sep 17 00:00:00 2001 From: "Addepalli, Siva" Date: Fri, 18 Aug 2023 12:52:10 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_7635 versal_psmfw: update usage of XPsmFw_Write32 and XPsmFw_RMW32 xilpm: versal: server: Check state of DDRMC in self-refresh operations qspipsu: src: Fix code format issues with checkpatch tool qspipsu: examples: Add status check for XQspiPsu_SetClkPrescaler API qspipsu: Add support for feedback clock lib: sw_apps: openamp: sdt: Ensure parity in build process for OpenAMP apps in VitisNG ThirdParty: sw_services: OpenAMP: sdt: Enable BSP for A72, R52 Proxy information ThirdParty: sw_services: OpenAMP: sdt: Enable BSP build in one-shot lib: sw_apps: libmetal demo: sdt: Add parity with Vitis Classic ThirdParty: sw_services: Libmetal: SDT: Enable BSP support for A53, A72, A78, R52 scripts: pyesw: open-amp: Pass OS to application bram: Fix interrupt example compilation errors in sdt flow Xilsecure: Error out disallowed CPU modes sw_apps: versal_psmfw: Update PSMFW release version sdps: Add description for Adma2_DescrTbl32/64 Revert "uartns550: Add support for peripheral test for uartns550 in SDT flow" Revert "uartpsv: Add support for peripheral test for uartpsv in SDT flow" Revert "iicps: Add support for peripheral test for iicps in SDT flow" Revert "iic: Add support for peripheral test for iic in SDT flow" Revert "uartlite: Add support for peripheral test for uartlite in SDT flow" Revert "uartps: Add support for peripheral tests in SDT flow" Revert "gpio: Disable peripheral test for gpio in SDT flow" Revert "sw_apps: zynq_fsbl: fixed addresses issue in SDT flow" drivers: emacps: Fix the order of clock parameters in _g.c mipicsiss:Updated dependencies.props Updated dependencies.props with rc21008adrv file names scripts: pyesw: create_bsp: Fix the family variable value for microblaze platform axidma: Fix selftest example in yaml file for SDT flow xilpm: versal: server: Update AIE1 memory zeroization routine Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 55fad44c..70fab2fc 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "f17f0ceebe99fb75eea5a04c951bad7027bd9370" +ESW_REV[2023.2] = "75c7c3382a2e2b7ae42f9d8e017ca388b1fe2358" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From bc3ca6fd44cc2d40e720f18ef9005e31a065bc32 Mon Sep 17 00:00:00 2001 From: "Addepalli, Siva" Date: Fri, 18 Aug 2023 16:45:34 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_8175 xilpm: versal_net: skip rpu halt if core is powered down xilpm: versal_net: do not skip core power down versal_psmfw: remove PCIL configuration from requested pwr sequence xilpm: versal_net: execute direct pwr down sequence for rpu sw_apps:versal_plm: Added redundancy for XOcp_KeyInit sdps: Fix code format issues sdps: Reorder XSdPs_FrameCmd and XSdPs_Identify_UhsMode APIs xilocp: Move SWPCR buffers in PCR example to shared memory qspipsu: data: Update yaml to port missing examples xilsecure:Remove TRNG driver from xilsecure library lwip213: Update axi ethernet and dma code to support SDT and non SDT flows lwip213: Update axi emaclite code in lwip adapter to support SDT and non SDT flows sw_apps: srec_spi_bootloader: Update dependent drivers in yaml file lib: sw_services: Update supported_processors list for psx_pmc and psx_psm processors v_hdmitxss1: Added support for VEK280 v_hdmirxss1: Added support for VEK280 Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 70fab2fc..2d409353 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "75c7c3382a2e2b7ae42f9d8e017ca388b1fe2358" +ESW_REV[2023.2] = "ef3d824dc3a05106af750403ebb488aac07ee889" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 1e3d3ee474f8791c61446218c814a2d85fa2eff7 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 23 Aug 2023 11:54:11 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_1719 Revert "sw_services:xilsecure:Fix ECDSA boot failure on qemu" Revert "Xilocp: Move run time error codes to respective library" xilfpga: Fix for doxygen issues sw_services: xilloader: Update SubsystemID in ImageMeasureInfo structure sw_services: xilflash: Handle emc use case in SDT flow emc: Add support for system device-tree flow xilsem: Fix MISRA violations Xilocp: Move run time error codes to respective library v_hdmitxss1: Added aupport for VEK280 v_hdmirxss1: Added support for VEK280 sw_apps: zynq_fsbl: fixed addresses issue in SDT flow video_common: Porting video common driver for decoupling flow. Xilsecure: Fix wrong Hash length input validation xilnvm: Convert Endianness of DME user key before eFuse write sw_services: xilloader: fixed status overwrite sw_services:xilnvm:Remove oring the Status with error code sw_services:xilloader: Remove dead code in XLoader_CheckSecureStateAuth sw_services: xilpdi: fixed supported peripherals xilloader: removed redundant flash size macro xilpm: versal: server: Clear VDU related errors sw_services:xilpuf: Fix passing efuse cache value sw_services:xilpuf: Assign Status to XST_FAILURE sw_services:xilsecure:Fix ECDSA boot failure on qemu xilloader:Secure boot is working in spite of enabling PLM_SECURE_EXCLUDE macro sw_services:xilsecure: Fixed microblaze support for versal client sw_services: xilloader: Run KAT for SHA3 Instance 1 before use sw_services: xilloader: Change prototype of XLoader_ClearKatOnPPDI() sw_services:xilplmi:Security Code Review Fixes sw_services:xilsecure: Intimate user if data context is lost sw_services:xilloader:Security Review Fixes lib: sw_services: xiltimer: Remove unneeded #ifdef check around XilSleepTimer_Init() API sw_services: xilcert: Use SHA3-384 as hash algo in extensions sw_services: xilcert: Fix issue in encoding of Bitstring sw_services: xilcert: Code enhancements sw_services: xilsecure: Fix endianness for public key and shared secret v_hdmirx1: Fix stream VIC id when video format received with HDMI_VIC wdttb: data: Add xwdttb_selftest_example in sdt flow BSP:ARMv8: VersalNet: Configure DDR regions based on HW design sw_services:xilplmi:Enable EMSetAction Support via IPI lwip213: Add API mode checking scripts: pyesw: library_utils: Fix the default cmake param value when template is passed Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 2d409353..50f86501 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "ef3d824dc3a05106af750403ebb488aac07ee889" +ESW_REV[2023.2] = "2ea61903d96d8b717caae0aeb17805276b11676e" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 88a1ce43ccbd06991dda77c40ffd60f3c2cd0daf Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 24 Aug 2023 12:51:39 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_4207 Xilocp: Move run time error codes to respective library Updated changelog for axis_switch to pmufw xilpm: versal: server: Fix XRAM related isolation issues BSP:cortexa9: Fix infinite loop in Xil_DCacheInvalidateRange VersalNet: Remove a78 and r52 static files xilffs: Enable the XILFFS_use_lfn option when EXFAT is enabled xilfpga: Update version info macros xilpki: Implemented new API to get the library version info Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 50f86501..5eb01d8c 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "2ea61903d96d8b717caae0aeb17805276b11676e" +ESW_REV[2023.2] = "badc4e42bbed4af31edf506b47dae664b68e8bd1" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 869cf54c5533dbfa12c44749d61cbd9f28756ae8 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 24 Aug 2023 17:09:25 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_2991 lib: sw_apps: Add missing xiltimer library in the link libraries scripts: pyesw: library_utils: Fix bsp creation issues with rfdc drivers scripts: pyesw: library_utils: Add __BAREMETAL__ compiler definition for libmetal drivers scripts: pyesw: In link libraries add speical handling for libmetal sw_services:xilloader: Place ECDSA in reset when PLM_ECDSA_EXCLUDE is not defined uartns550: Add support for peripheral test for uartns550 in SDT flow uartpsv: Add support for peripheral test for uartpsv in SDT flow iicps: Add support for peripheral test for iicps in SDT flow iic: Add support for peripheral test for iic in SDT flow uartlite: Add support for peripheral test for uartlite in SDT flow uartps: Add support for peripheral tests in SDT flow gpio: Disable peripheral test for gpio in SDT flow Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 5eb01d8c..1aab7ecd 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "badc4e42bbed4af31edf506b47dae664b68e8bd1" +ESW_REV[2023.2] = "ae08eb195a9cfe0c2797f1dce5d80832429b845b" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 5cd24821a9e9458992accee74a197b1f71f003dd Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 25 Aug 2023 14:09:12 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_2927 Xilsecure: Fix XSecure_TrngGenerateRandNum() buffer overflow sw_services: Return XST_SUCCESS if KAT for SHA3 Engine 1 has already run sw_services: xilpm: Add STL callback after INIT_FINISH Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 1aab7ecd..9e974f2a 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "ae08eb195a9cfe0c2797f1dce5d80832429b845b" +ESW_REV[2023.2] = "dff6f52ab5d761bad06e0abc8db6fb39d57089f4" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 305d24efd1e5f50112282ac3be39ea43e8d7b645 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 29 Aug 2023 16:35:18 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_5843 updated changelog for axiethernet and xilflash sw_services:xilloader: Remove check to validate MH secure state with PLM video_common: Add support for HF-SCDB in EDID parser Updated changelog for ospipsv and bram Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 9e974f2a..47b1e5dd 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "dff6f52ab5d761bad06e0abc8db6fb39d57089f4" +ESW_REV[2023.2] = "8070822a60c8a6e869522e9febd72ed7b188358d" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 3aeb950696276c9f797ae6efc9642ec94155e56a Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 31 Aug 2023 13:09:23 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_2975 xilpm: versal_net: fix force power down issue xilpm: versal_net: fix suspend resume issue xilpm: versal_net: Add DDRMC5 bisr support sw_services: xilpuf: Declare variables that are passed to server in data section sw_services:xilloader:Added Redundancy for KekSrc sw_apps:versal_plm:EAM Error Check After PMC CDO sw_services:xilplmi:Security Review Fixes iicps: Add SDT flow support for xiicps_eeprom_intr_example iicps: Update Receive Polled and Interrupt Handler functions as modular gpiops: Add support for pmc, versal and versal-net in sdt flow Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 47b1e5dd..a2279f07 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "8070822a60c8a6e869522e9febd72ed7b188358d" +ESW_REV[2023.2] = "6ccd026d115ed986ccb1541c62dc7dac21bf2ab8" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 3cbca881e5567624a5a1152acadf7a46e2477b05 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 5 Sep 2023 12:50:53 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_3567 sw_services:xilnvm: Fix SW-BP-REDUNDANCY drivers: trngpsx: Add volatile keyword to avoid optimization drivers: trngpsx: Remove Dead code sw_services:xilsecure: Fix updating KAT mask bits for external modules gpio: Add support for peripheral test for gpio in SDT flow sw_services: xilplmi: Reread from efuse cache sw_apps:versal_plm: Change exception print to DEBUG_PRINT_ALWAYS sw_services:xilplmi: DEBUG_PRINT_ALWAYS for critical error prints sw_services:xilplmi: Change PLM debug level to 0 for XilSEM xdmapcie: Replace csr-slcr property to populate xilpm: versal_net: clear pcil for rpu only sw_services:xilplmi:Added PSM Address range check xilpm: versal_net: skip halt if core is powered down sw_services:xilplmi:Updated IPI Timeout Value Revert "Revert "sw_services:xilsecure:Fix ECDSA boot failure on qemu"" xilsem: Replace Versal net SHA3 instance function with new API name avbuf: Ported changes for using the SDT flow dpdma: Ported changes for using the SDT flow dppsu: Ported changes for using the SDT flow Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index a2279f07..b6665012 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "6ccd026d115ed986ccb1541c62dc7dac21bf2ab8" +ESW_REV[2023.2] = "4b382e452bdc148cb10c99da03f0201150dbfe4d" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 012eb3b0c1118e14b2102066549b4daa65e84e81 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 6 Sep 2023 21:47:53 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_7295 xilnvm: Validate DME key before programming xilocp: XPPU configurations for DME operations sdps: change data type of BaseAddress sdps: Fix MISRA C-2012 Rule 8.5 violation sdps: Fix MISRA C-2012 Rule 15.5 violation sdps: Fix MISRA C-2012 Rule 14.4 violation sdps: Fix MISRA C-2012 Rule 12.1 violation sdps: Fix MISRA C-2012 Rule 10.6 violation sdps: Fix MISRA C-2012 Rule 10.4 violation sdps: Fix MISRA C-2012 Rule 10.1 violation sdps: Fix MISRA C-2012 Rule 4.7 violation ipipsu: Fix HIS_COMF violations qspipsu: src: Fix code format issues with checkpatch tool qspipsu: src: Update Polled transfer and Interrupt Handler functions as modular xilfpga: Add proper ifdef platform checks sw_services: xilmailbox: Fix HIS_COMF violations sw_services: xilplmi: Added the NullCheck for EmInit parameters update Embedded SW license file for 2023.2 release sw_apps: imgsel: versal image selector clean up sw_services:xilskey: Fixed MISRA-C Rule 8.5 violation rfdc: SDT Add Dependency Files Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index b6665012..667f4249 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "4b382e452bdc148cb10c99da03f0201150dbfe4d" +ESW_REV[2023.2] = "27ae5596270e2e4cc6a0ae23bcc80d49b4754724" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" @@ -16,7 +16,7 @@ EMBEDDEDSW_SRCURI ?= "${REPO};${EMBEDDEDSW_BRANCHARG}" LICENSE = "MIT" LIC_FILES_CHKSUM[xlnx_rel_v2023.1] = '3c310a3ee2197a4c92c6a0e2937c207c' -LIC_FILES_CHKSUM[xlnx_rel_v2023.2-next] = '3c310a3ee2197a4c92c6a0e2937c207c' +LIC_FILES_CHKSUM[xlnx_rel_v2023.2-next] = '6677b545d223964a4906f97a2229bfc5' LIC_FILES_CHKSUM ??= "file://license.txt;md5=${@d.getVarFlag('LIC_FILES_CHKSUM', d.getVar('BRANCH')) or '0'}" SRC_URI = "${EMBEDDEDSW_SRCURI}" -- cgit v1.2.3-54-g00ecf From fcdc430282d33274670e1ddcd998f54e521f967d Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 8 Sep 2023 18:54:12 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_9143 cpu_riscv: Fix addgroup tag dp14rxss: Enable HDCP2X Timer handler calling function only when HDCP2X is enabled. xilpm: versal: server: Fix MISRA-C rule 10.4 xilpm: versal_common: server: Fix MISRA-C rule 8.13 sw_apps: zynqmp_pmufw: Fix MISRA-C rule 10.4 dfeprach: Remove immediate trigger dfeccf: Remove immediate trigger dfeofdm: Remove immediate trigger dfemix: Remove immediate trigger sw_services: xilpuf: Declare variable that are passed to server in data section srec_spi_bootloader: Adding a check in cmake to throw proper error srec_spi_bootloader: Adding linker_constraint for heap section in yaml srec_bootloader: Adding linker_constraint for heap section in yaml DP21: Add support for DP21 linkrates video_common: Fix compilation warning xilpm: versal: server: Add NPI read after enabling privilege write access for AIE2 dpdma: dppsu: Remove tapp section from yaml files Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 667f4249..9232a10e 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "27ae5596270e2e4cc6a0ae23bcc80d49b4754724" +ESW_REV[2023.2] = "ea73baf7767b879075b11b5a7831a9b0f90e59cc" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 3df21fa78623fc20ccfc95104029d1305ceda478 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Mon, 11 Sep 2023 16:13:34 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_2891 ospipsv: Fix MISRA-C Rule 8.13 violation sw_services:xilplmi:Sec COE Review Fixes uartlite: Correct SDT and interrupt checks in xuartlite_intr_tapp_example csudma:Fix HIS_COMF violations axidma: Fix sg_cyclic_intr example failure on r5 Updated version number to latest in examples/index.html for multiple drivers BSP: microblaze: Fix prototypes of few cache APIs plm: versal_net: Use Reserved DDR Region for DS storage during update xilpki: fix issues with PKI IRQ signal lib: sw_apps: zynqmp_pmufw: Fix compilation error when ENABLE_RECOVERY flag is enabled in sdt flow xilpdi:Fix MISRA C violations for Rule 12.1 scuwdt: Update examples to stop the wdt at the end of the test scutimer: Update examples to stop the timer at end of the test xilplmi: versal: Allow loading of ELFs to XRAM dmaps: Fix example instance structure handling v_hdmitx1: Add support for configurable VTEM packets esw: Fix CMAKE_MACHINE for plm and psm microblaze processors in versalnet cmake: UserConfig.cmake: Disable USER_COMPILE_PROFILING_ENABLE configuration scripts: pyesw: build_bsp: Use cmake --build with verbose esw: Properly handle the processor extra compiler options ThirdParty: sw_services: lwip213: Fix the target name in clean target xilpki: Update XPki_GetVersion() API prototype Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 9232a10e..27fd42c0 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "ea73baf7767b879075b11b5a7831a9b0f90e59cc" +ESW_REV[2023.2] = "5829c0d9de3f9c3d05163fed983c09b5a22ee276" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 95e3303f7cc56ca3e1197d49acdb2ac157ae423e Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 14 Sep 2023 12:50:57 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_5147 xilffs: Fix compilation warning usb: usbpsu: fix HIS_RETURN violation Updated changelog for cpu, versal_plm and other components tmr_inject: Fix style issues in the driver sources tmr_manager: Correct the syntax for xlnx, mask-rst-value property sw_services:xilpki:Fixed doxygen warnings sw_services:xilsecure: Avoid returning XST_SUCCESS incase of glitch sw_services: xilocp: Avoid returning XST_SUCCESS incase of glitch scugic: Fixed source code-format issue. scugic: Include xplatform_info.h for all processors scugic: Fix HIS_COMF violations scugic: Fix MISRA C violation for Rule 14.4 scugic: Fix MISRA-C violation for Rule 10.3 sw_services:xilsecure:Removed NO_EFFECT coverity warning fix. nandpsu: Update the clock node qspipsu: Update the clock node uartpsu: Update the clock node iicps: Update the clock node lib: standalone: Add the clocking to the standalone v_hdmitxss1: added tx compliance changes v_hdmirxss1: added tx compliance values v_hdmiphy1: Added new registers openamp: apps: zynqmp_r5: freertos: Remove call to vPortEnableInterrupt() cframe: Fixed MISRA-C violation 8.13 cframe: Fixed MISRA-C violation 4.6 cframe: Fixed MISRA-C violation 7.2 cframe: Fixed MISRA-C violation 10.4 cframe: Fixed MISRA-C violation 10.1 trngpsx: add SDT support sdps: Update YAML with Versal NET eMMC compatible sdps: Add support to read Tap configurations sw_services:xilplmi:Remove redundant code Xilloader: PCR security review comments xilocp: Fixed Security review comments for OCP BSP: riscv: Fix definitions for hpmevent registers xilpm: Update SSIT temperature propagation xilpm: versal: server: Fix sub-system restart on vek280 iicps: Fix doxygen warnings mipicsiss: Removing linker script usb: usbpsu: src: fix HIS_VOCF metric violation usb: usbpsu: src: fix MISRA C-2012 Rule 10.3 violation sw_services: xilsecure: Removed unused code of TRNG in xilsecure library sw_Services: xilsecure: Restricted XSecure_EccRandInit API to VersalNet sw_services: xilsecure: Use CacheInvalidate as per ARM recommendations xilpm: versal_common: server: Add missing code while integrating into Rigel workflow Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 27fd42c0..2d006765 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "5829c0d9de3f9c3d05163fed983c09b5a22ee276" +ESW_REV[2023.2] = "79ba04717ca52a460438f4ec2da12186248adf97" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From dd03a1f8314d2d4d9bf1d5a0d28ccd49874151f6 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 15 Sep 2023 16:04:22 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_2231 mipicsiss:Updated files with VEK280 Pre-Production board xilloader: Fix MISRA C violation 17.8 xilloader: Fix MISRA C violation 17.7 xilplmi: Fix MISRA C violation 12.2 xilloader: Fix MISRA C violation 12.1 xilloader: Fix MISRA C violation 10.3 xilloader: Fix MISRA C violations for Directive 4.5. v_hdmitxss1: Added tx compliance values v_hdmirxss1: Added tx compliance values ThirdParty: sw_services: Libmetal: sdt: Remove A78 support xilsem: Fix NPI Scan Status after In Place PLM Update Revert "xilpm:versal_net: save and restore PL devices hierarchy" Revert "xilpm:versal_net: Restore missing Pl Devices during PLM update" Revert "xloader:versal_net: save and restore image info table contents" Revert "xilpm:versal_common: fix potential issue on array out of bound." xilplmi: Fix MISRA C violation 13.4 xilplmi: Fixed MISRA C violation for Rule 17.7 xilplmi: Fix MISRA C violations for Rule 14.4 xilplmi: Fix MISRA C violation 10.8 xilplmi: MISRA C violation 10.3 updated for changelog dp21txss , v_hdmitxss1 and other components xilskey: added SDT support for examples xilpm: versal: server: Add XPM_POLL_TIMEOUT definition for CPPUTEST cmake: toolchainfiles: microblaze-plm_toolchain.cmake: Fix VERSAL_PLM redefined warning cmake: toolchainfiles: microblaze-p*: Force the CMAKE_MACHINE variable lib: sw_services: xilplmi: Fix implicit declaration of function Xil_SetMBFrequency warning lib: sw_services: xiltimer: Move the Xil_SetMBFrequency() API declaration to xiltimer.h sw_services:xilnvm:Fixed doxygen warnings scripts: pyesw: library_utils: Return proper error code ipipsu: Update macros to resolve redefinition issue lib: sw_services: xiltimer: Make changes with checkpatch lib: sw_services: xiltimer: Fix incorrect TTC counter handling for Zynq lib: sw_services: xiltimer: Fix sleep handling logic in scutimer adapter lib: sw_services: xiltimer: Add scutimer support for SDT flow ttcps: Fixed source code-format issue. ttcps: Fix HIS_COMF violations ttcps: Fix MISRA-C violation for RULE 14.3 ttcps: Fix MISRA-C violations for 10.7 and 12.2 ttcps: Fix MISRA-c violation for Rule 10.4 ttcps: Remove unnecessary call to XTtcPs_ClearInterruptStatus ttcps: Fix MISRA-C violations for Rule 10.5 ttcps: Fix MISRA-C violations for Rule 10.3 qspipsu: Update XQspiPsu_PolledRecvData and XQspiPsu_PolledMessageTransfer functions qspipsu: Fix MISRA-C violation 2.2 and 2.6 qspipsu: Fix MISRA-C violation 10.1 qspipsu: Fix MISRA-C violation 8.13 xilpm:versal_net: save and restore PL devices hierarchy xilpm:versal_net: Restore missing Pl Devices during PLM update xloader:versal_net: save and restore image info table contents xilpm:versal_common: fix potential issue on array out of bound. sw_services:xilpuf:Fixed MISRA-C Rule 2.5 violation ThirdParty: sw_services: OpenAMP: sdt: Remove A53, A72 and A78 support ThirdParty: sw_services: Libmetal: sdt: Add support for PMUFW and PMC Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 2d006765..e86f2eaa 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "79ba04717ca52a460438f4ec2da12186248adf97" +ESW_REV[2023.2] = "8c698994fb414274b530a1d1d36146a3ca69f993" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From efaf28a79e2cd25ec97bf74d24c5248899d6b292 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Mon, 18 Sep 2023 23:41:03 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_4139 sw_services: XilSecure: Input Validations are added for xsecure_elliptic.c file xilpm: examples: Integrate self-suspend example into vitisng/rigle flow sw_services:xilnvm:server: Avoid returning XST_SUCCESS incase of glitch sw_services:xilnvm:client: Avoid returning XST_SUCCESS incase of glitch sw_services: xilnvm: Add volatile keyword to avoid optimization sw_services: xilnvm: Fix assigning Status to XST_SUCCESS sw_services: xilnvm: Fix SW-BP-REDUNDANCY in XNvm_EfuseWriteDmeRevoke and XNvm_EfusePrgmIv lib: sw_apps: Fix race condition in the app CMakeLists.txt for sdt flow versal: Fix for ssit security review comments wdttb: Fixed MISRA-C violation 10.4 wdttb: Fix MISRA C violation 12.1 Fix internal security review comments bsp:standalone: Fixed source code-format issue. bsp:standalone: Fix MISRA-C violation for Rule 12.1 bsp:standalone: Fix MISRA-C violation for Rule 7.2 bsp:standalone: Fix MISRA-C violation for Directive 4.6 bsp:standalone: Fix Misra-c violation for Rule 10.3 xilpm:versal_net: save and restore PL devices hierarchy xilpm:versal_net: Restore missing Pl Devices during PLM update xloader:versal_net: save and restore image info table contents xilpm:versal_common: fix potential issue on array out of bound. updated for changelog xadcps and other components xilpm: versal: server: Fix MISRA-C violation for rule 8.13 xilpm: versal: server: Fix MISRA-C violation for rule 12.1 updated for changelog uartlite sw_services:xilocp:Fixes for Doxygen warnings dpdma: Fix MISRA-C rule 12.1 violation dpdma: Fix MISRA-C rule 15.5 violation Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index e86f2eaa..b635462f 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "8c698994fb414274b530a1d1d36146a3ca69f993" +ESW_REV[2023.2] = "6dd9d8283c5545c35353089e8ece1acb6c0d20b7" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 658dc1c77ec2e6db8da533be68d9514628a446d6 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 19 Sep 2023 17:03:03 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_3699 sw_services:xilsecure:Fixed NO_EFFECT coverity warning scripts: pyesw: retarget_app: Add support for retargeting application for different platform scripts: pyesw: reconfig_bsp: Add support for shared platform/bsp Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index b635462f..1bc01b55 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "6dd9d8283c5545c35353089e8ece1acb6c0d20b7" +ESW_REV[2023.2] = "e7178d2069036c83173116c2ecd44e8487cc30bc" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From f5611000dc098e51c0c488bc48aea999b9edf1b7 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 22 Sep 2023 12:51:24 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_7391 sw_services:xilnvm:Fixed MISRA-C Rule 12.2 violation sw_services:xilnvm:Fixed MISRA-C Rule 8.3 violation sw_services:xilnvm:Fixed MISRA-C Rule 8.7 violation sw_services:xilnvm: Fixed MISRA-C Rule 2.5 violation reupdated emacps changelog sw_services: xilnvm: Fix review comments updated for changelog avbuf and other components sw_services: xilloader: Move KAT & hash calculation out of PLM_OCP macro trngpsv: Fix MISRA-C violation 2.5 trngpsv: Fix MISRA-C violations 8.13 trngpsv: Fix MISRA-C violations 12.1 trngpsv: Fix MISRA-C violations 10.1 sw_services:xilfpga: Fixed source code-format issues sw_services:xilfpga: Fix MISRA-C violations for Rule 10.3 v_hdmitxss1: updated defines for tx pre and post cursor v_hdmirxss1: updated define for pre and post cursor Updated for cframe and other components sw_services:xilsecure:zynqmp:Fixed MISRA-C Rule 15.6 violation sw_services:xilsecure:zynqmp: Fixed MISRA-C Rule 17.8 violation sw_services:xilsecure:zynqmp: Fixed MISRA-C Rule 7.2 sw_services:xilsecure:zynqmp: Fixed MISRA_C Rule 11.9 xilsecure:zynqmp: Fixed MISRA-C violations lib: sw_apps: Match title and description for OpenAMP and Libmetal apps xilsecure: Added Check for All Zero Exponent Case Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 1bc01b55..4074543e 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "e7178d2069036c83173116c2ecd44e8487cc30bc" +ESW_REV[2023.2] = "a27988ee36e7402ee991778aae462bf27ae70295" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 2260d3c48ab6095a603b963cb2f35c4ef2066e94 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 22 Sep 2023 21:58:30 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_3335 sw_services: xilloader: Use correct mask to indicate KAT for SHA3 Instance 1 is run xilocp: Allowed PCR mask for GetPcr shall be 0xFF Revert "sw_services: xilloader: Move KAT & hash calculation out of PLM_OCP macro" sw_services:xilsecure:Fix HIS COMF Violations for server. re-updated for changelog xilpm versal_psmfw: assert reset in power down sequence xilpm: versal_net: assert reset before setting operation mode xilpm: server: Fix max DDRMC count in PlDev -> MemCtrlr link Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 4074543e..85f0317c 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "a27988ee36e7402ee991778aae462bf27ae70295" +ESW_REV[2023.2] = "71b2d15b9b6c2341488f7ed47640e9b28ecacb43" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 55e94b3042398422a2034b1c3ed4db6472eb48bb Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Mon, 25 Sep 2023 12:51:31 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_6539 sw_services: xilcert: Replace XSecure_MemCpy64 with Xil_SMemCpy sw_services: xilcert: Fix the value of UEID extension scripts: pyesw: reconfig_bsp: Add support for older platforms/bsp axidma: Fix simple interrupt example for SDT flow Xilsecure: Add version header file for client mode VersalNet: Disable cache for xilpuf and xilnvm libraries xilplmi: fixed missing header inclusion lib: sw_apps: Update the User Compile and Link options for c++ sources lib: sw_apps: Fix linker script LINK_DEPENDS in system device-tree flow updated for changelog vtc uartps: Fix xuartps_intr_example compilation errors in SDT flow sw_services:xilpuf:Fixed doxygen warnings sw_services:xilsecure:Fixed doxygen warnings Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 85f0317c..22584a66 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "71b2d15b9b6c2341488f7ed47640e9b28ecacb43" +ESW_REV[2023.2] = "26375a20f9790ee6b3afb180f6edb6fb70899257" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 9108010f9eb4602a8c60ab57c000a3e061e00067 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Tue, 26 Sep 2023 13:10:42 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_5263 Revert "uartps: Fix xuartps_intr_example compilation errors in SDT flow" sw_services:xilsecure:Fixed MISRA-C Rule 12.2 violation sw_services:xilsecure:Fixed compilation warning for ecdsa example sw_services:xilsecure:Fixed MISRA-C Rule 10.3 and 10.4 violations sw_services:xilsecure:Fixed misra-c Rule 8.13 violation sw_services:xilsecure:Fixed coverity warnings updated for ddrcpsu changelog Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 22584a66..9be0d1eb 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "26375a20f9790ee6b3afb180f6edb6fb70899257" +ESW_REV[2023.2] = "fc4af27d47b5077522e98e41b44ff0e83d8ea2cd" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From e091ac343fd937463f43ef20ee72442a5ff700fc Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 27 Sep 2023 14:33:17 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_6263 scripts: pyesw: library_utils: Pull the xilflash library irrespective of the hardware dependency Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 9be0d1eb..aa558038 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "fc4af27d47b5077522e98e41b44ff0e83d8ea2cd" +ESW_REV[2023.2] = "cb3901374f25eb6d85976c87730fad98dc9f3622" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 1208ea87db4a5444514b72f98fdb8599ab861f51 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 29 Sep 2023 11:55:53 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_6459 update Embedded SW license 2023.2 release Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index aa558038..5c23ba88 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "cb3901374f25eb6d85976c87730fad98dc9f3622" +ESW_REV[2023.2] = "3be255338c1cede23b9dc83e5a44369b63042ddd" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" @@ -16,7 +16,7 @@ EMBEDDEDSW_SRCURI ?= "${REPO};${EMBEDDEDSW_BRANCHARG}" LICENSE = "MIT" LIC_FILES_CHKSUM[xlnx_rel_v2023.1] = '3c310a3ee2197a4c92c6a0e2937c207c' -LIC_FILES_CHKSUM[xlnx_rel_v2023.2-next] = '6677b545d223964a4906f97a2229bfc5' +LIC_FILES_CHKSUM[xlnx_rel_v2023.2-next] = '9fceecdbcad88698f265578f3d4cb26c' LIC_FILES_CHKSUM ??= "file://license.txt;md5=${@d.getVarFlag('LIC_FILES_CHKSUM', d.getVar('BRANCH')) or '0'}" SRC_URI = "${EMBEDDEDSW_SRCURI}" -- cgit v1.2.3-54-g00ecf From 98ce3f1bca175168d24bf41a2b50f01a53af6dd0 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Wed, 4 Oct 2023 15:00:51 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_8615 scripts: pyesw: build_app: Add command line arg to specify .repo.yaml path Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 5c23ba88..9249ed8e 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "3be255338c1cede23b9dc83e5a44369b63042ddd" +ESW_REV[2023.2] = "2197dfbc59086e9fe15587a0df92d98184de6f67" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 9711aa74554f1afed5358d36cb9ba661abeb8e30 Mon Sep 17 00:00:00 2001 From: Mark Hatle Date: Tue, 3 Oct 2023 15:36:42 -0500 Subject: embeddedsw: Update to release version Move to release branch, which is rebased from the dev branch Signed-off-by: Mark Hatle --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index 9249ed8e..c940b154 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -4,11 +4,11 @@ ESW_VER ?= "${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or 'master' REPO ??= "git://github.com/Xilinx/embeddedsw.git;protocol=https" ESW_BRANCH[2023.1] = "xlnx_rel_v2023.1" -ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next" +ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "2197dfbc59086e9fe15587a0df92d98184de6f67" +ESW_REV[2023.2] = "19ade382dd3b8a89aa737d9a67ceb2d28c6ab1bc" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" @@ -16,7 +16,7 @@ EMBEDDEDSW_SRCURI ?= "${REPO};${EMBEDDEDSW_BRANCHARG}" LICENSE = "MIT" LIC_FILES_CHKSUM[xlnx_rel_v2023.1] = '3c310a3ee2197a4c92c6a0e2937c207c' -LIC_FILES_CHKSUM[xlnx_rel_v2023.2-next] = '9fceecdbcad88698f265578f3d4cb26c' +LIC_FILES_CHKSUM[xlnx_rel_v2023.2] = '9fceecdbcad88698f265578f3d4cb26c' LIC_FILES_CHKSUM ??= "file://license.txt;md5=${@d.getVarFlag('LIC_FILES_CHKSUM', d.getVar('BRANCH')) or '0'}" SRC_URI = "${EMBEDDEDSW_SRCURI}" -- cgit v1.2.3-54-g00ecf From 5f3b406206690c18fa5dc77f3feed4c01ace8274 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Fri, 6 Oct 2023 12:50:40 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_4971 scripts: pyesw: open_amp: Extend cleanup support for Libmetal and OpenAMP scripts: pyesw: open_amp: Simplify openamp-lopper run scripts: pyesw: open_amp: Add support for Zynq for OpenAMP and Libmetal in BSP scripts: Enable OpenAMP and Libmetal demos to mimic convention of other ESW apps Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index c940b154..f5fc133c 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "19ade382dd3b8a89aa737d9a67ceb2d28c6ab1bc" +ESW_REV[2023.2] = "bd497446bded94d1ea627096127587f60c9b8db6" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf From 05911e19d85fd98c42054238392afe95a5125265 Mon Sep 17 00:00:00 2001 From: Sivaprasad Addepalli Date: Thu, 12 Oct 2023 21:44:13 +0530 Subject: embeddedsw : Updated SRCREV for 2023.2_9035 xilpm: versal: server: Remove XRAM axi-lite clock selection Signed-off-by: Siva Addepalli --- meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'meta-xilinx-standalone') diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index f5fc133c..12db0da2 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2" BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" -ESW_REV[2023.2] = "bd497446bded94d1ea627096127587f60c9b8db6" +ESW_REV[2023.2] = "c9a0ee31b2a14cbcfcb56ca369037319b4ad4847" SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -- cgit v1.2.3-54-g00ecf