/*
 * SPDX-License-Identifier: MIT
 *
 * dts file for ZynqMP OpenAMP
 *
 * Copyright (C) 2022, Advanced Micro Devices, Inc.  All rights reserved.
 *
 */

&{/} {
	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;
		rpu0vdev0vring0: rpu0vdev0vring0@3ed40000 {
			no-map;
			reg = <0x0 0x3ed40000 0x0 0x4000>;
		};
		rpu0vdev0vring1: rpu0vdev0vring1@3ed44000 {
			no-map;
			reg = <0x0 0x3ed44000 0x0 0x4000>;
		};
		rpu0vdev0buffer: rpu0vdev0buffer@3ed48000 {
			no-map;
			reg = <0x0 0x3ed48000 0x0 0x100000>;
		};
		rproc_0_reserved: rproc@3ed00000 {
			no-map;
			reg = <0x0 0x3ed00000 0x0 0x40000>;
		};
		rpu1vdev0vring0: rpu0vdev0vring0@3ef40000 {
			no-map;
			reg = <0x0 0x3ef40000 0x0 0x4000>;
		};
		rpu1vdev0vring1: rpu0vdev0vring1@3ef44000 {
			no-map;
			reg = <0x0 0x3ef44000 0x0 0x4000>;
		};
		rpu1vdev0buffer: rpu0vdev0buffer@3ef48000 {
			no-map;
			reg = <0x0 0x3ef48000 0x0 0x100000>;
		};
		rproc_1_reserved: rproc@3ef00000 {
			no-map;
			reg = <0x0 0x3ef00000 0x0 0x40000>;
		};

	};

	tcm_0a: tcm_0a@ffe00000 {
		no-map;
		reg = <0x0 0xffe00000 0x0 0x10000>;
		status = "okay";
		compatible = "mmio-sram";
		power-domains = <&zynqmp_firmware 15>;
	};

	tcm_0b: tcm_0b@ffe20000 {
		no-map;
		reg = <0x0 0xffe20000 0x0 0x10000>;
		status = "okay";
		compatible = "mmio-sram";
		power-domains = <&zynqmp_firmware 16>;
	};
	tcm_1a: tcm_0a@ffe90000 {
		no-map;
		reg = <0x0 0xffe90000 0x0 0x10000>;
		status = "okay";
		compatible = "mmio-sram";
		power-domains = <&zynqmp_firmware 17>;
	};

	tcm_1b: tcm_0b@ffeb0000 {
		no-map;
		reg = <0x0 0xffeb0000 0x0 0x10000>;
		status = "okay";
		compatible = "mmio-sram";
		power-domains = <&zynqmp_firmware 18>;
	};
	rf5ss@ff9a0000 {
		compatible = "xlnx,zynqmp-r5-remoteproc";
		xlnx,cluster-mode = <1>;
		ranges;
		reg = <0x0 0xFF9A0000 0x0 0x10000>;
		#address-cells = <0x2>;
		#size-cells = <0x2>;

		r5f_0: r5f@0 {
			compatible = "xilinx,r5f";
			#address-cells = <2>;
			#size-cells = <2>;
			ranges;
			sram = <&tcm_0a>, <&tcm_0b>;
			memory-region = <&rproc_0_reserved>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
			power-domains = <&zynqmp_firmware 7>;
			mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
			mbox-names = "tx", "rx";
		};
		r5f_1: r5f@1 {
			compatible = "xilinx,r5f";
			#address-cells = <2>;
			#size-cells = <2>;
			ranges;
			sram = <&tcm_1a>, <&tcm_1b>;
			memory-region = <&rproc_1_reserved>, <&rpu1vdev0buffer>, <&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
			power-domains = <&zynqmp_firmware 8>;
			mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>;
			mbox-names = "tx", "rx";
		};

	};

	zynqmp_ipi1 {
		compatible = "xlnx,zynqmp-ipi-mailbox";
		interrupt-parent = <&gic>;
		interrupts = <0 29 4>;
		xlnx,ipi-id = <7>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		/* APU<->RPU0 IPI mailbox controller */
		ipi_mailbox_rpu0: mailbox@ff990600 {
			reg = <0xff990600 0x20>,
			      <0xff990620 0x20>,
			      <0xff9900c0 0x20>,
			      <0xff9900e0 0x20>;
			reg-names = "local_request_region",
				    "local_response_region",
				    "remote_request_region",
				    "remote_response_region";
			#mbox-cells = <1>;
			xlnx,ipi-id = <1>;
		};
	};
	zynqmp_ipi2 {
		compatible = "xlnx,zynqmp-ipi-mailbox";
		interrupt-parent = <&gic>;
		interrupts = <0 30 4>;
		xlnx,ipi-id = <8>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		/* APU<->RPU1 IPI mailbox controller */
		ipi_mailbox_rpu1: mailbox@ff990800 {
			reg = <0xff990800 0x20>,
			      <0xff990820 0x20>,
			      <0xff990200 0x20>,
			      <0xff990220 0x20>;
			reg-names = "local_request_region",
				"local_response_region",
				"remote_request_region",
				"remote_response_region";
			#mbox-cells = <1>;
			xlnx,ipi-id = <2>;
		};
	};
};