diff options
| -rw-r--r-- | meta/packages/gcc/gcc-4.2.3.inc | 1 | ||||
| -rw-r--r-- | meta/packages/gcc/gcc-4.2.3/fix-ICE-in-arm_unwind_emit_set.diff | 18 | ||||
| -rw-r--r-- | meta/packages/gcc/gcc-4.3.1.inc | 1 | ||||
| -rw-r--r-- | meta/packages/gcc/gcc-4.3.1/fix-ICE-in-arm_unwind_emit_set.diff | 28 | ||||
| -rw-r--r-- | meta/packages/gcc/gcc-4.3.2.inc | 1 | ||||
| -rw-r--r-- | meta/packages/gcc/gcc-4.3.2/fix-ICE-in-arm_unwind_emit_set.diff | 28 |
6 files changed, 0 insertions, 77 deletions
diff --git a/meta/packages/gcc/gcc-4.2.3.inc b/meta/packages/gcc/gcc-4.2.3.inc index 7726030f20..127c3cd525 100644 --- a/meta/packages/gcc/gcc-4.2.3.inc +++ b/meta/packages/gcc/gcc-4.2.3.inc | |||
| @@ -31,7 +31,6 @@ SRC_URI = "ftp://ftp.gnu.org/pub/gnu/gcc/gcc-${PV}/gcc-${PV}.tar.bz2 \ | |||
| 31 | file://ldflags.patch;patch=1 \ | 31 | file://ldflags.patch;patch=1 \ |
| 32 | file://zecke-xgcc-cpp.patch;patch=1 \ | 32 | file://zecke-xgcc-cpp.patch;patch=1 \ |
| 33 | file://unbreak-armv4t.patch;patch=1 \ | 33 | file://unbreak-armv4t.patch;patch=1 \ |
| 34 | file://fix-ICE-in-arm_unwind_emit_set.diff;patch=1 \ | ||
| 35 | file://cache-amnesia.patch;patch=1 \ | 34 | file://cache-amnesia.patch;patch=1 \ |
| 36 | file://gfortran.patch;patch=1 \ | 35 | file://gfortran.patch;patch=1 \ |
| 37 | file://gcc-4.0.2-e300c2c3.patch;patch=1 \ | 36 | file://gcc-4.0.2-e300c2c3.patch;patch=1 \ |
diff --git a/meta/packages/gcc/gcc-4.2.3/fix-ICE-in-arm_unwind_emit_set.diff b/meta/packages/gcc/gcc-4.2.3/fix-ICE-in-arm_unwind_emit_set.diff deleted file mode 100644 index 568e15abff..0000000000 --- a/meta/packages/gcc/gcc-4.2.3/fix-ICE-in-arm_unwind_emit_set.diff +++ /dev/null | |||
| @@ -1,18 +0,0 @@ | |||
| 1 | --- trunk/gcc/config/arm/arm.c 2006/09/19 13:18:27 117055 | ||
| 2 | +++ trunk/gcc/config/arm/arm.c 2006/09/19 13:19:24 117056 | ||
| 3 | @@ -15415,6 +15415,15 @@ | ||
| 4 | /* Move from sp to reg. */ | ||
| 5 | asm_fprintf (asm_out_file, "\t.movsp %r\n", REGNO (e0)); | ||
| 6 | } | ||
| 7 | + else if (GET_CODE (e1) == PLUS | ||
| 8 | + && GET_CODE (XEXP (e1, 0)) == REG | ||
| 9 | + && REGNO (XEXP (e1, 0)) == SP_REGNUM | ||
| 10 | + && GET_CODE (XEXP (e1, 1)) == CONST_INT) | ||
| 11 | + { | ||
| 12 | + /* Set reg to offset from sp. */ | ||
| 13 | + asm_fprintf (asm_out_file, "\t.movsp %r, #%d\n", | ||
| 14 | + REGNO (e0), (int)INTVAL(XEXP (e1, 1))); | ||
| 15 | + } | ||
| 16 | else | ||
| 17 | abort (); | ||
| 18 | break; | ||
diff --git a/meta/packages/gcc/gcc-4.3.1.inc b/meta/packages/gcc/gcc-4.3.1.inc index fb1b0a2f74..3fcd160611 100644 --- a/meta/packages/gcc/gcc-4.3.1.inc +++ b/meta/packages/gcc/gcc-4.3.1.inc | |||
| @@ -50,7 +50,6 @@ SRC_URI = "ftp://ftp.gnu.org/pub/gnu/gcc/gcc-${PV}/gcc-${PV}.tar.bz2 \ | |||
| 50 | # file://arm-thumb-cache.patch;patch=1 \ | 50 | # file://arm-thumb-cache.patch;patch=1 \ |
| 51 | file://ldflags.patch;patch=1 \ | 51 | file://ldflags.patch;patch=1 \ |
| 52 | file://zecke-xgcc-cpp.patch;patch=1 \ | 52 | file://zecke-xgcc-cpp.patch;patch=1 \ |
| 53 | file://fix-ICE-in-arm_unwind_emit_set.diff;patch=1 \ | ||
| 54 | file://cache-amnesia.patch;patch=1 \ | 53 | file://cache-amnesia.patch;patch=1 \ |
| 55 | file://gfortran.patch;patch=1 \ | 54 | file://gfortran.patch;patch=1 \ |
| 56 | # file://gcc-4.0.2-e300c2c3.patch;patch=1 \ | 55 | # file://gcc-4.0.2-e300c2c3.patch;patch=1 \ |
diff --git a/meta/packages/gcc/gcc-4.3.1/fix-ICE-in-arm_unwind_emit_set.diff b/meta/packages/gcc/gcc-4.3.1/fix-ICE-in-arm_unwind_emit_set.diff deleted file mode 100644 index b8a147d3d9..0000000000 --- a/meta/packages/gcc/gcc-4.3.1/fix-ICE-in-arm_unwind_emit_set.diff +++ /dev/null | |||
| @@ -1,28 +0,0 @@ | |||
| 1 | --- /tmp/arm.c 2008-03-17 14:24:39.590464969 +0100 | ||
| 2 | +++ gcc-4.3.0/gcc/config/arm/arm.c 2008-03-17 14:12:21.614701982 +0100 | ||
| 3 | @@ -15959,6 +15959,9 @@ | ||
| 4 | int regno; | ||
| 5 | int lo_mask = mask & 0xFF; | ||
| 6 | int pushed_words = 0; | ||
| 7 | + rtx e0; | ||
| 8 | + rtx e1; | ||
| 9 | + unsigned reg; | ||
| 10 | |||
| 11 | gcc_assert (mask); | ||
| 12 | |||
| 13 | @@ -16025,6 +16028,15 @@ | ||
| 14 | |||
| 15 | return; | ||
| 16 | } | ||
| 17 | + else if (GET_CODE (e1) == PLUS | ||
| 18 | + && GET_CODE (XEXP (e1, 0)) == REG | ||
| 19 | + && REGNO (XEXP (e1, 0)) == SP_REGNUM | ||
| 20 | + && GET_CODE (XEXP (e1, 1)) == CONST_INT) | ||
| 21 | + { | ||
| 22 | + /* Set reg to offset from sp. */ | ||
| 23 | + asm_fprintf (asm_out_file, "\t.movsp %r, #%d\n", | ||
| 24 | + REGNO (e0), (int)INTVAL(XEXP (e1, 1))); | ||
| 25 | + } | ||
| 26 | else | ||
| 27 | { | ||
| 28 | if (mask & 0xFF) | ||
diff --git a/meta/packages/gcc/gcc-4.3.2.inc b/meta/packages/gcc/gcc-4.3.2.inc index 1e8f4d6b4f..93cfbe0c4a 100644 --- a/meta/packages/gcc/gcc-4.3.2.inc +++ b/meta/packages/gcc/gcc-4.3.2.inc | |||
| @@ -50,7 +50,6 @@ SRC_URI = "ftp://ftp.gnu.org/pub/gnu/gcc/gcc-${PV}/gcc-${PV}.tar.bz2 \ | |||
| 50 | # file://arm-thumb-cache.patch;patch=1 \ | 50 | # file://arm-thumb-cache.patch;patch=1 \ |
| 51 | file://ldflags.patch;patch=1 \ | 51 | file://ldflags.patch;patch=1 \ |
| 52 | file://zecke-xgcc-cpp.patch;patch=1 \ | 52 | file://zecke-xgcc-cpp.patch;patch=1 \ |
| 53 | file://fix-ICE-in-arm_unwind_emit_set.diff;patch=1 \ | ||
| 54 | file://cache-amnesia.patch;patch=1 \ | 53 | file://cache-amnesia.patch;patch=1 \ |
| 55 | file://gfortran.patch;patch=1 \ | 54 | file://gfortran.patch;patch=1 \ |
| 56 | # file://gcc-4.0.2-e300c2c3.patch;patch=1 \ | 55 | # file://gcc-4.0.2-e300c2c3.patch;patch=1 \ |
diff --git a/meta/packages/gcc/gcc-4.3.2/fix-ICE-in-arm_unwind_emit_set.diff b/meta/packages/gcc/gcc-4.3.2/fix-ICE-in-arm_unwind_emit_set.diff deleted file mode 100644 index b8a147d3d9..0000000000 --- a/meta/packages/gcc/gcc-4.3.2/fix-ICE-in-arm_unwind_emit_set.diff +++ /dev/null | |||
| @@ -1,28 +0,0 @@ | |||
| 1 | --- /tmp/arm.c 2008-03-17 14:24:39.590464969 +0100 | ||
| 2 | +++ gcc-4.3.0/gcc/config/arm/arm.c 2008-03-17 14:12:21.614701982 +0100 | ||
| 3 | @@ -15959,6 +15959,9 @@ | ||
| 4 | int regno; | ||
| 5 | int lo_mask = mask & 0xFF; | ||
| 6 | int pushed_words = 0; | ||
| 7 | + rtx e0; | ||
| 8 | + rtx e1; | ||
| 9 | + unsigned reg; | ||
| 10 | |||
| 11 | gcc_assert (mask); | ||
| 12 | |||
| 13 | @@ -16025,6 +16028,15 @@ | ||
| 14 | |||
| 15 | return; | ||
| 16 | } | ||
| 17 | + else if (GET_CODE (e1) == PLUS | ||
| 18 | + && GET_CODE (XEXP (e1, 0)) == REG | ||
| 19 | + && REGNO (XEXP (e1, 0)) == SP_REGNUM | ||
| 20 | + && GET_CODE (XEXP (e1, 1)) == CONST_INT) | ||
| 21 | + { | ||
| 22 | + /* Set reg to offset from sp. */ | ||
| 23 | + asm_fprintf (asm_out_file, "\t.movsp %r, #%d\n", | ||
| 24 | + REGNO (e0), (int)INTVAL(XEXP (e1, 1))); | ||
| 25 | + } | ||
| 26 | else | ||
| 27 | { | ||
| 28 | if (mask & 0xFF) | ||
