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-rw-r--r--meta/recipes-devtools/gcc/gcc-11.3.inc5
-rw-r--r--meta/recipes-devtools/gcc/gcc/0001-aarch64-Update-Neoverse-N2-core-defini.patch42
-rw-r--r--meta/recipes-devtools/gcc/gcc/0002-aarch64-add-armv9-a-to-march.patch89
-rw-r--r--meta/recipes-devtools/gcc/gcc/0003-aarch64-Enable-FP16-feature-by-default-for-Armv9.patch38
-rw-r--r--meta/recipes-devtools/gcc/gcc/0004-arm-add-armv9-a-architecture-to-march.patch294
5 files changed, 468 insertions, 0 deletions
diff --git a/meta/recipes-devtools/gcc/gcc-11.3.inc b/meta/recipes-devtools/gcc/gcc-11.3.inc
index 2cebeb2bc8..27074a06ae 100644
--- a/meta/recipes-devtools/gcc/gcc-11.3.inc
+++ b/meta/recipes-devtools/gcc/gcc-11.3.inc
@@ -65,7 +65,12 @@ SRC_URI = "\
65 file://0003-CVE-2021-42574.patch \ 65 file://0003-CVE-2021-42574.patch \
66 file://0004-CVE-2021-42574.patch \ 66 file://0004-CVE-2021-42574.patch \
67 file://0001-CVE-2021-46195.patch \ 67 file://0001-CVE-2021-46195.patch \
68 file://0001-aarch64-Update-Neoverse-N2-core-defini.patch \
69 file://0002-aarch64-add-armv9-a-to-march.patch \
70 file://0003-aarch64-Enable-FP16-feature-by-default-for-Armv9.patch \
71 file://0004-arm-add-armv9-a-architecture-to-march.patch \
68" 72"
73
69SRC_URI[sha256sum] = "b47cf2818691f5b1e21df2bb38c795fac2cfbd640ede2d0a5e1c89e338a3ac39" 74SRC_URI[sha256sum] = "b47cf2818691f5b1e21df2bb38c795fac2cfbd640ede2d0a5e1c89e338a3ac39"
70 75
71S = "${TMPDIR}/work-shared/gcc-${PV}-${PR}/gcc-${PV}" 76S = "${TMPDIR}/work-shared/gcc-${PV}-${PR}/gcc-${PV}"
diff --git a/meta/recipes-devtools/gcc/gcc/0001-aarch64-Update-Neoverse-N2-core-defini.patch b/meta/recipes-devtools/gcc/gcc/0001-aarch64-Update-Neoverse-N2-core-defini.patch
new file mode 100644
index 0000000000..8429242348
--- /dev/null
+++ b/meta/recipes-devtools/gcc/gcc/0001-aarch64-Update-Neoverse-N2-core-defini.patch
@@ -0,0 +1,42 @@
1From 9f37d31324f89d0b7b2abac988a976d121ae29c6 Mon Sep 17 00:00:00 2001
2From: Andre Vieira <andre.simoesdiasvieira@arm.com>
3Date: Thu, 8 Sep 2022 06:02:18 +0000
4Subject: [PATCH 1/4] aarch64: Update Neoverse N2 core definition
5
6commit 9f37d31324f89d0b7b2abac988a976d121ae29c6 from upstream.
7
8gcc/ChangeLog:
9
10 * config/aarch64/aarch64-cores.def: Update Neoverse N2 core entry.
11
12Upstream-Status: Backport
13Signed-off-by: Ruiqiang Hao <Ruiqiang.Hao@windriver.com>
14---
15 gcc/config/aarch64/aarch64-cores.def | 6 +++---
16 1 file changed, 3 insertions(+), 3 deletions(-)
17
18diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
19index 4643e0e27..3478e567a 100644
20--- a/gcc/config/aarch64/aarch64-cores.def
21+++ b/gcc/config/aarch64/aarch64-cores.def
22@@ -145,9 +145,6 @@ AARCH64_CORE("neoverse-512tvb", neoverse512tvb, cortexa57, 8_4A, AARCH64_FL_FOR
23 /* Qualcomm ('Q') cores. */
24 AARCH64_CORE("saphira", saphira, saphira, 8_4A, AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_CRYPTO | AARCH64_FL_RCPC, saphira, 0x51, 0xC01, -1)
25
26-/* Armv8.5-A Architecture Processors. */
27-AARCH64_CORE("neoverse-n2", neoversen2, cortexa57, 8_5A, AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_F16 | AARCH64_FL_SVE | AARCH64_FL_SVE2 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_RNG | AARCH64_FL_MEMTAG, neoversen2, 0x41, 0xd49, -1)
28-
29 /* ARMv8-A big.LITTLE implementations. */
30
31 AARCH64_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, 0x41, AARCH64_BIG_LITTLE (0xd07, 0xd03), -1)
32@@ -163,4 +160,7 @@ AARCH64_CORE("cortex-a76.cortex-a55", cortexa76cortexa55, cortexa53, 8_2A, AAR
33 /* Armv8-R Architecture Processors. */
34 AARCH64_CORE("cortex-r82", cortexr82, cortexa53, 8R, AARCH64_FL_FOR_ARCH8_R, cortexa53, 0x41, 0xd15, -1)
35
36+/* Armv9-A Architecture Processors. */
37+AARCH64_CORE("neoverse-n2", neoversen2, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_RNG | AARCH64_FL_MEMTAG | AARCH64_FL_PROFILE, neoversen2, 0x41, 0xd49, -1)
38+
39 #undef AARCH64_CORE
40--
412.32.0
42
diff --git a/meta/recipes-devtools/gcc/gcc/0002-aarch64-add-armv9-a-to-march.patch b/meta/recipes-devtools/gcc/gcc/0002-aarch64-add-armv9-a-to-march.patch
new file mode 100644
index 0000000000..2b1c17f53e
--- /dev/null
+++ b/meta/recipes-devtools/gcc/gcc/0002-aarch64-add-armv9-a-to-march.patch
@@ -0,0 +1,89 @@
1From d3cf45d15b2fabc767b2d10a0c6bb9fb845e4f99 Mon Sep 17 00:00:00 2001
2From: Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
3Date: Fri, 1 Oct 2021 10:06:45 +0100
4Subject: [PATCH 2/4] aarch64: add armv9-a to -march
5
6commit f0688d42c9b74a6999548ff2e79ae440b049b87f from upstream
7
8gcc/ChangeLog:
9
10 * config/aarch64/aarch64-arches.def (AARCH64_ARCH): Added
11 armv9-a.
12 * config/aarch64/aarch64.h (AARCH64_FL_V9): New.
13 (AARCH64_FL_FOR_ARCH9): New flags for Armv9-A.
14 (AARCH64_ISA_V9): New ISA flag.
15 * doc/invoke.texi: Update docs.
16
17Upstream-Status: Backport
18Signed-off-by: Ruiqiang Hao <Ruiqiang.Hao@windriver.com>
19---
20 gcc/config/aarch64/aarch64-arches.def | 1 +
21 gcc/config/aarch64/aarch64.h | 5 +++++
22 gcc/doc/invoke.texi | 3 +++
23 3 files changed, 9 insertions(+)
24
25diff --git a/gcc/config/aarch64/aarch64-arches.def b/gcc/config/aarch64/aarch64-arches.def
26index b7497277b..c47ca622c 100644
27--- a/gcc/config/aarch64/aarch64-arches.def
28+++ b/gcc/config/aarch64/aarch64-arches.def
29@@ -38,5 +38,6 @@ AARCH64_ARCH("armv8.4-a", generic, 8_4A, 8, AARCH64_FL_FOR_ARCH8_4)
30 AARCH64_ARCH("armv8.5-a", generic, 8_5A, 8, AARCH64_FL_FOR_ARCH8_5)
31 AARCH64_ARCH("armv8.6-a", generic, 8_6A, 8, AARCH64_FL_FOR_ARCH8_6)
32 AARCH64_ARCH("armv8-r", generic, 8R , 8, AARCH64_FL_FOR_ARCH8_R)
33+AARCH64_ARCH("armv9-a", generic, 9A , 9, AARCH64_FL_FOR_ARCH9)
34
35 #undef AARCH64_ARCH
36diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
37index bfffbcd6a..b914bfb5c 100644
38--- a/gcc/config/aarch64/aarch64.h
39+++ b/gcc/config/aarch64/aarch64.h
40@@ -230,6 +230,8 @@ extern unsigned aarch64_architecture_version;
41
42 /* Pointer Authentication (PAUTH) extension. */
43 #define AARCH64_FL_PAUTH (1ULL << 40)
44+/* Armv9.0-A. */
45+#define AARCH64_FL_V9 (1ULL << 41) /* Armv9.0-A Architecture. */
46
47 /* Has FP and SIMD. */
48 #define AARCH64_FL_FPSIMD (AARCH64_FL_FP | AARCH64_FL_SIMD)
49@@ -257,6 +259,8 @@ extern unsigned aarch64_architecture_version;
50 | AARCH64_FL_I8MM | AARCH64_FL_BF16)
51 #define AARCH64_FL_FOR_ARCH8_R \
52 (AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_V8_R)
53+#define AARCH64_FL_FOR_ARCH9 \
54+ (AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_SVE | AARCH64_FL_SVE2 | AARCH64_FL_V9)
55
56 /* Macros to test ISA flags. */
57
58@@ -295,6 +299,7 @@ extern unsigned aarch64_architecture_version;
59 #define AARCH64_ISA_SB (aarch64_isa_flags & AARCH64_FL_SB)
60 #define AARCH64_ISA_V8_R (aarch64_isa_flags & AARCH64_FL_V8_R)
61 #define AARCH64_ISA_PAUTH (aarch64_isa_flags & AARCH64_FL_PAUTH)
62+#define AARCH64_ISA_V9 (aarch64_isa_flags & AARCH64_FL_V9)
63
64 /* Crypto is an optional extension to AdvSIMD. */
65 #define TARGET_CRYPTO (TARGET_SIMD && AARCH64_ISA_CRYPTO)
66diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
67index c47cfd472..7184a62d0 100644
68--- a/gcc/doc/invoke.texi
69+++ b/gcc/doc/invoke.texi
70@@ -18270,6 +18270,8 @@ and the features that they enable by default:
71 @item @samp{armv8.4-a} @tab Armv8.4-A @tab @samp{armv8.3-a}, @samp{+flagm}, @samp{+fp16fml}, @samp{+dotprod}
72 @item @samp{armv8.5-a} @tab Armv8.5-A @tab @samp{armv8.4-a}, @samp{+sb}, @samp{+ssbs}, @samp{+predres}
73 @item @samp{armv8.6-a} @tab Armv8.6-A @tab @samp{armv8.5-a}, @samp{+bf16}, @samp{+i8mm}
74+@item @samp{armv8.7-a} @tab Armv8.7-A @tab @samp{armv8.6-a}, @samp{+ls64}
75+@item @samp{armv9-a} @tab Armv9-A @tab @samp{armv8.5-a}, @samp{+sve}, @samp{+sve2}
76 @item @samp{armv8-r} @tab Armv8-R @tab @samp{armv8-r}
77 @end multitable
78
79@@ -19692,6 +19694,7 @@ Permissible names are:
80 @samp{armv8.4-a},
81 @samp{armv8.5-a},
82 @samp{armv8.6-a},
83+@samp{armv9-a},
84 @samp{armv7-r},
85 @samp{armv8-r},
86 @samp{armv6-m}, @samp{armv6s-m},
87--
882.32.0
89
diff --git a/meta/recipes-devtools/gcc/gcc/0003-aarch64-Enable-FP16-feature-by-default-for-Armv9.patch b/meta/recipes-devtools/gcc/gcc/0003-aarch64-Enable-FP16-feature-by-default-for-Armv9.patch
new file mode 100644
index 0000000000..2e85384b43
--- /dev/null
+++ b/meta/recipes-devtools/gcc/gcc/0003-aarch64-Enable-FP16-feature-by-default-for-Armv9.patch
@@ -0,0 +1,38 @@
1From 49bfa1927813ae898dfa4e0d2bbde033c353e3dc Mon Sep 17 00:00:00 2001
2From: Andre Vieira <andre.simoesdiasvieira@arm.com>
3Date: Tue, 22 Mar 2022 11:44:06 +0000
4Subject: [PATCH 3/4] aarch64: Enable FP16 feature by default for Armv9
5
6commit 0bae246acc758d4b11dd575b05207fd69169109b from upstream
7
8This patch adds the feature bit for FP16 to the feature set for Armv9 since
9Armv9 requires SVE to be implemented and SVE requires FP16 to be implemented.
10
112022-03-22 Andre Vieira <andre.simoesdiasvieira@arm.com>
12
13 * config/aarch64/aarch64.h (AARCH64_FL_FOR_ARCH9): Add FP16 feature
14 bit.
15
16Upstream-Status: Backport
17Signed-off-by: Ruiqiang Hao <Ruiqiang.Hao@windriver.com>
18---
19 gcc/config/aarch64/aarch64.h | 3 ++-
20 1 file changed, 2 insertions(+), 1 deletion(-)
21
22diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
23index b914bfb5c..55b60d540 100644
24--- a/gcc/config/aarch64/aarch64.h
25+++ b/gcc/config/aarch64/aarch64.h
26@@ -260,7 +260,8 @@ extern unsigned aarch64_architecture_version;
27 #define AARCH64_FL_FOR_ARCH8_R \
28 (AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_V8_R)
29 #define AARCH64_FL_FOR_ARCH9 \
30- (AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_SVE | AARCH64_FL_SVE2 | AARCH64_FL_V9)
31+ (AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_SVE | AARCH64_FL_SVE2 | AARCH64_FL_V9 \
32+ | AARCH64_FL_F16)
33
34 /* Macros to test ISA flags. */
35
36--
372.32.0
38
diff --git a/meta/recipes-devtools/gcc/gcc/0004-arm-add-armv9-a-architecture-to-march.patch b/meta/recipes-devtools/gcc/gcc/0004-arm-add-armv9-a-architecture-to-march.patch
new file mode 100644
index 0000000000..c38d1b9119
--- /dev/null
+++ b/meta/recipes-devtools/gcc/gcc/0004-arm-add-armv9-a-architecture-to-march.patch
@@ -0,0 +1,294 @@
1From e66a37acae62236611f951e706e9a2bfbd753f39 Mon Sep 17 00:00:00 2001
2From: Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
3Date: Tue, 9 Nov 2021 09:40:05 +0000
4Subject: [PATCH 4/4] arm: add armv9-a architecture to -march
5
6commit 32ba7860ccaddd5219e6dae94a3d0653e124c9dd from upstream
7
8In this patch:
9 + Add `armv9-a` to -march.
10 + Update multilib with armv9-a and armv9-a+simd.
11
12gcc/ChangeLog:
13
14 * config/arm/arm-cpus.in (armv9): New define.
15 (ARMv9a): New group.
16 (armv9-a): New arch definition.
17 * config/arm/arm-tables.opt: Regenerate.
18 * config/arm/arm.h (BASE_ARCH_9A): New arch enum value.
19 * config/arm/t-aprofile: Added armv9-a and armv9+simd.
20 * config/arm/t-arm-elf: Added arm9-a, v9_fps and all_v9_archs
21 to MULTILIB_MATCHES.
22 * config/arm/t-multilib: Added v9_a_nosimd_variants and
23 v9_a_simd_variants to MULTILIB_MATCHES.
24 * doc/invoke.texi: Update docs.
25
26gcc/testsuite/ChangeLog:
27
28 * gcc.target/arm/multilib.exp: Update test with armv9-a entries.
29 * lib/target-supports.exp (v9a): Add new armflag.
30 (__ARM_ARCH_9A__): Add new armdef.
31
32Upstream-Status: Backport
33Signed-off-by: Ruiqiang Hao <Ruiqiang.Hao@windriver.com>
34---
35 gcc/config/arm/arm-cpus.in | 19 +++++++++++++++++
36 gcc/config/arm/arm-tables.opt | 7 +++++--
37 gcc/config/arm/arm.h | 3 ++-
38 gcc/config/arm/t-aprofile | 25 +++++++++++++++++++----
39 gcc/config/arm/t-arm-elf | 9 ++++++++
40 gcc/config/arm/t-multilib | 12 +++++++++++
41 gcc/doc/invoke.texi | 1 +
42 gcc/testsuite/gcc.target/arm/multilib.exp | 8 ++++++++
43 gcc/testsuite/lib/target-supports.exp | 3 ++-
44 9 files changed, 79 insertions(+), 8 deletions(-)
45
46diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
47index bcc9ebe9f..58d83829c 100644
48--- a/gcc/config/arm/arm-cpus.in
49+++ b/gcc/config/arm/arm-cpus.in
50@@ -132,6 +132,9 @@ define feature cmse
51 # Architecture rel 8.1-M.
52 define feature armv8_1m_main
53
54+# Architecture rel 9.0.
55+define feature armv9
56+
57 # Floating point and Neon extensions.
58 # VFPv1 is not supported in GCC.
59
60@@ -293,6 +296,7 @@ define fgroup ARMv8m_base ARMv6m armv8 cmse tdiv
61 define fgroup ARMv8m_main ARMv7m armv8 cmse
62 define fgroup ARMv8r ARMv8a
63 define fgroup ARMv8_1m_main ARMv8m_main armv8_1m_main
64+define fgroup ARMv9a ARMv8_5a armv9
65
66 # Useful combinations.
67 define fgroup VFPv2 vfpv2
68@@ -751,6 +755,21 @@ begin arch armv8.1-m.main
69 option cdecp7 add cdecp7
70 end arch armv8.1-m.main
71
72+begin arch armv9-a
73+ tune for cortex-a53
74+ tune flags CO_PROC
75+ base 9A
76+ profile A
77+ isa ARMv9a
78+ option simd add FP_ARMv8 DOTPROD
79+ option fp16 add fp16 fp16fml FP_ARMv8 DOTPROD
80+ option crypto add FP_ARMv8 CRYPTO DOTPROD
81+ option nocrypto remove ALL_CRYPTO
82+ option nofp remove ALL_FP
83+ option i8mm add i8mm FP_ARMv8 DOTPROD
84+ option bf16 add bf16 FP_ARMv8 DOTPROD
85+end arch armv9-a
86+
87 begin arch iwmmxt
88 tune for iwmmxt
89 tune flags LDSCHED STRONG XSCALE
90diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
91index 5692d4fb7..ae3dd9414 100644
92--- a/gcc/config/arm/arm-tables.opt
93+++ b/gcc/config/arm/arm-tables.opt
94@@ -380,10 +380,13 @@ EnumValue
95 Enum(arm_arch) String(armv8.1-m.main) Value(30)
96
97 EnumValue
98-Enum(arm_arch) String(iwmmxt) Value(31)
99+Enum(arm_arch) String(armv9-a) Value(31)
100
101 EnumValue
102-Enum(arm_arch) String(iwmmxt2) Value(32)
103+Enum(arm_arch) String(iwmmxt) Value(32)
104+
105+EnumValue
106+Enum(arm_arch) String(iwmmxt2) Value(33)
107
108 Enum
109 Name(arm_fpu) Type(enum fpu_type)
110diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
111index 47c13a9e5..088c7725c 100644
112--- a/gcc/config/arm/arm.h
113+++ b/gcc/config/arm/arm.h
114@@ -456,7 +456,8 @@ enum base_architecture
115 BASE_ARCH_8A = 8,
116 BASE_ARCH_8M_BASE = 8,
117 BASE_ARCH_8M_MAIN = 8,
118- BASE_ARCH_8R = 8
119+ BASE_ARCH_8R = 8,
120+ BASE_ARCH_9A = 9
121 };
122
123 /* The major revision number of the ARM Architecture implemented by the target. */
124diff --git a/gcc/config/arm/t-aprofile b/gcc/config/arm/t-aprofile
125index 8574ac3e2..68e2251c7 100644
126--- a/gcc/config/arm/t-aprofile
127+++ b/gcc/config/arm/t-aprofile
128@@ -26,8 +26,8 @@
129
130 # Arch and FPU variants to build libraries with
131
132-MULTI_ARCH_OPTS_A = march=armv7-a/march=armv7-a+fp/march=armv7-a+simd/march=armv7ve+simd/march=armv8-a/march=armv8-a+simd
133-MULTI_ARCH_DIRS_A = v7-a v7-a+fp v7-a+simd v7ve+simd v8-a v8-a+simd
134+MULTI_ARCH_OPTS_A = march=armv7-a/march=armv7-a+fp/march=armv7-a+simd/march=armv7ve+simd/march=armv8-a/march=armv8-a+simd/march=armv9-a/march=armv9-a+simd
135+MULTI_ARCH_DIRS_A = v7-a v7-a+fp v7-a+simd v7ve+simd v8-a v8-a+simd v9-a v9-a+simd
136
137 # ARMv7-A - build nofp, fp-d16 and SIMD variants
138
139@@ -46,6 +46,11 @@ MULTILIB_REQUIRED += mthumb/march=armv8-a/mfloat-abi=soft
140 MULTILIB_REQUIRED += mthumb/march=armv8-a+simd/mfloat-abi=hard
141 MULTILIB_REQUIRED += mthumb/march=armv8-a+simd/mfloat-abi=softfp
142
143+# Armv9-A - build nofp and SIMD variants.
144+MULTILIB_REQUIRED += mthumb/march=armv9-a/mfloat-abi=soft
145+MULTILIB_REQUIRED += mthumb/march=armv9-a+simd/mfloat-abi=hard
146+MULTILIB_REQUIRED += mthumb/march=armv9-a+simd/mfloat-abi=softfp
147+
148 # Matches
149
150 # Arch Matches
151@@ -129,17 +134,29 @@ MULTILIB_MATCHES += march?armv8-a=march?armv8.6-a
152 MULTILIB_MATCHES += $(foreach ARCH, $(v8_6_a_simd_variants), \
153 march?armv8-a+simd=march?armv8.6-a$(ARCH))
154
155+# Armv9 without SIMD: map down to base architecture
156+MULTILIB_MATCHES += $(foreach ARCH, $(v9_a_nosimd_variants), \
157+ march?armv9-a=march?armv9-a$(ARCH))
158+
159+# Armv9 with SIMD: map down to base arch + simd
160+MULTILIB_MATCHES += march?armv9-a+simd=march?armv9-a+crc+simd \
161+ $(foreach ARCH, $(filter-out +simd, $(v9_a_simd_variants)), \
162+ march?armv9-a+simd=march?armv9-a$(ARCH) \
163+ march?armv9-a+simd=march?armv9-a+crc$(ARCH))
164+
165 # Use Thumb libraries for everything.
166
167 MULTILIB_REUSE += mthumb/march.armv7-a/mfloat-abi.soft=marm/march.armv7-a/mfloat-abi.soft
168
169 MULTILIB_REUSE += mthumb/march.armv8-a/mfloat-abi.soft=marm/march.armv8-a/mfloat-abi.soft
170
171+MULTILIB_REUSE += mthumb/march.armv9-a/mfloat-abi.soft=marm/march.armv9-a/mfloat-abi.soft
172+
173 MULTILIB_REUSE += $(foreach ABI, hard softfp, \
174- $(foreach ARCH, armv7-a+fp armv7-a+simd armv7ve+simd armv8-a+simd, \
175+ $(foreach ARCH, armv7-a+fp armv7-a+simd armv7ve+simd armv8-a+simd armv9-a+simd, \
176 mthumb/march.$(ARCH)/mfloat-abi.$(ABI)=marm/march.$(ARCH)/mfloat-abi.$(ABI)))
177
178 # Softfp but no FP, use the soft-float libraries.
179 MULTILIB_REUSE += $(foreach MODE, arm thumb, \
180- $(foreach ARCH, armv7-a armv8-a, \
181+ $(foreach ARCH, armv7-a armv8-a armv9-a, \
182 mthumb/march.$(ARCH)/mfloat-abi.soft=m$(MODE)/march.$(ARCH)/mfloat-abi.softfp))
183diff --git a/gcc/config/arm/t-arm-elf b/gcc/config/arm/t-arm-elf
184index d68def308..b3a900e8c 100644
185--- a/gcc/config/arm/t-arm-elf
186+++ b/gcc/config/arm/t-arm-elf
187@@ -38,6 +38,8 @@ v7ve_fps := vfpv3-d16 vfpv3 vfpv3-d16-fp16 vfpv3-fp16 vfpv4 neon \
188 # it seems to work ok.
189 v8_fps := simd fp16 crypto fp16+crypto dotprod fp16fml
190
191+v9_fps := simd fp16 crypto fp16+crypto dotprod fp16fml
192+
193 # We don't do anything special with these. Pre-v4t probably doesn't work.
194 all_early_nofp := armv4 armv4t armv5t
195
196@@ -49,6 +51,8 @@ all_v7_a_r := armv7-a armv7ve armv7-r
197 all_v8_archs := armv8-a armv8-a+crc armv8.1-a armv8.2-a armv8.3-a armv8.4-a \
198 armv8.5-a armv8.6-a
199
200+all_v9_archs := armv9-a
201+
202 # No floating point variants, require thumb1 softfp
203 all_nofp_t := armv6-m armv6s-m armv8-m.base
204
205@@ -110,6 +114,11 @@ MULTILIB_MATCHES += $(foreach ARCH, $(all_v8_archs), \
206 $(foreach FPARCH, $(v8_fps), \
207 march?armv7+fp=march?$(ARCH)+$(FPARCH)))
208
209+MULTILIB_MATCHES += $(foreach ARCH, $(all_v9_archs), \
210+ march?armv7+fp=march?$(ARCH) \
211+ $(foreach FPARCH, $(v9_fps), \
212+ march?armv7+fp=march?$(ARCH)+$(FPARCH)))
213+
214 MULTILIB_MATCHES += $(foreach ARCH, armv7e-m armv8-m.mainline, \
215 march?armv7+fp=march?$(ARCH)+fp.dp)
216
217diff --git a/gcc/config/arm/t-multilib b/gcc/config/arm/t-multilib
218index ddc5033bf..d789b86ee 100644
219--- a/gcc/config/arm/t-multilib
220+++ b/gcc/config/arm/t-multilib
221@@ -78,6 +78,8 @@ v8_4_a_simd_variants := $(call all_feat_combs, simd fp16 crypto i8mm bf16)
222 v8_5_a_simd_variants := $(call all_feat_combs, simd fp16 crypto i8mm bf16)
223 v8_6_a_simd_variants := $(call all_feat_combs, simd fp16 crypto i8mm bf16)
224 v8_r_nosimd_variants := +crc
225+v9_a_nosimd_variants := +crc
226+v9_a_simd_variants := $(call all_feat_combs, simd fp16 crypto i8mm bf16)
227
228 ifneq (,$(HAS_APROFILE))
229 include $(srcdir)/config/arm/t-aprofile
230@@ -202,6 +204,16 @@ MULTILIB_MATCHES += march?armv7=march?armv8.6-a
231 MULTILIB_MATCHES += $(foreach ARCH, $(v8_6_a_simd_variants), \
232 march?armv7+fp=march?armv8.6-a$(ARCH))
233
234+# Armv9
235+MULTILIB_MATCHES += march?armv7=march?armv9-a
236+MULTILIB_MATCHES += $(foreach ARCH, $(v9_a_nosimd_variants), \
237+ march?armv7=march?armv9-a$(ARCH))
238+
239+# Armv9 with SIMD
240+MULTILIB_MATCHES += march?armv7+fp=march?armv9-a+crc+simd \
241+ $(foreach ARCH, $(v9_a_simd_variants), \
242+ march?armv7+fp=march?armv9-a$(ARCH) \
243+ march?armv7+fp=march?armv9-a+crc$(ARCH))
244 endif # Not APROFILE.
245
246 # Use Thumb libraries for everything.
247diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
248index 7184a62d0..9a712c0d6 100644
249--- a/gcc/doc/invoke.texi
250+++ b/gcc/doc/invoke.texi
251@@ -19701,6 +19701,7 @@ Permissible names are:
252 @samp{armv7-m}, @samp{armv7e-m},
253 @samp{armv8-m.base}, @samp{armv8-m.main},
254 @samp{armv8.1-m.main},
255+@samp{armv9-a},
256 @samp{iwmmxt} and @samp{iwmmxt2}.
257
258 Additionally, the following architectures, which lack support for the
259diff --git a/gcc/testsuite/gcc.target/arm/multilib.exp b/gcc/testsuite/gcc.target/arm/multilib.exp
260index 4b30025db..e3f06c316 100644
261--- a/gcc/testsuite/gcc.target/arm/multilib.exp
262+++ b/gcc/testsuite/gcc.target/arm/multilib.exp
263@@ -135,6 +135,14 @@ if {[multilib_config "aprofile"] } {
264 {-march=armv8.6-a+simd+fp16 -mfloat-abi=softfp} "thumb/v8-a+simd/softfp"
265 {-march=armv8.6-a+simd+fp16+nofp -mfloat-abi=softfp} "thumb/v8-a/nofp"
266 {-march=armv8.6-a+simd+nofp+fp16 -mfloat-abi=softfp} "thumb/v8-a+simd/softfp"
267+ {-march=armv9-a+crypto -mfloat-abi=soft} "thumb/v9-a/nofp"
268+ {-march=armv9-a+simd+crypto -mfloat-abi=softfp} "thumb/v9-a+simd/softfp"
269+ {-march=armv9-a+simd+crypto+nofp -mfloat-abi=softfp} "thumb/v9-a/nofp"
270+ {-march=armv9-a+simd+nofp+crypto -mfloat-abi=softfp} "thumb/v9-a+simd/softfp"
271+ {-march=armv9-a+fp16 -mfloat-abi=soft} "thumb/v9-a/nofp"
272+ {-march=armv9-a+simd+fp16 -mfloat-abi=softfp} "thumb/v9-a+simd/softfp"
273+ {-march=armv9-a+simd+fp16+nofp -mfloat-abi=softfp} "thumb/v9-a/nofp"
274+ {-march=armv9-a+simd+nofp+fp16 -mfloat-abi=softfp} "thumb/v9-a+simd/softfp"
275 {-mcpu=cortex-a53+crypto -mfloat-abi=hard} "thumb/v8-a+simd/hard"
276 {-mcpu=cortex-a53+nofp -mfloat-abi=softfp} "thumb/v8-a/nofp"
277 {-march=armv8-a+crc -mfloat-abi=hard -mfpu=vfp} "thumb/v8-a+simd/hard"
278diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
279index 857e57218..52e043917 100644
280--- a/gcc/testsuite/lib/target-supports.exp
281+++ b/gcc/testsuite/lib/target-supports.exp
282@@ -4820,7 +4820,8 @@ foreach { armfunc armflag armdefs } {
283 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
284 __ARM_ARCH_8M_BASE__
285 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
286- v8_1m_main "-march=armv8.1-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } {
287+ v8_1m_main "-march=armv8.1-m.main -mthumb" __ARM_ARCH_8M_MAIN__
288+ v9a "-march=armv9-a" __ARM_ARCH_9A__ } {
289 eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
290 proc check_effective_target_arm_arch_FUNC_ok { } {
291 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
292--
2932.34.1
294
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