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Diffstat (limited to 'recipes-bsp/u-boot/files/v2019.07/0014-fpga-arria10-Fix-error-in-fpga-pin-configuration.patch')
-rw-r--r--recipes-bsp/u-boot/files/v2019.07/0014-fpga-arria10-Fix-error-in-fpga-pin-configuration.patch38
1 files changed, 0 insertions, 38 deletions
diff --git a/recipes-bsp/u-boot/files/v2019.07/0014-fpga-arria10-Fix-error-in-fpga-pin-configuration.patch b/recipes-bsp/u-boot/files/v2019.07/0014-fpga-arria10-Fix-error-in-fpga-pin-configuration.patch
deleted file mode 100644
index 0255efc..0000000
--- a/recipes-bsp/u-boot/files/v2019.07/0014-fpga-arria10-Fix-error-in-fpga-pin-configuration.patch
+++ /dev/null
@@ -1,38 +0,0 @@
1From db2095305c0fb464f57b001464fb811a86f19834 Mon Sep 17 00:00:00 2001
2From: Dalon Westergreen <dalon.westergreen@intel.com>
3Date: Tue, 16 Jul 2019 09:12:53 -0700
4Subject: [PATCH 14/14] fpga: arria10: Fix error in fpga pin configuration
5
6Pin configuration of the FPGA devicetree block should be done
7after core configuration in the arria10 fpga driver. This fix
8corrects the check of status, and ensures that the fpga pin mux
9is configured on correct configuration of the core fpga image.
10
11Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
12---
13 drivers/fpga/socfpga_arria10.c | 9 +++++----
14 1 file changed, 5 insertions(+), 4 deletions(-)
15
16diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c
17index 285280e507..5fb9d6a191 100644
18--- a/drivers/fpga/socfpga_arria10.c
19+++ b/drivers/fpga/socfpga_arria10.c
20@@ -936,10 +936,11 @@ int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size)
21 fpgamgr_program_write(rbf_data, rbf_size);
22
23 status = fpgamgr_program_finish();
24- if (status) {
25- config_pins(gd->fdt_blob, "fpga");
26- puts("FPGA: Enter user mode.\n");
27- }
28+ if (status)
29+ return status;
30+
31+ config_pins(gd->fdt_blob, "fpga");
32+ puts("FPGA: Enter user mode.\n");
33
34 return status;
35 }
36--
372.21.0
38