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author | Yeoh Ee Peng <ee.peng.yeoh@intel.com> | 2020-04-01 14:50:33 +0800 |
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committer | Anuj Mittal <anuj.mittal@intel.com> | 2020-04-02 00:18:46 +0800 |
commit | 9756afd47aa87593e382b8843337889ec7c31408 (patch) | |
tree | f932faffacd9166d19c689113af8ae3dbc37db43 /dynamic-layers/clang-layer/recipes-devtools/clang/files/fix-shared-libs.patch | |
parent | 47659db192f1c397a906babc79edea7f7ec6c8cf (diff) | |
download | meta-intel-9756afd47aa87593e382b8843337889ec7c31408.tar.gz |
runtime/cyclictest: Enable cyclictest for image with rt kernel
Enable cyclictest:
- test execute cyclictest, retrieve the maximum latency captured inside log and compare it to the
target latency
- cyclictest arguments based on public cyclictest arguments used for intel corei7
https://www.osadl.org/Latency-plot-of-system-in-rack-9-slot.qa-latencyplot-r9s5.0.html?shadow=1
- set default target latency based on 24 us (captured from public cyclictest execution) multiple
by 1.2 (buffer)
- enable user defined target latency by configuring 'RTKERNEL_TARGET_LATENCY' as bitbake config
example, inside local.conf: RTKERNEL_TARGET_LATENCY = "25"
Signed-off-by: Yeoh Ee Peng <ee.peng.yeoh@intel.com>
Signed-off-by: Anuj Mittal <anuj.mittal@intel.com>
Diffstat (limited to 'dynamic-layers/clang-layer/recipes-devtools/clang/files/fix-shared-libs.patch')
0 files changed, 0 insertions, 0 deletions