summaryrefslogtreecommitdiffstats
path: root/meta-python
diff options
context:
space:
mode:
authorKhem Raj <raj.khem@gmail.com>2022-01-26 17:26:57 -0800
committerKhem Raj <raj.khem@gmail.com>2022-01-31 08:15:17 -0800
commit32d661fd01e21aec33a104bc2ff00f54d47d0650 (patch)
tree9130f0417ce1a42624b65c11e6518a4ce7d1694c /meta-python
parent04669acb6ccbd8835df1750a38e16f0af6c87232 (diff)
downloadmeta-openembedded-32d661fd01e21aec33a104bc2ff00f54d47d0650.tar.gz
python3-pyruvate: Fix build with riscv64/musl
Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Trevor Gamblin <trevor.gamblin@windriver.com>
Diffstat (limited to 'meta-python')
-rw-r--r--meta-python/recipes-devtools/python/python3-pyruvate/0001-riscv64-mod.rs-Add-missing-error-codes.patch32
-rw-r--r--meta-python/recipes-devtools/python/python3-pyruvate_1.1.2.bb1
2 files changed, 33 insertions, 0 deletions
diff --git a/meta-python/recipes-devtools/python/python3-pyruvate/0001-riscv64-mod.rs-Add-missing-error-codes.patch b/meta-python/recipes-devtools/python/python3-pyruvate/0001-riscv64-mod.rs-Add-missing-error-codes.patch
new file mode 100644
index 0000000000..67108472ac
--- /dev/null
+++ b/meta-python/recipes-devtools/python/python3-pyruvate/0001-riscv64-mod.rs-Add-missing-error-codes.patch
@@ -0,0 +1,32 @@
1From c711fb215de54f960a35cdc48cd506b6b5db4918 Mon Sep 17 00:00:00 2001
2From: Khem Raj <raj.khem@gmail.com>
3Date: Wed, 26 Jan 2022 11:50:58 -0800
4Subject: [PATCH] riscv64/mod.rs: Add missing error codes
5
6These are flagged by apps e.g. python3-pyruvate
7
8Upstream-Status: Submitted [https://github.com/rust-lang/libc/pull/2656]
9Signed-off-by: Khem Raj <raj.khem@gmail.com>
10---
11 src/unix/linux_like/linux/musl/b64/riscv64/mod.rs | 5 +++++
12 1 file changed, 5 insertions(+)
13
14diff --git a/src/unix/linux_like/linux/musl/b64/riscv64/mod.rs b/src/unix/linux_like/linux/musl/b64/riscv64/mod.rs
15index b075b4a05..6b17621c7 100644
16--- a/src/unix/linux_like/linux/musl/b64/riscv64/mod.rs
17+++ b/src/unix/linux_like/linux/musl/b64/riscv64/mod.rs
18@@ -548,6 +548,11 @@ pub const EHOSTUNREACH: ::c_int = 113;
19 pub const EALREADY: ::c_int = 114;
20 pub const EINPROGRESS: ::c_int = 115;
21 pub const ESTALE: ::c_int = 116;
22+pub const EUCLEAN: ::c_int = 117;
23+pub const ENOTNAM: ::c_int = 118;
24+pub const ENAVAIL: ::c_int = 119;
25+pub const EISNAM: ::c_int = 120;
26+pub const EREMOTEIO: ::c_int = 121;
27 pub const EDQUOT: ::c_int = 122;
28 pub const ENOMEDIUM: ::c_int = 123;
29 pub const EMEDIUMTYPE: ::c_int = 124;
30--
312.35.0
32
diff --git a/meta-python/recipes-devtools/python/python3-pyruvate_1.1.2.bb b/meta-python/recipes-devtools/python/python3-pyruvate_1.1.2.bb
index 14142fdb67..b83302d44c 100644
--- a/meta-python/recipes-devtools/python/python3-pyruvate_1.1.2.bb
+++ b/meta-python/recipes-devtools/python/python3-pyruvate_1.1.2.bb
@@ -23,6 +23,7 @@ RUSTFLAGS:append:powerpc = " --cfg crossbeam_no_atomic_64"
23RUSTFLAGS:append:riscv32 = " --cfg crossbeam_no_atomic_64" 23RUSTFLAGS:append:riscv32 = " --cfg crossbeam_no_atomic_64"
24 24
25SRC_URI:append:mips = " file://0001-check-for-mips-targets-for-stat.st_dev-definitions.patch;patchdir=../cargo_home/bitbake/libsystemd-0.4.1/" 25SRC_URI:append:mips = " file://0001-check-for-mips-targets-for-stat.st_dev-definitions.patch;patchdir=../cargo_home/bitbake/libsystemd-0.4.1/"
26SRC_URI:append = " file://0001-riscv64-mod.rs-Add-missing-error-codes.patch;patchdir=../cargo_home/bitbake/libc-0.2.112/"
26 27
27SRC_URI += " \ 28SRC_URI += " \
28 crate://crates.io/aho-corasick/0.7.18 \ 29 crate://crates.io/aho-corasick/0.7.18 \