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authorKoen Kooi <koen@dominion.thruhere.net>2010-11-02 22:03:58 +0100
committerKoen Kooi <koen@dominion.thruhere.net>2010-11-02 22:12:02 +0100
commitbe10a6b1321f250b1034c7d9d0a8ef18b296eef1 (patch)
tree9249025cbfbfbee4cc430d62b27f75301dd4dfde /recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99393.patch
parent93b28937ac67ba46d65f55637e42552e224aa7e2 (diff)
downloadmeta-openembedded-be10a6b1321f250b1034c7d9d0a8ef18b296eef1.tar.gz
angstrom-layers: meta-openembedded: replace poky gcc 4.5 sources with OE ones
This needs further investigation, but for now we can get the tested sources into the poky gcc harness Signed-off-by: Koen Kooi <k-kooi@ti.com>
Diffstat (limited to 'recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99393.patch')
-rw-r--r--recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99393.patch45
1 files changed, 45 insertions, 0 deletions
diff --git a/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99393.patch b/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99393.patch
new file mode 100644
index 0000000000..d8df57a448
--- /dev/null
+++ b/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99393.patch
@@ -0,0 +1,45 @@
12010-09-13 Chung-Lin Tang <cltang@codesourcery.com>
2
3 Backport from mainline:
4
5 2010-09-12 Bernd Schmidt <bernds@codesourcery.com>
6
7 gcc/
8 * config/arm/arm.md (arm_ashldi3_1bit, arm_ashrdi3_1bit,
9 arm_lshrdi3_1bit): Put earlyclobber on the right alternative.
10
11 2010-09-10 Nathan Froyd <froydnj@codesourcery.com>
12
13 Issue #9120
14
15=== modified file 'gcc/config/arm/arm.md'
16--- old/gcc/config/arm/arm.md 2010-09-13 15:39:11 +0000
17+++ new/gcc/config/arm/arm.md 2010-09-15 16:55:55 +0000
18@@ -3295,7 +3295,7 @@
19 )
20
21 (define_insn "arm_ashldi3_1bit"
22- [(set (match_operand:DI 0 "s_register_operand" "=&r,r")
23+ [(set (match_operand:DI 0 "s_register_operand" "=r,&r")
24 (ashift:DI (match_operand:DI 1 "s_register_operand" "0,r")
25 (const_int 1)))
26 (clobber (reg:CC CC_REGNUM))]
27@@ -3354,7 +3354,7 @@
28 )
29
30 (define_insn "arm_ashrdi3_1bit"
31- [(set (match_operand:DI 0 "s_register_operand" "=&r,r")
32+ [(set (match_operand:DI 0 "s_register_operand" "=r,&r")
33 (ashiftrt:DI (match_operand:DI 1 "s_register_operand" "0,r")
34 (const_int 1)))
35 (clobber (reg:CC CC_REGNUM))]
36@@ -3410,7 +3410,7 @@
37 )
38
39 (define_insn "arm_lshrdi3_1bit"
40- [(set (match_operand:DI 0 "s_register_operand" "=&r,r")
41+ [(set (match_operand:DI 0 "s_register_operand" "=r,&r")
42 (lshiftrt:DI (match_operand:DI 1 "s_register_operand" "0,r")
43 (const_int 1)))
44 (clobber (reg:CC CC_REGNUM))]
45