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author | Khem Raj <raj.khem@gmail.com> | 2012-06-28 12:19:53 -0700 |
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committer | Koen Kooi <koen@dominion.thruhere.net> | 2012-07-09 18:40:21 +0200 |
commit | 6b278fbb02d818b54b5a9fa2716fc49e896b72a8 (patch) | |
tree | 833783fb738ff7abf3d0e3029c9a468e73b06e28 /toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106720.patch | |
parent | 680af24d1ff95533db610176e6b01fcc9dcf6699 (diff) | |
download | meta-openembedded-6b278fbb02d818b54b5a9fa2716fc49e896b72a8.tar.gz |
gcc-4.6: Migrate recipes from OE-Core
Remove linaro patches. If one needs to use linaro
modified gcc they should use meta-linaro
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Diffstat (limited to 'toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106720.patch')
-rw-r--r-- | toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106720.patch | 51 |
1 files changed, 0 insertions, 51 deletions
diff --git a/toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106720.patch b/toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106720.patch deleted file mode 100644 index 4c573f401e..0000000000 --- a/toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106720.patch +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | 2011-02-21 Andrew Stubbs <ams@codesourcery.com> | ||
2 | Julian Brown <julian@codesourcery.com> | ||
3 | Mark Shinwell <shinwell@codesourcery.com> | ||
4 | |||
5 | Forward-ported from Linaro GCC 4.5 (bzr99324). | ||
6 | |||
7 | gcc/ | ||
8 | * config/arm/arm.h (arm_class_likely_spilled_p): Check against | ||
9 | LO_REGS only for Thumb-1. | ||
10 | (MODE_BASE_REG_CLASS): Restrict base registers to those which can | ||
11 | be used in short instructions when optimising for size on Thumb-2. | ||
12 | |||
13 | === modified file 'gcc/config/arm/arm.c' | ||
14 | --- old/gcc/config/arm/arm.c 2011-01-29 03:20:57 +0000 | ||
15 | +++ new/gcc/config/arm/arm.c 2011-02-21 14:04:51 +0000 | ||
16 | @@ -22304,14 +22304,16 @@ | ||
17 | |||
18 | /* Implement TARGET_CLASS_LIKELY_SPILLED_P. | ||
19 | |||
20 | - We need to define this for LO_REGS on thumb. Otherwise we can end up | ||
21 | - using r0-r4 for function arguments, r7 for the stack frame and don't | ||
22 | - have enough left over to do doubleword arithmetic. */ | ||
23 | - | ||
24 | + We need to define this for LO_REGS on Thumb-1. Otherwise we can end up | ||
25 | + using r0-r4 for function arguments, r7 for the stack frame and don't have | ||
26 | + enough left over to do doubleword arithmetic. For Thumb-2 all the | ||
27 | + potentially problematic instructions accept high registers so this is not | ||
28 | + necessary. Care needs to be taken to avoid adding new Thumb-2 patterns | ||
29 | + that require many low registers. */ | ||
30 | static bool | ||
31 | arm_class_likely_spilled_p (reg_class_t rclass) | ||
32 | { | ||
33 | - if ((TARGET_THUMB && rclass == LO_REGS) | ||
34 | + if ((TARGET_THUMB1 && rclass == LO_REGS) | ||
35 | || rclass == CC_REG) | ||
36 | return true; | ||
37 | |||
38 | |||
39 | === modified file 'gcc/config/arm/arm.h' | ||
40 | --- old/gcc/config/arm/arm.h 2011-01-29 03:20:57 +0000 | ||
41 | +++ new/gcc/config/arm/arm.h 2011-02-21 14:04:51 +0000 | ||
42 | @@ -1185,7 +1185,7 @@ | ||
43 | when addressing quantities in QI or HI mode; if we don't know the | ||
44 | mode, then we must be conservative. */ | ||
45 | #define MODE_BASE_REG_CLASS(MODE) \ | ||
46 | - (TARGET_32BIT ? CORE_REGS : \ | ||
47 | + (TARGET_ARM || (TARGET_THUMB2 && !optimize_size) ? CORE_REGS : \ | ||
48 | (((MODE) == SImode) ? BASE_REGS : LO_REGS)) | ||
49 | |||
50 | /* For Thumb we can not support SP+reg addressing, so we return LO_REGS | ||
51 | |||