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-rw-r--r--toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99350.patch184
1 files changed, 184 insertions, 0 deletions
diff --git a/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99350.patch b/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99350.patch
new file mode 100644
index 0000000000..3f66f9d157
--- /dev/null
+++ b/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99350.patch
@@ -0,0 +1,184 @@
1 Jie Zhang <jie@codesourcery.com>
2
3 Issue #7122
4
5 gcc/
6 * config/arm/vfp.md (movdf_vfp): Add load double 0.0 case.
7 (thumb2_movdf_vfp): Likewise. Require that one of the operands be a
8 register.
9 * config/arm/constraints.md (D0): New constraint.
10
11 gcc/testsuite/
12 * gcc.target/arm/neon-load-df0.c: New test.
13
142010-07-26 Julian Brown <julian@codesourcery.com>
15
16 Merge from Sourcery G++ 4.4:
17
18 2010-02-23 Julian Brown <julian@codesourcery.com>
19
20 gcc/
21
22=== modified file 'gcc/config/arm/constraints.md'
23--- old/gcc/config/arm/constraints.md 2010-08-12 16:47:21 +0000
24+++ new/gcc/config/arm/constraints.md 2010-08-13 10:59:06 +0000
25@@ -29,7 +29,7 @@
26 ;; in Thumb-1 state: I, J, K, L, M, N, O
27
28 ;; The following multi-letter normal constraints have been used:
29-;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv, Dy, Di
30+;; in ARM/Thumb-2 state: D0, Da, Db, Dc, Di, Dn, Dl, DL, Dv, Dy
31 ;; in Thumb-1 state: Pa, Pb
32 ;; in Thumb-2 state: Ps, Pt, Pv
33
34@@ -173,6 +173,13 @@
35 (and (match_code "const_double")
36 (match_test "TARGET_32BIT && neg_const_double_rtx_ok_for_fpa (op)")))
37
38+(define_constraint "D0"
39+ "@internal
40+ In ARM/Thumb-2 state a 0.0 floating point constant which can
41+ be loaded with a Neon vmov immediate instruction."
42+ (and (match_code "const_double")
43+ (match_test "TARGET_NEON && op == CONST0_RTX (mode)")))
44+
45 (define_constraint "Da"
46 "@internal
47 In ARM/Thumb-2 state a const_int, const_double or const_vector that can
48
49=== modified file 'gcc/config/arm/vfp.md'
50--- old/gcc/config/arm/vfp.md 2010-08-12 11:29:02 +0000
51+++ new/gcc/config/arm/vfp.md 2010-08-13 10:59:06 +0000
52@@ -402,8 +402,8 @@
53 ;; DFmode moves
54
55 (define_insn "*movdf_vfp"
56- [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=w,?r,w ,r, m,w ,Uv,w,r")
57- (match_operand:DF 1 "soft_df_operand" " ?r,w,Dy,mF,r,UvF,w, w,r"))]
58+ [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=w,?r,w ,w, r, m,w ,Uv,w,r")
59+ (match_operand:DF 1 "soft_df_operand" " ?r,w,Dy,D0,mF,r,UvF,w, w,r"))]
60 "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP
61 && ( register_operand (operands[0], DFmode)
62 || register_operand (operands[1], DFmode))"
63@@ -418,16 +418,18 @@
64 case 2:
65 gcc_assert (TARGET_VFP_DOUBLE);
66 return \"fconstd%?\\t%P0, #%G1\";
67- case 3: case 4:
68+ case 3:
69+ return \"vmov.i32\\t%P0, #0\";
70+ case 4: case 5:
71 return output_move_double (operands);
72- case 5: case 6:
73+ case 6: case 7:
74 return output_move_vfp (operands);
75- case 7:
76+ case 8:
77 if (TARGET_VFP_SINGLE)
78 return \"fcpys%?\\t%0, %1\;fcpys%?\\t%p0, %p1\";
79 else
80 return \"fcpyd%?\\t%P0, %P1\";
81- case 8:
82+ case 9:
83 return \"#\";
84 default:
85 gcc_unreachable ();
86@@ -435,10 +437,10 @@
87 }
88 "
89 [(set_attr "type"
90- "r_2_f,f_2_r,fconstd,f_loadd,f_stored,load2,store2,ffarithd,*")
91- (set_attr "neon_type" "neon_mcr_2_mcrr,neon_mrrc,*,*,*,*,*,neon_vmov,*")
92- (set (attr "length") (cond [(eq_attr "alternative" "3,4,8") (const_int 8)
93- (eq_attr "alternative" "7")
94+ "r_2_f,f_2_r,fconstd,*,f_loadd,f_stored,load2,store2,ffarithd,*")
95+ (set_attr "neon_type" "neon_mcr_2_mcrr,neon_mrrc,*,neon_vmov,*,*,*,*,neon_vmov,*")
96+ (set (attr "length") (cond [(eq_attr "alternative" "4,5,9") (const_int 8)
97+ (eq_attr "alternative" "8")
98 (if_then_else
99 (eq (symbol_ref "TARGET_VFP_SINGLE")
100 (const_int 1))
101@@ -446,14 +448,16 @@
102 (const_int 4))]
103 (const_int 4)))
104 (set_attr "predicable" "yes")
105- (set_attr "pool_range" "*,*,*,1020,*,1020,*,*,*")
106- (set_attr "neg_pool_range" "*,*,*,1008,*,1008,*,*,*")]
107+ (set_attr "pool_range" "*,*,*,*,1020,*,1020,*,*,*")
108+ (set_attr "neg_pool_range" "*,*,*,*,1008,*,1008,*,*,*")]
109 )
110
111 (define_insn "*thumb2_movdf_vfp"
112- [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=w,?r,w ,r, m,w ,Uv,w,r")
113- (match_operand:DF 1 "soft_df_operand" " ?r,w,Dy,mF,r,UvF,w, w,r"))]
114- "TARGET_THUMB2 && TARGET_HARD_FLOAT && TARGET_VFP"
115+ [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=w,?r,w ,w,r, m,w ,Uv,w,r")
116+ (match_operand:DF 1 "soft_df_operand" " ?r,w,Dy,D0,mF,r,UvF,w, w,r"))]
117+ "TARGET_THUMB2 && TARGET_HARD_FLOAT && TARGET_VFP
118+ && ( register_operand (operands[0], DFmode)
119+ || register_operand (operands[1], DFmode))"
120 "*
121 {
122 switch (which_alternative)
123@@ -465,11 +469,13 @@
124 case 2:
125 gcc_assert (TARGET_VFP_DOUBLE);
126 return \"fconstd%?\\t%P0, #%G1\";
127- case 3: case 4: case 8:
128+ case 3:
129+ return \"vmov.i32\\t%P0, #0\";
130+ case 4: case 5: case 9:
131 return output_move_double (operands);
132- case 5: case 6:
133+ case 6: case 7:
134 return output_move_vfp (operands);
135- case 7:
136+ case 8:
137 if (TARGET_VFP_SINGLE)
138 return \"fcpys%?\\t%0, %1\;fcpys%?\\t%p0, %p1\";
139 else
140@@ -480,18 +486,18 @@
141 }
142 "
143 [(set_attr "type"
144- "r_2_f,f_2_r,fconstd,load2,store2,f_load,f_store,ffarithd,*")
145- (set_attr "neon_type" "neon_mcr_2_mcrr,neon_mrrc,*,*,*,*,*,neon_vmov,*")
146- (set (attr "length") (cond [(eq_attr "alternative" "3,4,8") (const_int 8)
147- (eq_attr "alternative" "7")
148+ "r_2_f,f_2_r,fconstd,*,load2,store2,f_load,f_store,ffarithd,*")
149+ (set_attr "neon_type" "neon_mcr_2_mcrr,neon_mrrc,*,neon_vmov,*,*,*,*,neon_vmov,*")
150+ (set (attr "length") (cond [(eq_attr "alternative" "4,5,9") (const_int 8)
151+ (eq_attr "alternative" "8")
152 (if_then_else
153 (eq (symbol_ref "TARGET_VFP_SINGLE")
154 (const_int 1))
155 (const_int 8)
156 (const_int 4))]
157 (const_int 4)))
158- (set_attr "pool_range" "*,*,*,4096,*,1020,*,*,*")
159- (set_attr "neg_pool_range" "*,*,*,0,*,1008,*,*,*")]
160+ (set_attr "pool_range" "*,*,*,*,4096,*,1020,*,*,*")
161+ (set_attr "neg_pool_range" "*,*,*,*,0,*,1008,*,*,*")]
162 )
163
164
165
166=== added file 'gcc/testsuite/gcc.target/arm/neon-load-df0.c'
167--- old/gcc/testsuite/gcc.target/arm/neon-load-df0.c 1970-01-01 00:00:00 +0000
168+++ new/gcc/testsuite/gcc.target/arm/neon-load-df0.c 2010-08-13 10:59:06 +0000
169@@ -0,0 +1,14 @@
170+/* Test the optimization of loading 0.0 for ARM Neon. */
171+
172+/* { dg-do compile } */
173+/* { dg-require-effective-target arm_neon_ok } */
174+/* { dg-options "-O2" } */
175+/* { dg-add-options arm_neon } */
176+
177+double x;
178+void bar ()
179+{
180+ x = 0.0;
181+}
182+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[dD\]\[0-9\]+, #0\n" } } */
183+/* { dg-final { cleanup-saved-temps } } */
184
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