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diff --git a/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99426.patch b/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99426.patch
new file mode 100644
index 0000000000..cf06e1ff74
--- /dev/null
+++ b/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99426.patch
@@ -0,0 +1,41 @@
1 Backport from mainline:
2
3 gcc/
4 2010-10-26 Jie Zhang <jie@codesourcery.com>
5
6 * doc/invoke.texi: Improve documentation of
7 -fstrict-volatile-bitfields.
8
9=== modified file 'gcc/doc/invoke.texi'
10--- old/gcc/doc/invoke.texi 2010-11-04 12:43:52 +0000
11+++ new/gcc/doc/invoke.texi 2010-11-04 14:29:09 +0000
12@@ -17633,8 +17633,8 @@
13 @opindex fstrict-volatile-bitfields
14 This option should be used if accesses to volatile bitfields (or other
15 structure fields, although the compiler usually honors those types
16-anyway) should use a single access in a mode of the same size as the
17-container's type, aligned to a natural alignment if possible. For
18+anyway) should use a single access of the width of the
19+field's type, aligned to a natural alignment if possible. For
20 example, targets with memory-mapped peripheral registers might require
21 all such accesses to be 16 bits wide; with this flag the user could
22 declare all peripheral bitfields as ``unsigned short'' (assuming short
23@@ -17647,11 +17647,13 @@
24 any portion of the bitfield, or memory-mapped registers unrelated to
25 the one being updated.
26
27-If the target requires strict alignment, and honoring the container
28+If the target requires strict alignment, and honoring the field
29 type would require violating this alignment, a warning is issued.
30-However, the access happens as the user requested, under the
31-assumption that the user knows something about the target hardware
32-that GCC is unaware of.
33+If the field has @code{packed} attribute, the access is done without
34+honoring the field type. If the field doesn't have @code{packed}
35+attribute, the access is done honoring the field type. In both cases,
36+GCC assumes that the user knows something about the target hardware
37+that it is unaware of.
38
39 The default value of this option is determined by the application binary
40 interface for the target processor.
41